Lines Matching refs:reg_off
940 int reg_off, const void *vaddr,
954 nandc_reg_phys(nandc, reg_off + 4 * i),
960 nandc_reg_phys(nandc, reg_off + 4 * i),
1026 int reg_off, const void *vaddr, int size,
1064 slave_conf.src_addr = nandc->base_dma + reg_off;
1072 slave_conf.dst_addr = nandc->base_dma + reg_off;
1183 * @reg_off: offset within the controller's data buffer
1188 static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
1194 return prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false);
1201 * @reg_off: offset within the controller's data buffer
1206 static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off,
1212 return prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
1470 int ret, reg_off = FLASH_BUF_ACC, read_loc = 0;
1515 read_data_dma(nandc, reg_off, data_buf, data_size1, 0);
1516 reg_off += data_size1;
1518 read_data_dma(nandc, reg_off, oob_buf, oob_size1, 0);
1519 reg_off += oob_size1;
1521 read_data_dma(nandc, reg_off, data_buf + data_size1, data_size2, 0);
1522 reg_off += data_size2;
1524 read_data_dma(nandc, reg_off, oob_buf + oob_size1, oob_size2, 0);
2058 int reg_off = FLASH_BUF_ACC;
2073 write_data_dma(nandc, reg_off, data_buf, data_size1,
2075 reg_off += data_size1;
2078 write_data_dma(nandc, reg_off, oob_buf, oob_size1,
2080 reg_off += oob_size1;
2083 write_data_dma(nandc, reg_off, data_buf, data_size2,
2085 reg_off += data_size2;
2088 write_data_dma(nandc, reg_off, oob_buf, oob_size2, 0);