Searched refs:ras (Results 26 - 50 of 87) sorted by relevance

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/linux-master/drivers/edac/
H A Di5000_edac.c471 int ras, cas; local
484 ras = NREC_RAS(info->nrecmemb);
487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
489 rdwr ? "Write" : "Read", ras, cas);
525 bank, ras, cas, allErrors, specific);
556 int ras, cas; local
579 ras = NREC_RAS(info->nrecmemb);
582 edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
584 rdwr ? "Write" : "Read", ras, cas);
624 rank, bank, ras, ca
[all...]
H A Di5100_edac.c433 unsigned ras,
440 "bank %u, cas %u, ras %u\n",
441 bank, cas, ras);
455 unsigned ras,
462 "bank %u, cas %u, ras %u\n",
463 bank, cas, ras);
483 unsigned ras; local
503 ras = i5100_recmemb_ras(dw2);
512 i5100_handle_ce(mci, chan, bank, rank, syndrome, cas, ras, msg);
525 ras
427 i5100_handle_ce(struct mem_ctl_info *mci, int chan, unsigned bank, unsigned rank, unsigned long syndrome, unsigned cas, unsigned ras, const char *msg) argument
449 i5100_handle_ue(struct mem_ctl_info *mci, int chan, unsigned bank, unsigned rank, unsigned long syndrome, unsigned cas, unsigned ras, const char *msg) argument
[all...]
H A Di5400_edac.c523 int ras, cas; local
549 ras = nrec_ras(info);
552 edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",
554 buf_id, rdwr_str(rdwr), ras, cas);
562 bank, buf_id, ras, cas, allErrors, error_name[errnum]);
587 int ras, cas; local
619 ras = rec_ras(info);
625 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
627 rdwr_str(rdwr), ras, cas);
633 branch >> 1, bank, rdwr_str(rdwr), ras, ca
[all...]
H A Di7300_edac.c411 unsigned branch, channel, bank, rank, cas, ras; local
439 ras = NRECMEMB_RAS(value);
447 bank, ras, cas, errors, specific);
478 ras = RECMEMB_RAS(value);
494 bank, ras, cas, errors, specific);
/linux-master/net/netfilter/
H A Dnf_conntrack_h323_main.c1625 unsigned char **data, RasMessage *ras)
1627 switch (ras->choice) {
1630 &ras->gatekeeperRequest);
1633 &ras->gatekeeperConfirm);
1636 &ras->registrationRequest);
1639 &ras->registrationConfirm);
1642 &ras->unregistrationRequest);
1645 &ras->admissionRequest);
1648 &ras->admissionConfirm);
1651 &ras
1622 process_ras(struct sk_buff *skb, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int protoff, unsigned char **data, RasMessage *ras) argument
1669 static RasMessage ras; local
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_nbio.h113 struct amdgpu_nbio_ras *ras; member in struct:amdgpu_nbio
H A Damdgpu_sdma.h113 struct amdgpu_sdma_ras *ras; member in struct:amdgpu_sdma
H A Damdgpu_vcn.c1249 struct amdgpu_vcn_ras *ras; local
1251 if (!adev->vcn.ras)
1254 ras = adev->vcn.ras;
1255 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
1257 dev_err(adev->dev, "Failed to register vcn ras block!\n");
1261 strcpy(ras->ras_block.ras_comm.name, "vcn");
1262 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;
1263 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;
1264 adev->vcn.ras_if = &ras
[all...]
H A Dgmc_v9_0.c1426 adev->umc.ras = &umc_v6_1_ras;
1435 adev->umc.ras = &umc_v6_1_ras;
1445 adev->umc.ras = &umc_v6_7_ras;
1461 adev->umc.ras = &umc_v12_0_ras;
1490 adev->mmhub.ras = &mmhub_v1_0_ras;
1493 adev->mmhub.ras = &mmhub_v9_4_ras;
1496 adev->mmhub.ras = &mmhub_v1_7_ras;
1499 adev->mmhub.ras = &mmhub_v1_8_ras;
1502 /* mmhub ras is not available */
1517 adev->hdp.ras
[all...]
H A Damdgpu_xgmi.c1481 struct amdgpu_xgmi_ras *ras; local
1483 if (!adev->gmc.xgmi.ras)
1486 ras = adev->gmc.xgmi.ras;
1487 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
1489 dev_err(adev->dev, "Failed to register xgmi_wafl_pcs ras block!\n");
1493 strcpy(ras->ras_block.ras_comm.name, "xgmi_wafl");
1494 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL;
1495 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
1496 adev->gmc.xgmi.ras_if = &ras
[all...]
H A Dsoc15.c484 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); local
488 if (ras && adev->ras_enabled)
496 if (ras && adev->ras_enabled)
507 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); local
541 if (ras && adev->ras_enabled &&
1306 if (adev->nbio.ras &&
1307 adev->nbio.ras->init_ras_controller_interrupt)
1309 if (adev->nbio.ras &&
1310 adev->nbio.ras->init_ras_err_event_athub_interrupt)
H A Damdgpu_mca.h77 struct amdgpu_mca_ras_block *ras; member in struct:amdgpu_mca_ras
H A Damdgpu_umc.h80 /* max error count in one ras query call */
99 struct amdgpu_umc_ras *ras; member in struct:amdgpu_umc
H A Dnbio_v7_4.c369 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); local
390 if (!ras->disable_ras_err_cnt_harvest) {
418 /* ras_controller_int is dedicated for nbif ras error,
459 * tries to enable ras feature. Driver only need to set the correct interrupt
504 * tries to enable ras feature. Driver only need to set the correct interrupt
561 /* register ras controller interrupt */
579 /* register ras err event athub interrupt */
H A Dnbio_v7_9.c514 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); local
529 if (!ras->disable_ras_err_cnt_harvest) {
643 /* register ras controller interrupt */
661 /* register ras err event athub interrupt */
H A Damdgpu_gmc.h184 struct amdgpu_xgmi_ras *ras; member in struct:amdgpu_xgmi
/linux-master/drivers/acpi/
H A Dacpi_extlog.c14 #include <linux/ras.h>
20 #include <ras/ras_event.h>
/linux-master/drivers/cxl/core/
H A Dregs.c93 rmap = &map->ras;
213 { &map->component_map.ras, &regs->ras },
H A Dpci.c708 return __cxl_handle_cor_ras(cxlds, cxlds->regs.ras);
768 return __cxl_handle_ras(cxlds, cxlds->regs.ras);
795 if (!map->component_map.ras.valid)
854 return __cxl_handle_cor_ras(cxlds, dport->regs.ras);
860 return __cxl_handle_ras(cxlds, dport->regs.ras);
/linux-master/drivers/firmware/efi/
H A Dcper-arm.c18 #include <ras/ras_event.h>
/linux-master/drivers/ras/amd/atl/
H A Dinternal.h18 #include <linux/ras.h>
/linux-master/drivers/cxl/
H A Dpci.c532 if (!cxlds->regs.ras) {
546 addr = cxlds->regs.ras + CXL_RAS_UNCORRECTABLE_MASK_OFFSET;
559 addr = cxlds->regs.ras + CXL_RAS_CORRECTABLE_MASK_OFFSET;
841 else if (!cxlds->reg_map.component_map.ras.valid)
H A Dcxl.h209 * @ras: CXL 2.0 8.2.5.9 CXL RAS Capability Structure
213 void __iomem *ras;
247 struct cxl_reg_map ras; member in struct:cxl_component_reg_map
591 * @reg_map: component and ras register mapping parameters
662 * @reg_map: component and ras register mapping parameters
/linux-master/drivers/
H A DMakefile172 obj-$(CONFIG_RAS) += ras/
/linux-master/include/ras/
H A Dras_event.h3 #define TRACE_SYSTEM ras

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