#
6a7cbbc2 |
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06-Mar-2024 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu/vcn: enable vcn1 fw load for VCN 4_0_6 v1 - update the fw header for each vcn instance (Veera) VCN1 has different FW binary in VCN v4_0_6. Add changes to load the VCN1 fw binary Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2b53b366 |
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31-Jan-2024 |
Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> |
drm/amdgpu/vcn: Enable VCN 4.0.6 Support Modified driver to use the appropriate FW files and instance. v2: squash in fixes (Alex) Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
816dae1d |
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15-Aug-2023 |
Sonny Jiang <sonny.jiang@amd.com> |
drm/amdgpu: add VCN_5_0_0 firmware support Add VCN5_0_0 firmware support Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ed1e1e42 |
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23-Jan-2024 |
YiPeng Chai <YiPeng.Chai@amd.com> |
drm/amdgpu: Support passing poison consumption ras block to SRIOV Support passing poison consumption ras blocks to SRIOV. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa1f1cc0 |
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14-Sep-2023 |
David (Ming Qiang) Wu <David.Wu3@amd.com> |
drm/amdgpu: not to save bo in the case of RAS err_event_athub err_event_athub will corrupt VCPU buffer and not good to be restored in amdgpu_vcn_resume() and in this case the VCPU buffer needs to be cleared for VCN firmware to work properly. Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e8303cf |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
eb3b214c |
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02-Sep-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amdgpu: Use min_t to replace min Use min_t to replace min, min_t is a bit fast because min use twice typeof. And using min_t is cleaner here since the min/max macros do a typecheck while min_t()/max_t() to an explicit type cast. Fixes the below checkpatch warning: WARNING: min() should probably be min_t() Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1827b375 |
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13-Jun-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu: add VCN_4_0_5 firmware support Add VCN_4_0_5 firmware support Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
33e88286 |
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12-Jul-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
Revert "drm/amdgpu:update kernel vcn ring test" VCN FW depncencies revert it to unblock others This reverts commit f3fa86f5c778e258cd5c01bb420d4639bb393bd0. Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
093b21f4 |
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12-Jul-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
Revert "drm/amdgpu: update kernel vcn ring test" VCN FW depncencies revert it to unlock others This reverts commit 3ebfa943b8451e4675d023b3f387911702ebee17. Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ebfa943 |
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26-Jun-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu: update kernel vcn ring test add session context buffer to decoder ring test for vcn v1 to v3. v3 - correct the cmd for sesssion ctx buf v2 - add the buffer into IB (Leo liu) Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f3fa86f5 |
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13-Jun-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu:update kernel vcn ring test add session context buffer to decoder ring test. v5 - clear the session ct buffer (Christian) v4 - data type, explain change of ib size change (Christian) v3 - indent and v2 changes correction. (Christian) v2 - put the buffer at the end of the IB (Christian) Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1ddcdb7c |
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07-Jul-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: use psp_execute_load_ip_fw instead Replace the old ones with psp_execute_load_ip_fw. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4ff96bcc |
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20-Jun-2023 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: check RAS irq existence for VCN/JPEG No RAS irq is allowed. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2ecf927b |
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15-May-2023 |
Horatio Zhang <Hongkun.Zhang@amd.com> |
drm/amdgpu: separate ras irq from vcn instance irq for UVD_POISON Separate vcn RAS poison consumption handling from the instance irq, and register dedicated ras_poison_irq src and funcs for UVD_POISON. v2: - Separate ras irq from vcn instance irq - Improve the subject and code comments v3: - Split the patch into three parts - Improve the code comments Suggested-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Horatio Zhang <Hongkun.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5d062270 |
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17-May-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amd/amdgpu: Fix errors & warnings in amdgpu_vcn.c Fix below checkpatch insisted error & warnings: ERROR: space required before the open brace '{' WARNING: braces {} are not necessary for any arm of this statement + if ((type == VCN_ENCODE_RING) && (vcn_config & VCN_BLOCK_ENCODE_DISABLE_MASK)) { [...] + } else if ((type == VCN_DECODE_RING) && (vcn_config & VCN_BLOCK_DECODE_DISABLE_MASK)) { [...] + } else if ((type == VCN_UNIFIED_RING) && (vcn_config & VCN_BLOCK_QUEUE_DISABLE_MASK)) { [...] ERROR: code indent should use tabs where possible WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: braces {} are not necessary for single statement blocks + for (i = 0; i < adev->vcn.num_enc_rings; ++i) { + fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); + ERROR: space required before the open parenthesis '(' WARNING: Missing a blank line after declarations WARNING: please, no spaces at the start of a line WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Acked-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a3edd1ac |
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07-Mar-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu/vcn: Use buffer object's deletion logic VCN DPG buffer object is intialized to NULL. If allotted, buffer object deletion logic will take care of NULL check and delete accordingly. This is useful for cases where indirect sram flag could be manipulated later after buffer allocation. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f471de25 |
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19-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: vcn_v4_0_3 load vcn fw once for all AIDs Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e40b4b9a |
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12-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: enable indirect_sram mode on vcn_v4_0_3 Enable indirect_sram mode on vcn_v4_0_3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
da044aae |
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17-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add unified queue support on vcn_v4_0_3 Add unified queue support on vcn_v4_0_3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
76e5e4c7 |
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06-Jan-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add VCN4_0_3 firmware Add VCN4_0_3 firmware. v2: fix fw name (Alex) Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ac1d8e2f |
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15-May-2023 |
Horatio Zhang <Hongkun.Zhang@amd.com> |
drm/amdgpu: separate ras irq from vcn instance irq for UVD_POISON Separate vcn RAS poison consumption handling from the instance irq, and register dedicated ras_poison_irq src and funcs for UVD_POISON. v2: - Separate ras irq from vcn instance irq - Improve the subject and code comments v3: - Split the patch into three parts - Improve the code comments Suggested-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Horatio Zhang <Hongkun.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1aff0a5d |
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12-Mar-2023 |
Guilherme G. Piccoli <gpiccoli@igalia.com> |
drm/amdgpu/vcn: Disable indirect SRAM on Vangogh broken BIOSes The VCN firmware loading path enables the indirect SRAM mode if it's advertised as supported. We might have some cases of FW issues that prevents this mode to working properly though, ending-up in a failed probe. An example below, observed in the Steam Deck: [...] [drm] failed to load ucode VCN0_RAM(0x3A) [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0000) amdgpu 0000:04:00.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vcn_dec_0 test failed (-110) [drm:amdgpu_device_init.cold [amdgpu]] *ERROR* hw_init of IP block <vcn_v3_0> failed -110 amdgpu 0000:04:00.0: amdgpu: amdgpu_device_ip_init failed amdgpu 0000:04:00.0: amdgpu: Fatal error during GPU init [...] Disabling the VCN block circumvents this, but it's a very invasive workaround that turns off the entire feature. So, let's add a quirk on VCN loading that checks for known problematic BIOSes on Vangogh, so we can proactively disable the indirect SRAM mode and allow the HW proper probe and VCN IP block to work fine. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2385 Fixes: 82132ecc5432 ("drm/amdgpu: enable Vangogh VCN indirect sram mode") Cc: stable@vger.kernel.org Cc: James Zhu <James.Zhu@amd.com> Cc: Leo Liu <leo.liu@amd.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f81c31d9 |
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11-Mar-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Move vcn ras block init to ras sw_init Initialize vcn ras block only when vcn ip block supports ras features. Driver queries ras capabilities after early_init, ras block init needs to be moved to sw_int. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Stanley Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
542a56e8 |
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12-Mar-2023 |
Guilherme G. Piccoli <gpiccoli@igalia.com> |
drm/amdgpu/vcn: Disable indirect SRAM on Vangogh broken BIOSes The VCN firmware loading path enables the indirect SRAM mode if it's advertised as supported. We might have some cases of FW issues that prevents this mode to working properly though, ending-up in a failed probe. An example below, observed in the Steam Deck: [...] [drm] failed to load ucode VCN0_RAM(0x3A) [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0000) amdgpu 0000:04:00.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vcn_dec_0 test failed (-110) [drm:amdgpu_device_init.cold [amdgpu]] *ERROR* hw_init of IP block <vcn_v3_0> failed -110 amdgpu 0000:04:00.0: amdgpu: amdgpu_device_ip_init failed amdgpu 0000:04:00.0: amdgpu: Fatal error during GPU init [...] Disabling the VCN block circumvents this, but it's a very invasive workaround that turns off the entire feature. So, let's add a quirk on VCN loading that checks for known problematic BIOSes on Vangogh, so we can proactively disable the indirect SRAM mode and allow the HW proper probe and VCN IP block to work fine. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2385 Fixes: 82132ecc5432 ("drm/amdgpu: enable Vangogh VCN indirect sram mode") Cc: stable@vger.kernel.org Cc: James Zhu <James.Zhu@amd.com> Cc: Leo Liu <leo.liu@amd.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
09eb3ea3 |
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17-Jan-2023 |
Guilherme G. Piccoli <gpiccoli@igalia.com> |
drm/amdgpu/vcn: Remove redundant indirect SRAM HW model check The HW model validation that guards the indirect SRAM checking in the VCN code path is redundant - there's no model that's not included in the switch, making it useless in practice [0]. So, let's remove this switch statement for good. [0] lore.kernel.org/amd-gfx/MN0PR12MB61013D20B8A2263B22AE1BCFE2C19@MN0PR12MB6101.namprd12.prod.outlook.com Suggested-by: Alex Deucher <Alexander.Deucher@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Cc: James Zhu <James.Zhu@amd.com> Cc: Lazar Lijo <Lijo.Lazar@amd.com> Cc: Leo Liu <leo.liu@amd.com> Cc: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2ed9e22e |
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17-Jan-2023 |
Guilherme G. Piccoli <gpiccoli@igalia.com> |
drm/amdgpu/vcn: Adjust firmware names indentation This is an incredibly trivial fix, just for the sake of "aesthetical" organization of the defines. Some were space based, most were tab based and there was a lack of "alignment", now it's all the same and aligned. Cc: James Zhu <James.Zhu@amd.com> Cc: Lazar Lijo <Lijo.Lazar@amd.com> Cc: Leo Liu <leo.liu@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
69939009 |
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28-Dec-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Load VCN microcode during early_init Simplifies the code so that all VCN versions will get the firmware name from `amdgpu_ucode_ip_version_decode` and then use this filename to load microcode as part of the early_init process. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
33efaf82 |
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03-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Use `amdgpu_ucode_*` helpers for VCN The `amdgpu_ucode_request` helper will ensure that the return code for missing firmware is -ENODEV so that early_init can fail. The `amdgpu_ucode_release` helper is for symmetry. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
58ab2c08 |
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14-Jan-2022 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: use VRAM|GTT for a bunch of kernel allocations Technically all of those can use GTT as well, no need to force things into VRAM. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6a822b7a |
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26-Sep-2022 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: add VCN poison consumption handler for SRIOV Inform host and let host handle consumption interrupt. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
82132ecc |
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29-Nov-2022 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: enable Vangogh VCN indirect sram mode So that uses PSP to initialize HW. Fixes: 0c2c02b66c672e ("drm/amdgpu/vcn: add firmware support for dimgrey_cavefish") Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2ddb629b |
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20-Oct-2022 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: define common vcn_set_ras_funcs So the code can be reused. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f7d66fb2 |
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28-Sep-2022 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup scheduler job initialization v2 Init the DRM scheduler base class while allocating the job. This makes the whole handling much more cleaner. v2: fix coding style Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221014084641.128280-7-christian.koenig@amd.com
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#
9a8cc8ca |
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29-Nov-2022 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: enable Vangogh VCN indirect sram mode So that uses PSP to initialize HW. Fixes: 0c2c02b66c672e ("drm/amdgpu/vcn: add firmware support for dimgrey_cavefish") Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
730548ba |
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28-Sep-2022 |
Sonny Jiang <sonny.jiang@amd.com> |
drm/amdgpu: Enable sram on vcn_4_0_2 Enable sram on vcn_4_0_2 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
541540b9 |
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28-Sep-2022 |
Sonny Jiang <sonny.jiang@amd.com> |
drm/amdgpu: Enable sram on vcn_4_0_2 Enable sram on vcn_4_0_2 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cbe93a23 |
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21-Jul-2022 |
Sonny Jiang <sonny.jiang@amd.com> |
drm/amdgpu: add VCN_4_0_2 firmware support Add VCN_4_0_2 firmware support Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f12d07d6 |
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22-Jun-2022 |
Ruijing Dong <ruijing.dong@amd.com> |
drm/amdgpu/vcn: fix no previous prototype warning Declare 'static', as the function is not intended to be used outside of this translation unit. Fixes: 4ed49c954e35 ("drm/amdgpu/vcn: add unified queue ib test") Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e751e4be |
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14-Jun-2022 |
Ruijing Dong <ruijing.dong@amd.com> |
drm/amdgpu/vcn: adjust unified queue code format Fixed some errors and warnings found by checkpatch.pl. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4ed49c95 |
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31-May-2022 |
Ruijing Dong <ruijing.dong@amd.com> |
drm/amdgpu/vcn: add unified queue ib test - add unified queue headers - add unified queue ib tests Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0ae99221 |
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07-May-2022 |
Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> |
drm/amdgpu/vcn: Add vcn ras poison consumption event handling Add vcn ras poison consumption event handling V2: Removed default poison consumption handling function cb Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f963052b |
|
22-Feb-2022 |
Sonny Jiang <sonjiang@amd.com> |
drm/amdgpu: Enable vcn v4_0_4 sram enable vcn v4_0_4 sram Signed-off-by: Sonny Jiang <sonjiang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fbd23b55 |
|
05-Jan-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add VCN4_0_4 firmware Add VCN4_0_4 firmware. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8da1170a |
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13-Apr-2022 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add VCN4 ip block support Add VCN 4.0 initialization and decoder/encoder ring functions. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dd481828 |
|
06-Apr-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix VCN 3.1.2 firmware name Drop the trailing vcn. Fixes: afc2f276057ea1 ("drm/amdgpu/vcn: add vcn support for vcn 3.1.2") Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e3cf2e05 |
|
06-Apr-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix VCN 3.1.2 firmware name Drop the trailing vcn. Fixes: afc2f276057ea1 ("drm/amdgpu/vcn: add vcn support for vcn 3.1.2") Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
11eb648d |
|
02-Mar-2022 |
Ruijing Dong <ruijing.dong@amd.com> |
drm/amdgpu/vcn: Add vcn firmware log vcn fwlog is for debugging purpose only, by default, it is disabled. Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b6065ebf |
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02-Mar-2022 |
Ruijing Dong <ruijing.dong@amd.com> |
drm/amdgpu/vcn: Update fw shared data structure Add fw log in fw shared data structure. Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
afc2f276 |
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28-Oct-2021 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu/vcn: add vcn support for vcn 3.1.2 Load VCN FW, set caps. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c40bdfb2 |
|
08-Dec-2021 |
Leslie Shi <Yuliang.Shi@amd.com> |
drm/amdgpu: fix incorrect VCN revision in SRIOV Guest OS will setup VCN instance 1 which is disabled as an enabled instance and execute initialization work on it, but this causes VCN ib ring test failure on the disabled VCN instance during modprobe: amdgpu 0000:00:08.0: amdgpu: ring vcn_enc_1.0 uses VM inv eng 5 on hub 1 amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_dec_0 (-110). amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_enc_0.0 (-110). [drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110). v2: drop amdgpu_discovery_get_vcn_version and rename sriov_config to vcn_config v3: modify VCN's revision in SR-IOV and bare-metal Fixes: baf3f8f3740625 ("drm/amdgpu: handle SRIOV VCN revision parsing") Signed-off-by: Leslie Shi <Yuliang.Shi@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
baf3f8f3 |
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30-Nov-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: handle SRIOV VCN revision parsing For SR-IOV, the IP discovery revision number encodes additional information. Handle that case here. v2: drop additional IP versions Reviewed-by: Guchun Chen <guchun.chen@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
981b3045 |
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23-Nov-2021 |
Jane Jian <Jane.Jian@amd.com> |
drm/amdgpu/sriov/vcn: add new vcn ip revision check case for SIENNA_CICHLID [WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
da3b36a2 |
|
23-Nov-2021 |
Jane Jian <Jane.Jian@amd.com> |
drm/amdgpu/sriov/vcn: add new vcn ip revision check case for SIENNA_CICHLID [WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4d395f93 |
|
09-Nov-2021 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: add missed support for UVD IP_VERSION(3, 0, 64) Fixes: 96b8dd4423e74d ("drm/amdgpu/amdgpu_vcn: convert to IP version checking") Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c5dd5667 |
|
19-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Consolidate VCN firmware setup code Roughly the same code was present in all VCN versions. Consolidate it into a single function. v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst >= 2 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com>
|
#
c58a863b |
|
08-Oct-2021 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: use adev_to_drm for consistency when accessing drm_device adev_to_drm is used everywhere, so improve recent changes when accessing drm_device pointer from amdgpu_device. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1d789535 |
|
04-Oct-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: convert IP version array to include instances Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
96b8dd44 |
|
04-Aug-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/amdgpu_vcn: convert to IP version checking Use IP versions rather than asic_type to differentiate IP version specific features. v2: squash in fix for navy flounder and sienna cichlid Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
405a81ae |
|
09-Sep-2021 |
xinhui pan <xinhui.pan@amd.com> |
drm/amdgpu: VCN avoid memory allocation during IB test alloc extra msg from direct IB pool. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0ad29a4e |
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27-Aug-2021 |
Satyajit Sahu <satyajit.sahu@amd.com> |
drm/amdgpu/vcn: set the priority for each encode ring VCN has multiple rings. Set the proper priority level for each encode ring while initializing. Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
416e1fab |
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18-Aug-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: drop redundant cancel_delayed_work_sync call As those _sw_fini() APIs follow just after _suspend() APIs. And the cancel_delayed_work_sync was already called in latter. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
376002f4 |
|
05-Jan-2021 |
Bokun Zhang <Bokun.Zhang@amd.com> |
drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of MMSCH In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2c1b1ac7 |
|
07-Jun-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn: drop gfxoff control for VCN2+ Drop disabling of gfxoff during VCN use. This allows gfxoff to kick in and potentially save power if the user is not using gfx for color space conversion or scaling. VCN1.0 had a bug which prevented it from working properly with gfxoff, so we disabled it while using VCN. That said, most apps today use gfx for scaling and color space conversion rather than overlay planes so it was generally in use anyway. This was fixed on VCN2+, but since we mostly use gfx for color space conversion and scaling and rapidly powering up/down gfx can negate the advantages of gfxoff, we left gfxoff disabled. As more applications use overlay planes for color space conversion and scaling, this starts to be a win, so go ahead and leave gfxoff enabled. Note that VCN1.0 uses vcn_v1_0_idle_work_handler() and vcn_v1_0_ring_begin_use() so they are not affected by this patch. Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
737a9f86 |
|
13-Jan-2021 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add vcn support for yellow carp Add vcn firmware support for yellow carp Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f89f8c6b |
|
12-May-2021 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Guard against write accesses after device removal This should prevent writing to memory or IO ranges possibly already allocated for other uses after our device is removed. v5: Protect more places wher memcopy_to/form_io takes place Protect IB submissions v6: Switch to !drm_dev_enter instead of scoping entire code with brackets. v7: Drop guard of HW ring commands emission protection since they are in GART and not in MMIO. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-10-andrey.grodzovsky@amd.com
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#
f703d4b6 |
|
10-Mar-2021 |
Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> |
drm/amdgpu: Enable VCN for Beige Goby Enabled VCN support for Beige Goby chip Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
557da413 |
|
17-Dec-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: enable dpg indirect sram mode on aldebaran Enable dpg indirect sram mode on aldebaran. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
86d848b1 |
|
03-Jun-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add Aldebaran to the VCN family including firmware support etc. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e18d9a2b |
|
08-Dec-2020 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: clean up bo in vce and vcn test BO created with amdgpu_bo_create_reserved() wasn't clean properly before, which causes: [ 21.056218] WARNING: CPU: 0 PID: 7 at drivers/gpu/drm/ttm/ttm_bo.c:518 ttm_bo_release+0x2bf/0x310 [ttm] <snip> [ 21.056430] Call Trace: [ 21.056525] amdgpu_bo_unref+0x1a/0x30 [amdgpu] [ 21.056635] amdgpu_vcn_dec_send_msg+0x1b2/0x270 [amdgpu] [ 21.056740] amdgpu_vcn_dec_get_create_msg.constprop.0+0xd8/0x100 [amdgpu] [ 21.056843] amdgpu_vcn_dec_ring_test_ib+0x27/0x180 [amdgpu] [ 21.056936] amdgpu_ib_ring_tests+0xf1/0x150 [amdgpu] [ 21.057024] amdgpu_device_delayed_init_work_handler+0x11/0x30 [amdgpu] [ 21.057030] process_one_work+0x1df/0x370 [ 21.057033] worker_thread+0x46/0x340 [ 21.057034] ? process_one_work+0x370/0x370 [ 21.057037] kthread+0x11b/0x140 [ 21.057039] ? __kthread_bind_mask+0x60/0x60 [ 21.057043] ret_from_fork+0x22/0x30 Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/406382/ Signed-off-by: Christian König <christian.koenig@amd.com>
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#
0b437e64 |
|
15-Dec-2020 |
Tom Rix <trix@redhat.com> |
drm/amdgpu: remove h from printk format specifier See Documentation/core-api/printk-formats.rst. h should no longer be used in the format specifier for printk. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bd88596f |
|
02-Nov-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add test for dec software ring Add vcn software ring decode ring test and decode ib test. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9b84ec8e |
|
18-Nov-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: refactor dec message functions refactor dec message functions to add dec software ring support. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5ce71f59 |
|
03-Nov-2020 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/amdgpu: switch on/off vcn power profile mode switch to vcn power profile mode when a video is playing. this can optimize the power/performance when the workload is on the vcn. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d83d3ad6 |
|
15-May-2020 |
Thong Thai <thong.thai@amd.com> |
drm/amdgpu: enable vcn support for green_sardine (v2) Enable Green_Sardine VCN support and VCN firmware loading v2: use apu flags Signed-off-by: Thong Thai <thong.thai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f3729f7b |
|
02-Nov-2020 |
Deepak R Varma <mh12gx2825@gmail.com> |
drm/amdgpu/amdgpu: improve code indentation and alignment General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch corrects issues for various amdgpu_*.c files for this driver. Issue reported by checkpatch script. Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ef3b2987 |
|
30-Oct-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: disable gfxoff if VCN is busy Toggle on/off gfxoff during video playback to fix gpu hang. v2: change sequence to be more compatible with original code. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
187561dd |
|
08-Oct-2020 |
Veerabadhran G <vegopala@amd.com> |
drm/amdgpu: vcn and jpeg ring synchronization Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug. Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
56380c38 |
|
08-Oct-2020 |
Veerabadhran G <vegopala@amd.com> |
drm/amdgpu: vcn and jpeg ring synchronization Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug. Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0c2c02b6 |
|
02-Oct-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add firmware support for dimgrey_cavefish Add firmware support for dimgrey_cavefish. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5d731b5a |
|
15-May-2020 |
Thong Thai <thong.thai@amd.com> |
drm/amdgpu: enable vcn support for green_sardine (v2) Enable Green_Sardine VCN support and VCN firmware loading v2: use apu flags Signed-off-by: Thong Thai <thong.thai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b4e532d6 |
|
27-Aug-2020 |
Thong Thai <thong.thai@amd.com> |
drm/amdgpu: enable vcn3.0 for van gogh Same as other VCN 3.0 asics. Signed-off-by: Thong Thai <thong.thai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4908d026 |
|
16-Jul-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: merge shared memory into vcpu Merge vcn firmware shared memory bo into vcn vcpu bo. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d10985f4 |
|
16-Jul-2020 |
James Zhu <James.Zhu@amd.com> |
Revert "drm/amdgpu/vcn: add shared memory restore after wake up from sleep." This reverts commit 21b704d78352c289d31697824ceea7ad0ff4ce59. To merge vcn firmware shared memory bo into vcn vcpu bo. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5cc07534 |
|
19-Jun-2020 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add navy_flounder vcn firmware support Add navy_flounder to vcn family Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c8466cc0 |
|
28-Jun-2020 |
Jack Zhang <Jack.Zhang1@amd.com> |
drm/amd/sriov skip vcn powergating and dec_ring_test 1.Skip decode_ring test in VF, because VCN in SRIOV does not support direct register read/write. 2.Skip powergating configuration in hw fini because VCN3.0 SRIOV doesn't support powergating. V2: delete unneccessary white lines and refine implementation. Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c0f136ee |
|
26-Mar-2020 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: set indirect sram mode for VCN3.0 Use indirect sram for secure DPG mode V2: update description. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: James Zhu <james.zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
265120ab |
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27-Sep-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add Sienna_Cichlid VCN to the VCN family By adding Sienna_Cichlid VCN firmware Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54f78a76 |
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15-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add apu flags (v2) Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4f610503 |
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11-Apr-2020 |
James Zhu <James.Zhu@amd.com> |
Revert "drm/amdgpu: Disable gfx off if VCN is busy" This reverts commit 3fded222f4bf7f4c56ef4854872a39a4de08f7a8 This is work around for vcn1 only. Currently vcn1 has separate begin_use and idle work handle. Signed-off-by: James Zhu <James.Zhu@amd.com> Tested-by: changzhu <Changfeng.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
21b704d7 |
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02-Apr-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add shared memory restore after wake up from sleep. VCN shared memory needs restore after wake up during S3 test. v2: Allocate shared memory saved_bo at sw_init and free it in sw_fini. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a500194e |
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01-Apr-2020 |
Colin Ian King <colin.king@canonical.com> |
drm/amdgpu/vcn: fix spelling mistake "fimware" -> "firmware" There is a spelling mistake in a dev_err error message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2c68f0e3 |
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29-Mar-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: Add firmware share memory support Added firmware share memory support for VCN. Current multiple queue mode is enabled only. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e3b41d82 |
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09-Feb-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: fix race condition issue for dpg unpause mode switch Couldn't only rely on enc fence to decide switching to dpg unpaude mode. Since a enc thread may not schedule a fence in time during multiple threads running situation. v3: 1. Rename enc_submission_cnt to dpg_enc_submission_cnt 2. Add dpg_enc_submission_cnt check in idle_work_handler v4: Remove extra counter check, and reduce counter before idle work schedule Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bd718638 |
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09-Feb-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: fix race condition issue for vcn start Fix race condition issue when multiple vcn starts are called. v2: Removed checking the return value of cancel_delayed_work_sync() to prevent possible races here. v3: Add total_submission_cnt to avoid gate power unexpectedly. v4: Remove extra counter check, and reduce counter before idle work schedule Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c8e42d57 |
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25-Mar-2020 |
xinhui pan <xinhui.pan@amd.com> |
drm/amdgpu: implement more ib pools (v2) We have three ib pools, they are normal, VM, direct pools. Any jobs which schedule IBs without dependence on gpu scheduler should use DIRECT pool. Any jobs schedule direct VM update IBs should use VM pool. Any other jobs use NORMAL pool. v2: squash in coding style fix Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
68430c6b |
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05-Mar-2020 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu: cleanup ring/ib test for SRIOV vcn2.0 (v2) support IB test on dec/enc ring disable ring test on dec/enc ring (MMSCH limitation) v2: squash in unused variable warning fix Singed-off-by: darlington Opara <darlington.opara@amd.com> Signed-off-by: Jinage Zhao <jiange.zhao@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0c0dab86 |
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13-Jan-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn2.5: implement indirect DPG SRAM mode Implement indirect DPG SRAM mode for vcn2.5 Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5db86843 |
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15-Jan-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: support multiple instance direct SRAM read and write (v2) Add multiple instance direct SRAM read and write support for vcn2.5 v2: squash in indexing fix Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
597e6ac3 |
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13-Jan-2020 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: support multiple-instance dpg pause mode Add multiple-instance dpg pause mode support for VCN2.5 Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8adf5d21 |
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18-Dec-2019 |
Jane Jian <Jane.Jian@amd.com> |
drm/amdgpu: disable VCN2.5 ib test for Arcturus sriov currently using TMR loading VCN fw MMSCH would fail to init after FLR, just disable ib test for temporarily daily testing, continuing debug with mm team. Signed-off-by: Jane Jian <Jane.Jian@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f06a58db |
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16-Dec-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/vcn: remove unnecessary included headers Esp. VCN1.0 headers should not be here v2: add back the <linux/module.h> to keep consistent. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5e1e89ee |
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12-Dec-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/vcn: remove JPEG related code from idle handler and begin use For VCN2.0 and above, VCN has been separated from JPEG Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d58ed707 |
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12-Dec-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/vcn1.0: use its own idle handler and begin use funcs Because VCN1.0 power management and DPG mode are managed together with JPEG1.0 under both HW and FW, so separated them from general VCN code. Also the multiple instances case got removed, since VCN1.0 HW just have a single instance. v2: override work func with vcn1.0's own Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
14f43e8f |
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11-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: move JPEG2.5 out from VCN2.5 And clean up the duplicated stuff Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0388aee7 |
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08-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: use the JPEG structure for general driver support JPEG1.0 will be functional along with VCN1.0 Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
622b2a0a |
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11-Nov-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn: finish delay work before release resources flush/cancel delayed works before doing finalization to avoid concurrently requests. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c81fffc2 |
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15-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn: fix allocation size in enc ring test We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. - Session info is 128K according to mesa - Use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241 Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
8c32d043 |
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15-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn: fix allocation size in enc ring test We need to allocate a large enough buffer for the session info, otherwise the IB test can overwrite other memory. - Session info is 128K according to mesa - Use the same session info for create and destroy Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241 Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
134b1461 |
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22-Aug-2019 |
Thong Thai <thong.thai@amd.com> |
Revert "drm/amdgpu: use direct loading on renoir vcn for the moment" This reverts commit 444a0fea5107e9ad7e3cbbafed78678489e31713. We are ready to enable it now. Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
444a0fea |
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21-Jul-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: use direct loading on renoir vcn for the moment PSP has issue for renoir, that will cause VCN fw failed to be loaded. So use direct loading for the moment till the issue is addressed. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dc9b6e93 |
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15-Jul-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: enable Renoir VCN firmware loading By adding new Renoir VCN firmware Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a3219816 |
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18-Jul-2019 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add Navi12 VCN firmware support Add Navi12 to VCN family Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7c16d24a |
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15-Jul-2019 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: correct VCN powergate routine for acturus Arcturus VCN should powergate in the way as Navi. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cd1fd7b3 |
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09-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add harvest support for Arcturus Add VCN harvest support for Arcturus Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa739f4b |
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10-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add multiple instances support for Arcturus Arcturus has dual-VCN. Need add multiple instances support for Arcturus. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c01b6a1d |
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10-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: modify amdgpu_vcn to support multiple instances Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support multiple vcns. There are no any logical changes here Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a7c0e401 |
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09-Jul-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add Arcturus to the VCN family including firmware support etc. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0377b088 |
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01-Jul-2019 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu/vcn: enable indirect DPG SRAM mode for navi14 Enable VCN dynamic powergating for navi14. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e149a2f6 |
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01-Mar-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: Enable VCN on navi14 Add navi14 vcn firmware, and enable VCN on navi14. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
450af30c |
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27-May-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/VCN: enable indirect DPG SRAM mode This is default mode for VCN2.x now Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a77b9fdf |
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24-May-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/VCN: add buffer for indirect SRAM usage This will be used later for indirect SRAM mode Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e4cb4e8 |
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18-Apr-2019 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu: enable vcn dpm scheme for navi On navi1x, vcn dpm scheme was merged into powergating scheme. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
948f540c |
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29-May-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amd/powerplay: set dpm_enabled flag but don't enable vcn dpm This patch sets dpm_enabled flag but don't enable vcn dpm, because vcn dpm doesn't work so far and we needs to enable the sysfs interfaces. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54bb93c2 |
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15-Oct-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add JPEG2.0 decode ring ib test Add internal register offset for registers involving in ib tests Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9085914a |
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03-Dec-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add JPEG2.0 decode ring test Use register from JPEG tile, the UVD tile reg won't work for JPEG Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
60a2309e |
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15-Oct-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add VCN2.0 decode ib test Add internal register offset for registers involving in ib tests Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
45a1a48b |
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17-Oct-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add VCN2.0 decode ring test Add internal register offset for registers involving in ring tests Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a8790e24 |
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15-Oct-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add Navi10 VCN firmware support Add Navi10 to VCN family Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
517b91f4 |
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04-Jun-2019 |
Shirish S <shirish.s@amd.com> |
drm/amdgpu/{uvd,vcn}: fetch ring's read_ptr after alloc [What] readptr read always returns zero, since most likely these blocks are either power or clock gated. [How] fetch rptr after amdgpu_ring_alloc() which informs the power management code that the block is about to be used and hence the gating is turned off. Signed-off-by: Louis Li <Ching-shih.Li@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
e038b901 |
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04-Jun-2019 |
Shirish S <shirish.s@amd.com> |
drm/amdgpu/{uvd,vcn}: fetch ring's read_ptr after alloc [What] readptr read always returns zero, since most likely these blocks are either power or clock gated. [How] fetch rptr after amdgpu_ring_alloc() which informs the power management code that the block is about to be used and hence the gating is turned off. Signed-off-by: Louis Li <Ching-shih.Li@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fdf2f6c5 |
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09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop use of drmP.h in amdgpu/amdgpu* Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
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#
c366be54 |
|
09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop dependencies on drm_os_linux.h Fix so no files in drm/amd/ depends on the deprecated drm_os_linux.h header file. It was done manually: - remove drm_os_linux.h from drmP.h - fix all build errros Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-3-sam@ravnborg.org
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#
9dc7b02a |
|
12-May-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: make VCN DPG pause mode detached from general VCN It should be attached to VCN 1.0 Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
9194fb22 |
|
12-Dec-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn:Remove bit 31 for scratch2 to indicate the WA is active Remove bit 31 for scratch2 to indicate the Hardware bug work around is active. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
12e8b301 |
|
12-Dec-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn:Scan enc/jpeg fences to init dpg pause new state Scan enc/jpeg fences to init dpg pause new state in begin use. It will help set dpg mode to desire state actively. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
98079389 |
|
29-Oct-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove messages from IB tests We already print an error message that an IB test failed in the common code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
dc9eeff8 |
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29-Oct-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: further ring test cleanups Move all error messages from IP specific code into the common helper. This way we now uses the ring name in the messages instead of the index and note which device is affected as well. Also cleanup error handling in the IP specific code and consequently use ETIMEDOUT when the ring test timed out. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
825da4d9 |
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02-Oct-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn:Correct VCN cache window definition Correct VCN cache window definition. The old one is reused from UVD, and it is not fully correct. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b17c5249 |
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01-Oct-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn:Replace value with defined macro Replace value with defined macro to make code more readable Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2dc4aa52 |
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02-Oct-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn:fix dpg pause mode hang issue Use mmUVD_SCRATCH2 tracking decode write point. It will help avoid dpg pause mode hang issue. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
61ea6f58 |
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27-Sep-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Fix vce work queue was not cancelled when suspend The vce cancel_delayed_work_sync never be called. driver call the function in error path. This caused the A+A suspend hang when runtime pm enebled. As we will visit the smu in the idle queue. this will cause smu hang because the dgpu has been suspend, and the dgpu also will be waked up. As the smu has been hang, so the dgpu resume will failed. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
d30e63b1 |
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26-Sep-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn: whitespace cleanup Fix some indentation issues. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bd5d5180 |
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21-Sep-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu:Add DPG pause mode support Add functions to support VCN DPG pause mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
21cbe2f3 |
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10-Sep-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu:Use register UVD_SCRATCH9 for VCN ring/ib test Use register UVD_SCRATCH9 for VCN ring/ib test. Since those registers can't be directly accessed under DPG(Dynamic Power Gate) mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
741deade |
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13-Sep-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: simplify Raven, Raven2, and Picasso handling Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8b47cc9b |
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15-Jun-2018 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu: add raven2 vcn firmware support Specify raven2 vcn firmware on amdgpu_vce_sw_init. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
86771d9a |
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10-Jul-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add picasso support for vcn Add vcn support for picasso. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3fded222 |
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27-Jul-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Disable gfx off if VCN is busy this patch is a workaround for the gpu hang at video begin/end time if gfx off is enabled. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c9533d1b |
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03-Aug-2018 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu: Use kvmalloc for allocating UVD/VCE/VCN BO backup memory The allocated size can be (at least?) as large as megabytes, and there's no need for it to be physically contiguous. May avoid spurious failures to initialize / suspend the corresponding block while there's memory pressure. Bugzilla: https://bugs.freedesktop.org/107432 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4d77c0f6 |
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09-Aug-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu:add VCN booting with firmware loaded by PSP Setup psp firmware loading for VCN, and make VCN block booting from tmr mac address. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
ee913fd9 |
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13-Jul-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add amdgpu_job_submit_direct helper Make sure that we properly initialize at least the sched member. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c1ee15b3 |
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04-Jul-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: get VCN start to process in the dpm disabled case Fixes: 22cc6c5e19 (drm/amdgpu: Add runtime VCN PG support) Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7b4e54a9 |
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09-Jul-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: Take VCN jpeg ring into account in idle work handler VCN won't get power off when only jpeg active Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
62d5b8e3 |
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19-Jun-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu:Support new VCN FW version naming convention Support new VCN FW version naming convention: [31, 28] for VEP interface major version if applicable [27, 24] for decode interface major version [23, 20] for encode interface major version [19, 12] for encode interface minor version [11, 0] for firmware revision Bit 20-23, it is encode major and non-zero for new naming convention. This field is part of version minor and DRM_DISABLED_FLAG in old naming convention. Since the latest version minor is 0x5B and DRM_DISABLED_FLAG is zero in old naming convention, this field is always zero so far. These four bits are used to tell which naming convention is present. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Fang, Peter <Peter.Fang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6173040f |
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30-May-2018 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add vcn jpeg ib test Add an ib test for vcn jpeg. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b1d37606 |
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30-May-2018 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add vcn jpeg ring test Add a ring test for vcn jpeg. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0c5e4b3e |
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30-May-2018 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add vcn jpeg sw finish Add software finish for vcn jpeg ring. v2: remove unnecessary scheduler entity. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a0b2ac29 |
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22-May-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: fix the missed vcn fw version report It missed vcn.fw_version setting when init vcn microcode, and it will be used to report vcn ucode version via amdgpu_firmware_info sysfs interface. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
4c6530fd |
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25-May-2018 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: remove unnecessary scheduler entity for VCN It should be stateless, and no need for scheduler to take care specially. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
22cc6c5e |
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16-May-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Add runtime VCN PG support Enable support for dynamically powering up/down VCN on demand. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
646e906d |
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17-May-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Take vcn encode rings into account in idle work Take the encode rings into account in the idle work handler. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8344c53f |
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29-Mar-2018 |
Nayan Deshmukh <nayan26deshmukh@gmail.com> |
drm/scheduler: remove unused parameter this patch also effect the amdgpu and etnaviv drivers which use the function drm_sched_entity_init Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Suggested-by: Christian König <christian.koenig@amd.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
add9f9a8 |
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07-Feb-2018 |
Christian König <ckoenig.leichtzumerken@gmail.com> |
drm/amdgpu: cleanup VCN IB generation Start to use amdgpu_bo_create_reserved v2. v2: Fix missing pointer init to NULL. Remove extra new lines. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8febe617 |
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24-Jan-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: revert "Add a parameter to amdgpu_bo_create()" This reverts commit 2046d46db9166bddc84778f0b3477f6d1e9068ea. Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4fd09a19 |
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29-Nov-2017 |
Shaoyun Liu <Shaoyun.Liu@amd.com> |
drm/admgpu: Reduce the usage of soc15ip.h Remove the header where it's not used. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1b1f42d8 |
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06-Dec-2017 |
Lucas Stach <l.stach@pengutronix.de> |
drm: move amd_gpu_scheduler into common location This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b1ebd7c0 |
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27-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup raven1 vcn header files. Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fb960bd2 |
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23-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup vega10 header files. Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
19be5570 |
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12-Apr-2017 |
Christian König <christian.koenig@amd.com> |
drm/ttm: add operation ctx to ttm_bo_validate v2 Give moving a BO into place an operation context to work with. v2: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9953b72f |
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25-Oct-2017 |
pding <Pixel.Ding@amd.com> |
drm/amdgpu: change redundant init logs to debug level When this VF stays in exclusive mode for long, other VFs will be impacted. The redundant messages causes exclusive mode timeout when they're redirected. That is a normal use case for cloud service to redirect guest log to virtual serial port. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: pding <Pixel.Ding@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b3eebe3d |
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22-Oct-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amd/scheduler:introduce guilty pointer member this member will be used later, it will points to the real var inside of context and CS_SUBMIT & gpu schdduler can decide if skip a job depends on context->guilty or *entity->guilty Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2046d46d |
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20-Jul-2017 |
Yong Zhao <Yong.Zhao@amd.com> |
drm/amdgpu: Add a parameter to amdgpu_bo_create() The parameter init_value contains the value to which we initialized VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
aef060e1 |
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27-Jul-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: disable vcn power control for now The dpm control for vcn has been moved to firmware, kernel always spins "amdgpu: [powerplay] pp_dpm_powergate_uvd was not implemented", each time when application runs, disable it for now till pg/cg. Also remove clock manual setting when dpm disabled, which was inherited from uvd. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3b8f5ab3 |
|
29-Mar-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: update vcn decode create msg Based on new vcn firmware interface changes Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
25547cfd |
|
08-May-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add vcn enc ib test Update and enable the vcn encode IB test. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c3bd3040 |
|
21-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: enable vcn encode ring tests Wire up the callback and enable them. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
101c6fee |
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21-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add vcn enc rings Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2d8a425b |
|
04-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu/vcn: implement ib tests with new message buffer interface Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
8c303c01 |
|
06-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: move vcn ring test to amdgpu_vcn.c Hope it will be generic for vcn later Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3e1086cf |
|
06-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: re-group the functions in amdgpu_vcn.c Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2d531d81 |
|
21-Dec-2016 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add encode tests for vcn Add encode ring and ib tests. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
95d0906f |
|
21-Dec-2016 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add initial vcn support and decode tests VCN is the new media block on Raven. Add core support and the ring and ib tests for decode. Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|