/linux-master/drivers/clk/qcom/ |
H A D | clk-alpha-pll.h | 104 * @post_div_table: table with PLL odd and even post-divider settings 116 const struct clk_div_table *post_div_table; member in struct:clk_alpha_pll_postdiv
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H A D | clk-alpha-pll.c | 1450 if (pll->post_div_table[i].val == val) { 1451 div = pll->post_div_table[i].div; 1472 if (pll->post_div_table[i].val == val) { 1473 div = pll->post_div_table[i].div; 1487 return divider_round_rate(hw, rate, prate, pll->post_div_table, 1501 if (pll->post_div_table[i].div == div) { 1502 val = pll->post_div_table[i].val; 1524 return divider_round_rate(hw, rate, prate, pll->post_div_table, 1547 if (pll->post_div_table[i].div == div) { 1548 val = pll->post_div_table[ [all...] |
H A D | lpassaudiocc-sc7280.c | 105 .post_div_table = post_div_table_lpass_audio_cc_pll_out_aux2, 160 .post_div_table = post_div_table_lpass_aon_cc_pll_out_even, 182 .post_div_table = post_div_table_lpass_aon_cc_pll_out_odd,
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H A D | gpucc-sm6115.c | 90 .post_div_table = post_div_table_gpu_cc_pll0_out_aux2, 145 .post_div_table = post_div_table_gpu_cc_pll1_out_aux,
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H A D | gpucc-msm8998.c | 80 .post_div_table = post_div_table_fabia_even,
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H A D | camcc-sc7280.c | 85 .post_div_table = post_div_table_cam_cc_pll0_out_even, 108 .post_div_table = post_div_table_cam_cc_pll0_out_odd, 160 .post_div_table = post_div_table_cam_cc_pll1_out_even, 210 .post_div_table = post_div_table_cam_cc_pll2_out_aux, 233 .post_div_table = post_div_table_cam_cc_pll2_out_aux2, 285 .post_div_table = post_div_table_cam_cc_pll3_out_even, 337 .post_div_table = post_div_table_cam_cc_pll4_out_even, 389 .post_div_table = post_div_table_cam_cc_pll5_out_even, 441 .post_div_table = post_div_table_cam_cc_pll6_out_even, 464 .post_div_table [all...] |
H A D | camcc-sm8450.c | 92 .post_div_table = post_div_table_cam_cc_pll0_out_even, 115 .post_div_table = post_div_table_cam_cc_pll0_out_odd, 163 .post_div_table = post_div_table_cam_cc_pll1_out_even, 234 .post_div_table = post_div_table_cam_cc_pll3_out_even, 282 .post_div_table = post_div_table_cam_cc_pll4_out_even, 330 .post_div_table = post_div_table_cam_cc_pll5_out_even, 378 .post_div_table = post_div_table_cam_cc_pll6_out_even, 426 .post_div_table = post_div_table_cam_cc_pll7_out_even, 474 .post_div_table = post_div_table_cam_cc_pll8_out_even,
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H A D | camcc-sc8280xp.c | 94 .post_div_table = post_div_table_camcc_pll0_out_even, 116 .post_div_table = post_div_table_camcc_pll0_out_odd, 169 .post_div_table = post_div_table_camcc_pll1_out_even, 247 .post_div_table = post_div_table_camcc_pll3_out_even, 300 .post_div_table = post_div_table_camcc_pll4_out_even, 353 .post_div_table = post_div_table_camcc_pll5_out_even, 406 .post_div_table = post_div_table_camcc_pll6_out_even, 459 .post_div_table = post_div_table_camcc_pll7_out_even, 481 .post_div_table = post_div_table_camcc_pll7_out_odd,
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H A D | camcc-sm8250.c | 79 .post_div_table = post_div_table_cam_cc_pll0_out_even, 102 .post_div_table = post_div_table_cam_cc_pll0_out_odd, 153 .post_div_table = post_div_table_cam_cc_pll1_out_even, 204 .post_div_table = post_div_table_cam_cc_pll2_out_main, 255 .post_div_table = post_div_table_cam_cc_pll3_out_even, 306 .post_div_table = post_div_table_cam_cc_pll4_out_even,
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H A D | camcc-sm8550.c | 100 .post_div_table = post_div_table_cam_cc_pll0_out_even, 123 .post_div_table = post_div_table_cam_cc_pll0_out_odd, 177 .post_div_table = post_div_table_cam_cc_pll1_out_even, 258 .post_div_table = post_div_table_cam_cc_pll3_out_even, 312 .post_div_table = post_div_table_cam_cc_pll4_out_even, 366 .post_div_table = post_div_table_cam_cc_pll5_out_even, 420 .post_div_table = post_div_table_cam_cc_pll6_out_even, 474 .post_div_table = post_div_table_cam_cc_pll7_out_even, 528 .post_div_table = post_div_table_cam_cc_pll8_out_even, 582 .post_div_table [all...] |
H A D | mmcc-msm8998.c | 76 .post_div_table = post_div_table_fabia_even, 108 .post_div_table = post_div_table_fabia_even, 136 .post_div_table = post_div_table_fabia_even, 164 .post_div_table = post_div_table_fabia_even, 192 .post_div_table = post_div_table_fabia_even, 220 .post_div_table = post_div_table_fabia_even, 248 .post_div_table = post_div_table_fabia_even, 276 .post_div_table = post_div_table_fabia_even,
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H A D | lpasscorecc-sc7280.c | 73 .post_div_table = post_div_table_lpass_core_cc_dig_pll_out_odd,
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H A D | camcc-sdm845.c | 52 .post_div_table = post_div_table_fabia_even, 84 .post_div_table = post_div_table_fabia_even, 116 .post_div_table = post_div_table_fabia_even, 148 .post_div_table = post_div_table_fabia_even,
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H A D | camcc-x1e80100.c | 93 .post_div_table = post_div_table_cam_cc_pll0_out_even, 116 .post_div_table = post_div_table_cam_cc_pll0_out_odd, 170 .post_div_table = post_div_table_cam_cc_pll1_out_even, 251 .post_div_table = post_div_table_cam_cc_pll3_out_even, 305 .post_div_table = post_div_table_cam_cc_pll4_out_even, 359 .post_div_table = post_div_table_cam_cc_pll6_out_even, 413 .post_div_table = post_div_table_cam_cc_pll8_out_even,
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H A D | dispcc-sm6115.c | 81 .post_div_table = post_div_table_disp_cc_pll0_out_main,
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H A D | lpasscorecc-sc7180.c | 89 .post_div_table = post_div_table_lpass_lpaaudio_dig_pll_out_odd,
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H A D | gcc-sm6115.c | 84 .post_div_table = post_div_table_gpll0_out_aux2, 104 .post_div_table = post_div_table_gpll0_out_main, 154 .post_div_table = post_div_table_gpll10_out_main, 208 .post_div_table = post_div_table_gpll11_out_main, 267 .post_div_table = post_div_table_gpll4_out_main, 306 .post_div_table = post_div_table_gpll6_out_main, 345 .post_div_table = post_div_table_gpll7_out_main, 402 .post_div_table = post_div_table_gpll8_out_main, 454 .post_div_table = post_div_table_gpll9_out_main,
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H A D | gcc-qcm2290.c | 82 .post_div_table = post_div_table_gpll0_out_aux2, 199 .post_div_table = post_div_table_gpll3_out_main, 270 .post_div_table = post_div_table_gpll6_out_main, 343 .post_div_table = post_div_table_gpll8_out_main, 395 .post_div_table = post_div_table_gpll9_out_main,
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H A D | camcc-sm6350.c | 76 .post_div_table = post_div_table_camcc_pll0_out_even, 128 .post_div_table = post_div_table_camcc_pll1_out_even, 194 .post_div_table = post_div_table_camcc_pll2_out_main,
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/linux-master/drivers/clk/imx/ |
H A D | clk-imx6sll.c | 59 static const struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 176 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 180 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
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H A D | clk-imx6sl.c | 80 static const struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 267 hws[IMX6SL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 269 hws[IMX6SL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
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H A D | clk-imx6ul.c | 83 static const struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 233 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 237 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
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H A D | clk-imx6sx.c | 96 static const struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 249 CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 253 CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
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H A D | clk-imx6q.c | 104 static struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 467 post_div_table[1].div = 1; 468 post_div_table[2].div = 1; 598 hws[IMX6QDL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); 603 hws[IMX6QDL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
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H A D | clk-imx7d.c | 36 static const struct clk_div_table post_div_table[] = { variable in typeref:struct:clk_div_table 434 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); 438 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock);
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