Searched defs:reg_offset (Results 126 - 150 of 218) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsoc15.c380 soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset) argument
397 soc15_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) argument
412 soc15_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) argument
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H A Dsdma_v5_0.c1530 u32 reg_offset = (type == AMDGPU_SDMA_IRQ_INSTANCE0) ? local
H A Dsdma_v5_2.c1383 u32 reg_offset = sdma_v5_2_get_reg_offset(adev, type, mmSDMA0_CNTL); local
H A Dsdma_v6_0.c1410 u32 reg_offset = sdma_v6_0_get_reg_offset(adev, type, regSDMA0_CNTL); local
H A Damdgpu_debugfs.c2033 char reg_offset[12]; local
2066 char reg_offset[11]; local
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H A Damdgpu_amdkfd_gfx_v10.c1024 kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev, uint32_t wait_times, uint32_t grace_period, uint32_t *reg_offset, uint32_t *reg_data) argument
H A Dmmsch_v2_0.h245 uint32_t reg_offset : 28; member in struct:mmsch_v2_0_cmd_direct_reg_header
250 uint32_t reg_offset : 20; member in struct:mmsch_v2_0_cmd_indirect_reg_header
281 mmsch_v2_0_insert_direct_wt(struct mmsch_v2_0_cmd_direct_write *direct_wt, uint32_t *init_table, uint32_t reg_offset, uint32_t value) argument
291 mmsch_v2_0_insert_direct_rd_mod_wt(struct mmsch_v2_0_cmd_direct_read_modify_write *direct_rd_mod_wt, uint32_t *init_table, uint32_t reg_offset, uint32_t mask, uint32_t data) argument
303 mmsch_v2_0_insert_direct_poll(struct mmsch_v2_0_cmd_direct_polling *direct_poll, uint32_t *init_table, uint32_t reg_offset, uint32_t mask, uint32_t wait) argument
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/linux-master/drivers/staging/media/tegra-video/
H A Dtegra20.c232 const unsigned long reg_offset = 0x42c; local
/linux-master/sound/soc/codecs/
H A Dwm8995.c1800 int reg_offset, ret; local
/linux-master/drivers/clk/nxp/
H A Dclk-lpc18xx-cgu.c261 u8 reg_offset; member in struct:lpc18xx_cgu_pll_clk
/linux-master/drivers/perf/hisilicon/
H A Dhisi_pcie_pmu.c179 static u32 hisi_pcie_pmu_readl(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, argument
187 static void hisi_pcie_pmu_writel(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx, u32 val) argument
194 static u64 hisi_pcie_pmu_readq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx) argument
201 static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx, u64 val) argument
/linux-master/drivers/net/ethernet/natsemi/
H A Dsonic.h300 int reg_offset; member in struct:sonic_local
/linux-master/drivers/net/wireless/intel/iwlegacy/
H A D3945.c2567 u32 reg_offset; local
/linux-master/drivers/gpu/drm/amd/include/
H A Dmes_api_def.h517 uint32_t reg_offset; member in struct:MODIFY_REG
/linux-master/sound/soc/fsl/
H A Dfsl_sai.h238 unsigned int reg_offset; member in struct:fsl_sai_soc_data
/linux-master/drivers/mmc/host/
H A Domap_hsmmc.c210 u32 reg_offset; member in struct:omap_mmc_of_data
/linux-master/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dmac.c142 u32 val, reg_offset; local
/linux-master/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c987 u32 val, reg_val, reg_offset = LPC18XX_SCU_PINTSEL0; local
/linux-master/drivers/net/wireless/ath/ath5k/
H A Dbase.c231 static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset) argument
237 static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) argument
/linux-master/drivers/pci/
H A Dpci-acpi.c424 u16 reg_offset; member in struct:hpx_type3
/linux-master/drivers/pci/controller/
H A Dpcie-iproc.c404 static inline bool iproc_pcie_reg_is_invalid(u16 reg_offset) argument
/linux-master/drivers/mtd/nand/raw/
H A Drockchip-nand-controller.c336 int reg_offset = nfc->band_offset; local
/linux-master/drivers/input/touchscreen/
H A Dedt-ft5x06.c101 int reg_offset; member in struct:edt_reg_addr
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/linux-master/drivers/net/ethernet/intel/idpf/
H A Didpf.h714 idpf_get_reg_addr(struct idpf_adapter *adapter, resource_size_t reg_offset) argument
/linux-master/drivers/soc/qcom/
H A Dllcc-qcom.c136 const u32 *reg_offset; member in struct:qcom_llcc_config
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