1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Header file for sonic.c
4 *
5 * (C) Waldorf Electronics, Germany
6 * Written by Andreas Busse
7 *
8 * NOTE: most of the structure definitions here are endian dependent.
9 * If you want to use this driver on big endian machines, the data
10 * and pad structure members must be exchanged. Also, the structures
11 * need to be changed accordingly to the bus size.
12 *
13 * 981229 MSch:	did just that for the 68k Mac port (32 bit, big endian)
14 *
15 * 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction
16 * does not cope with 16-bit bus sizes very well.  Therefore I have
17 * rewritten it with ugly macros and evil inlines.
18 *
19 * 050625 Finn Thain: introduced more 32-bit cards and dhd's support
20 *        for 16-bit cards (from the mac68k project).
21 */
22
23#ifndef SONIC_H
24#define SONIC_H
25
26
27/*
28 * SONIC register offsets
29 */
30
31#define SONIC_CMD              0x00
32#define SONIC_DCR              0x01
33#define SONIC_RCR              0x02
34#define SONIC_TCR              0x03
35#define SONIC_IMR              0x04
36#define SONIC_ISR              0x05
37
38#define SONIC_UTDA             0x06
39#define SONIC_CTDA             0x07
40
41#define SONIC_URDA             0x0d
42#define SONIC_CRDA             0x0e
43#define SONIC_EOBC             0x13
44#define SONIC_URRA             0x14
45#define SONIC_RSA              0x15
46#define SONIC_REA              0x16
47#define SONIC_RRP              0x17
48#define SONIC_RWP              0x18
49#define SONIC_RSC              0x2b
50
51#define SONIC_CEP              0x21
52#define SONIC_CAP2             0x22
53#define SONIC_CAP1             0x23
54#define SONIC_CAP0             0x24
55#define SONIC_CE               0x25
56#define SONIC_CDP              0x26
57#define SONIC_CDC              0x27
58
59#define SONIC_WT0              0x29
60#define SONIC_WT1              0x2a
61
62#define SONIC_SR               0x28
63
64
65/* test-only registers */
66
67#define SONIC_TPS		0x08
68#define SONIC_TFC		0x09
69#define SONIC_TSA0		0x0a
70#define SONIC_TSA1		0x0b
71#define SONIC_TFS		0x0c
72
73#define SONIC_CRBA0		0x0f
74#define SONIC_CRBA1		0x10
75#define SONIC_RBWC0		0x11
76#define SONIC_RBWC1		0x12
77#define SONIC_TTDA		0x20
78#define SONIC_MDT		0x2f
79
80#define SONIC_TRBA0		0x19
81#define SONIC_TRBA1		0x1a
82#define SONIC_TBWC0		0x1b
83#define SONIC_TBWC1		0x1c
84#define SONIC_LLFA		0x1f
85
86#define SONIC_ADDR0		0x1d
87#define SONIC_ADDR1		0x1e
88
89/*
90 * Error counters
91 */
92
93#define SONIC_CRCT              0x2c
94#define SONIC_FAET              0x2d
95#define SONIC_MPT               0x2e
96
97#define SONIC_DCR2              0x3f
98
99/*
100 * SONIC command bits
101 */
102
103#define SONIC_CR_LCAM           0x0200
104#define SONIC_CR_RRRA           0x0100
105#define SONIC_CR_RST            0x0080
106#define SONIC_CR_ST             0x0020
107#define SONIC_CR_STP            0x0010
108#define SONIC_CR_RXEN           0x0008
109#define SONIC_CR_RXDIS          0x0004
110#define SONIC_CR_TXP            0x0002
111#define SONIC_CR_HTX            0x0001
112
113#define SONIC_CR_ALL (SONIC_CR_LCAM | SONIC_CR_RRRA | \
114		      SONIC_CR_RXEN | SONIC_CR_TXP)
115
116/*
117 * SONIC data configuration bits
118 */
119
120#define SONIC_DCR_EXBUS         0x8000
121#define SONIC_DCR_LBR           0x2000
122#define SONIC_DCR_PO1           0x1000
123#define SONIC_DCR_PO0           0x0800
124#define SONIC_DCR_SBUS          0x0400
125#define SONIC_DCR_USR1          0x0200
126#define SONIC_DCR_USR0          0x0100
127#define SONIC_DCR_WC1           0x0080
128#define SONIC_DCR_WC0           0x0040
129#define SONIC_DCR_DW            0x0020
130#define SONIC_DCR_BMS           0x0010
131#define SONIC_DCR_RFT1          0x0008
132#define SONIC_DCR_RFT0          0x0004
133#define SONIC_DCR_TFT1          0x0002
134#define SONIC_DCR_TFT0          0x0001
135
136/*
137 * Constants for the SONIC receive control register.
138 */
139
140#define SONIC_RCR_ERR           0x8000
141#define SONIC_RCR_RNT           0x4000
142#define SONIC_RCR_BRD           0x2000
143#define SONIC_RCR_PRO           0x1000
144#define SONIC_RCR_AMC           0x0800
145#define SONIC_RCR_LB1           0x0400
146#define SONIC_RCR_LB0           0x0200
147
148#define SONIC_RCR_MC            0x0100
149#define SONIC_RCR_BC            0x0080
150#define SONIC_RCR_LPKT          0x0040
151#define SONIC_RCR_CRS           0x0020
152#define SONIC_RCR_COL           0x0010
153#define SONIC_RCR_CRCR          0x0008
154#define SONIC_RCR_FAER          0x0004
155#define SONIC_RCR_LBK           0x0002
156#define SONIC_RCR_PRX           0x0001
157
158#define SONIC_RCR_LB_OFF        0
159#define SONIC_RCR_LB_MAC        SONIC_RCR_LB0
160#define SONIC_RCR_LB_ENDEC      SONIC_RCR_LB1
161#define SONIC_RCR_LB_TRANS      (SONIC_RCR_LB0 | SONIC_RCR_LB1)
162
163/* default RCR setup */
164
165#define SONIC_RCR_DEFAULT       (SONIC_RCR_BRD)
166
167
168/*
169 * SONIC Transmit Control register bits
170 */
171
172#define SONIC_TCR_PINTR         0x8000
173#define SONIC_TCR_POWC          0x4000
174#define SONIC_TCR_CRCI          0x2000
175#define SONIC_TCR_EXDIS         0x1000
176#define SONIC_TCR_EXD           0x0400
177#define SONIC_TCR_DEF           0x0200
178#define SONIC_TCR_NCRS          0x0100
179#define SONIC_TCR_CRLS          0x0080
180#define SONIC_TCR_EXC           0x0040
181#define SONIC_TCR_OWC           0x0020
182#define SONIC_TCR_PMB           0x0008
183#define SONIC_TCR_FU            0x0004
184#define SONIC_TCR_BCM           0x0002
185#define SONIC_TCR_PTX           0x0001
186
187#define SONIC_TCR_DEFAULT       0x0000
188
189/*
190 * Constants for the SONIC_INTERRUPT_MASK and
191 * SONIC_INTERRUPT_STATUS registers.
192 */
193
194#define SONIC_INT_BR		0x4000
195#define SONIC_INT_HBL		0x2000
196#define SONIC_INT_LCD		0x1000
197#define SONIC_INT_PINT		0x0800
198#define SONIC_INT_PKTRX		0x0400
199#define SONIC_INT_TXDN		0x0200
200#define SONIC_INT_TXER		0x0100
201#define SONIC_INT_TC		0x0080
202#define SONIC_INT_RDE		0x0040
203#define SONIC_INT_RBE		0x0020
204#define SONIC_INT_RBAE		0x0010
205#define SONIC_INT_CRC		0x0008
206#define SONIC_INT_FAE		0x0004
207#define SONIC_INT_MP		0x0002
208#define SONIC_INT_RFO		0x0001
209
210
211/*
212 * The interrupts we allow.
213 */
214
215#define SONIC_IMR_DEFAULT     ( SONIC_INT_BR | \
216                                SONIC_INT_LCD | \
217                                SONIC_INT_RFO | \
218                                SONIC_INT_PKTRX | \
219                                SONIC_INT_TXDN | \
220                                SONIC_INT_TXER | \
221                                SONIC_INT_RDE | \
222                                SONIC_INT_RBAE | \
223                                SONIC_INT_CRC | \
224                                SONIC_INT_FAE | \
225                                SONIC_INT_MP)
226
227
228#define SONIC_EOL       0x0001
229#define CAM_DESCRIPTORS 16
230
231/* Offsets in the various DMA buffers accessed by the SONIC */
232
233#define SONIC_BITMODE16 0
234#define SONIC_BITMODE32 1
235#define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2)
236/* Note!  These are all measured in bus-size units, so use SONIC_BUS_SCALE */
237#define SIZEOF_SONIC_RR 4
238#define SONIC_RR_BUFADR_L  0
239#define SONIC_RR_BUFADR_H  1
240#define SONIC_RR_BUFSIZE_L 2
241#define SONIC_RR_BUFSIZE_H 3
242
243#define SIZEOF_SONIC_RD 7
244#define SONIC_RD_STATUS   0
245#define SONIC_RD_PKTLEN   1
246#define SONIC_RD_PKTPTR_L 2
247#define SONIC_RD_PKTPTR_H 3
248#define SONIC_RD_SEQNO    4
249#define SONIC_RD_LINK     5
250#define SONIC_RD_IN_USE   6
251
252#define SIZEOF_SONIC_TD 8
253#define SONIC_TD_STATUS       0
254#define SONIC_TD_CONFIG       1
255#define SONIC_TD_PKTSIZE      2
256#define SONIC_TD_FRAG_COUNT   3
257#define SONIC_TD_FRAG_PTR_L   4
258#define SONIC_TD_FRAG_PTR_H   5
259#define SONIC_TD_FRAG_SIZE    6
260#define SONIC_TD_LINK         7
261
262#define SIZEOF_SONIC_CD 4
263#define SONIC_CD_ENTRY_POINTER 0
264#define SONIC_CD_CAP0          1
265#define SONIC_CD_CAP1          2
266#define SONIC_CD_CAP2          3
267
268#define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1)
269#define SONIC_CDA_CAM_ENABLE   (CAM_DESCRIPTORS * SIZEOF_SONIC_CD)
270
271/*
272 * Some tunables for the buffer areas. Power of 2 is required
273 * the current driver uses one receive buffer for each descriptor.
274 *
275 * MSch: use more buffer space for the slow m68k Macs!
276 */
277#define SONIC_NUM_RRS   16            /* number of receive resources */
278#define SONIC_NUM_RDS   SONIC_NUM_RRS /* number of receive descriptors */
279#define SONIC_NUM_TDS   16            /* number of transmit descriptors */
280
281#define SONIC_RRS_MASK  (SONIC_NUM_RRS - 1)
282#define SONIC_RDS_MASK  (SONIC_NUM_RDS - 1)
283#define SONIC_TDS_MASK  (SONIC_NUM_TDS - 1)
284
285#define SONIC_RBSIZE	1520          /* size of one resource buffer */
286
287/* Again, measured in bus size units! */
288#define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA	\
289	+ (SIZEOF_SONIC_TD * SONIC_NUM_TDS)	\
290	+ (SIZEOF_SONIC_RD * SONIC_NUM_RDS)	\
291	+ (SIZEOF_SONIC_RR * SONIC_NUM_RRS))
292
293/* Information that need to be kept for each board. */
294struct sonic_local {
295	/* Bus size.  0 == 16 bits, 1 == 32 bits. */
296	int dma_bitmode;
297	/* Register offset within the longword (independent of endianness,
298	   and varies from one type of Macintosh SONIC to another
299	   (Aarrgh)) */
300	int reg_offset;
301	void *descriptors;
302	/* Crud.  These areas have to be within the same 64K.  Therefore
303       we allocate a desriptors page, and point these to places within it. */
304	void *cda;  /* CAM descriptor area */
305	void *tda;  /* Transmit descriptor area */
306	void *rra;  /* Receive resource area */
307	void *rda;  /* Receive descriptor area */
308	struct sk_buff* volatile rx_skb[SONIC_NUM_RRS];	/* packets to be received */
309	struct sk_buff* volatile tx_skb[SONIC_NUM_TDS];	/* packets to be transmitted */
310	unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */
311	/* Logical DMA addresses on MIPS, bus addresses on m68k
312	 * (so "laddr" is a bit misleading) */
313	dma_addr_t descriptors_laddr;
314	u32 cda_laddr;              /* logical DMA address of CDA */
315	u32 tda_laddr;              /* logical DMA address of TDA */
316	u32 rra_laddr;              /* logical DMA address of RRA */
317	u32 rda_laddr;              /* logical DMA address of RDA */
318	dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */
319	dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */
320	unsigned int cur_rx;
321	unsigned int cur_tx;           /* first unacked transmit packet */
322	unsigned int eol_rx;
323	unsigned int eol_tx;           /* last unacked transmit packet */
324	int msg_enable;
325	struct device *device;         /* generic device */
326	struct net_device_stats stats;
327	spinlock_t lock;
328};
329
330#define TX_TIMEOUT (3 * HZ)
331
332/* Index to functions, as function prototypes. */
333
334static int sonic_open(struct net_device *dev);
335static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev);
336static irqreturn_t sonic_interrupt(int irq, void *dev_id);
337static void sonic_rx(struct net_device *dev);
338static int sonic_close(struct net_device *dev);
339static struct net_device_stats *sonic_get_stats(struct net_device *dev);
340static void sonic_multicast_list(struct net_device *dev);
341static int sonic_init(struct net_device *dev, bool may_sleep);
342static void sonic_tx_timeout(struct net_device *dev, unsigned int txqueue);
343static void sonic_msg_init(struct net_device *dev);
344static int sonic_alloc_descriptors(struct net_device *dev);
345
346/* Internal inlines for reading/writing DMA buffers.  Note that bus
347   size and endianness matter here, whereas they don't for registers,
348   as far as we can tell. */
349/* OpenBSD calls this "SWO".  I'd like to think that sonic_buf_put()
350   is a much better name. */
351static inline void sonic_buf_put(u16 *base, int bitmode,
352				 int offset, __u16 val)
353{
354	if (bitmode)
355#ifdef __BIG_ENDIAN
356		__raw_writew(val, base + (offset * 2) + 1);
357#else
358		__raw_writew(val, base + (offset * 2) + 0);
359#endif
360	else
361		__raw_writew(val, base + (offset * 1) + 0);
362}
363
364static inline __u16 sonic_buf_get(u16 *base, int bitmode,
365				  int offset)
366{
367	if (bitmode)
368#ifdef __BIG_ENDIAN
369		return __raw_readw(base + (offset * 2) + 1);
370#else
371		return __raw_readw(base + (offset * 2) + 0);
372#endif
373	else
374		return __raw_readw(base + (offset * 1) + 0);
375}
376
377/* Inlines that you should actually use for reading/writing DMA buffers */
378static inline void sonic_cda_put(struct net_device* dev, int entry,
379				 int offset, __u16 val)
380{
381	struct sonic_local *lp = netdev_priv(dev);
382	sonic_buf_put(lp->cda, lp->dma_bitmode,
383		      (entry * SIZEOF_SONIC_CD) + offset, val);
384}
385
386static inline __u16 sonic_cda_get(struct net_device* dev, int entry,
387				  int offset)
388{
389	struct sonic_local *lp = netdev_priv(dev);
390	return sonic_buf_get(lp->cda, lp->dma_bitmode,
391			     (entry * SIZEOF_SONIC_CD) + offset);
392}
393
394static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val)
395{
396	struct sonic_local *lp = netdev_priv(dev);
397	sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val);
398}
399
400static inline __u16 sonic_get_cam_enable(struct net_device* dev)
401{
402	struct sonic_local *lp = netdev_priv(dev);
403	return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE);
404}
405
406static inline void sonic_tda_put(struct net_device* dev, int entry,
407				 int offset, __u16 val)
408{
409	struct sonic_local *lp = netdev_priv(dev);
410	sonic_buf_put(lp->tda, lp->dma_bitmode,
411		      (entry * SIZEOF_SONIC_TD) + offset, val);
412}
413
414static inline __u16 sonic_tda_get(struct net_device* dev, int entry,
415				  int offset)
416{
417	struct sonic_local *lp = netdev_priv(dev);
418	return sonic_buf_get(lp->tda, lp->dma_bitmode,
419			     (entry * SIZEOF_SONIC_TD) + offset);
420}
421
422static inline void sonic_rda_put(struct net_device* dev, int entry,
423				 int offset, __u16 val)
424{
425	struct sonic_local *lp = netdev_priv(dev);
426	sonic_buf_put(lp->rda, lp->dma_bitmode,
427		      (entry * SIZEOF_SONIC_RD) + offset, val);
428}
429
430static inline __u16 sonic_rda_get(struct net_device* dev, int entry,
431				  int offset)
432{
433	struct sonic_local *lp = netdev_priv(dev);
434	return sonic_buf_get(lp->rda, lp->dma_bitmode,
435			     (entry * SIZEOF_SONIC_RD) + offset);
436}
437
438static inline void sonic_rra_put(struct net_device* dev, int entry,
439				 int offset, __u16 val)
440{
441	struct sonic_local *lp = netdev_priv(dev);
442	sonic_buf_put(lp->rra, lp->dma_bitmode,
443		      (entry * SIZEOF_SONIC_RR) + offset, val);
444}
445
446static inline __u16 sonic_rra_get(struct net_device* dev, int entry,
447				  int offset)
448{
449	struct sonic_local *lp = netdev_priv(dev);
450	return sonic_buf_get(lp->rra, lp->dma_bitmode,
451			     (entry * SIZEOF_SONIC_RR) + offset);
452}
453
454static inline u16 sonic_rr_addr(struct net_device *dev, int entry)
455{
456	struct sonic_local *lp = netdev_priv(dev);
457
458	return lp->rra_laddr +
459	       entry * SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
460}
461
462static inline u16 sonic_rr_entry(struct net_device *dev, u16 addr)
463{
464	struct sonic_local *lp = netdev_priv(dev);
465
466	return (addr - (u16)lp->rra_laddr) / (SIZEOF_SONIC_RR *
467					      SONIC_BUS_SCALE(lp->dma_bitmode));
468}
469
470static const char version[] =
471    "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";
472
473#endif /* SONIC_H */
474