Searched defs:DL (Results 426 - 450 of 460) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp696 static Constant *stripAndComputeConstantOffsets(const DataLayout &DL, Value *&V, argument
717 static Constant *computePointerDifference(const DataLayout &DL, Value *LHS, argument
2405 computePointerICmp(const DataLayout &DL, const TargetLibraryInfo *TLI, const DominatorTree *DT, CmpInst::Predicate Pred, AssumptionCache *AC, const Instruction *CxtI, const InstrInfoQuery &IIQ, Value *LHS, Value *RHS) argument
5106 SimplifyRelativeLoad(Constant *Ptr, Constant *Offset, const DataLayout &DL) argument
5683 const DataLayout &DL = I->getModule()->getDataLayout(); local
5764 getBestSimplifyQuery(LoopStandardAnalysisResults &AR, const DataLayout &DL) argument
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H A DValueTracking.cpp89 static unsigned getBitWidth(Type *Ty, const DataLayout &DL) { argument
103 const DataLayout &DL; member in struct:__anon3401::Query
127 Query(const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, argument
222 computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, OptimizationRemarkEmitter *ORE, bool UseInstrInfo) argument
231 computeKnownBits(const Value *V, const APInt &DemandedElts, KnownBits &Known, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, OptimizationRemarkEmitter *ORE, bool UseInstrInfo) argument
246 computeKnownBits(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, OptimizationRemarkEmitter *ORE, bool UseInstrInfo) argument
256 computeKnownBits(const Value *V, const APInt &DemandedElts, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, OptimizationRemarkEmitter *ORE, bool UseInstrInfo) argument
267 haveNoCommonBitsSet(const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
306 isKnownToBeAPowerOfTwo(const Value *V, const DataLayout &DL, bool OrZero, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
319 isKnownNonZero(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
326 isKnownNonNegative(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
335 isKnownPositive(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
347 isKnownNegative(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
357 isKnownNonEqual(const Value *V1, const Value *V2, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
369 MaskedValueIsZero(const Value *V, const APInt &Mask, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
393 ComputeNumSignBits(const Value *V, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
3612 isBytewiseValue(Value *V, const DataLayout &DL) argument
3943 const DataLayout &DL = GV->getParent()->getDataLayout(); local
4145 GetUnderlyingObject(Value *V, const DataLayout &DL, unsigned MaxLookup) argument
4191 GetUnderlyingObjects(const Value *V, SmallVectorImpl<const Value *> &Objects, const DataLayout &DL, LoopInfo *LI, unsigned MaxLookup) argument
4264 getUnderlyingObjectsForCodeGen(const Value *V, SmallVectorImpl<Value *> &Objects, const DataLayout &DL) argument
4368 const DataLayout &DL = LI->getModule()->getDataLayout(); local
4426 computeConstantRangeIncludingKnownBits( const Value *V, bool ForSigned, const DataLayout &DL, unsigned Depth, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, OptimizationRemarkEmitter *ORE = nullptr, bool UseInstrInfo = true) argument
4439 computeOverflowForUnsignedMul( const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
4453 computeOverflowForSignedMul(const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
4495 computeOverflowForUnsignedAdd( const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT, bool UseInstrInfo) argument
4508 computeOverflowForSignedAdd(const Value *LHS, const Value *RHS, const AddOperator *Add, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT) argument
4571 computeOverflowForUnsignedSub(const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT) argument
4594 computeOverflowForSignedSub(const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT) argument
4861 computeOverflowForSignedAdd(const AddOperator *Add, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT) argument
4870 computeOverflowForSignedAdd(const Value *LHS, const Value *RHS, const DataLayout &DL, AssumptionCache *AC, const Instruction *CxtI, const DominatorTree *DT) argument
5793 isTruePredicate(CmpInst::Predicate Pred, const Value *LHS, const Value *RHS, const DataLayout &DL, unsigned Depth) argument
5854 isImpliedCondOperands(CmpInst::Predicate Pred, const Value *ALHS, const Value *ARHS, const Value *BLHS, const Value *BRHS, const DataLayout &DL, unsigned Depth) argument
5929 isImpliedCondICmps(const ICmpInst *LHS, CmpInst::Predicate BPred, const Value *BLHS, const Value *BRHS, const DataLayout &DL, bool LHSIsTrue, unsigned Depth) argument
5973 isImpliedCondAndOr(const BinaryOperator *LHS, CmpInst::Predicate RHSPred, const Value *RHSOp0, const Value *RHSOp1, const DataLayout &DL, bool LHSIsTrue, unsigned Depth) argument
6003 isImpliedCondition(const Value *LHS, CmpInst::Predicate RHSPred, const Value *RHSOp0, const Value *RHSOp1, const DataLayout &DL, bool LHSIsTrue, unsigned Depth) argument
6042 isImpliedCondition(const Value *LHS, const Value *RHS, const DataLayout &DL, bool LHSIsTrue, unsigned Depth) argument
6088 isImpliedByDomCondition(const Value *Cond, const Instruction *ContextI, const DataLayout &DL) argument
6098 isImpliedByDomCondition(CmpInst::Predicate Pred, const Value *LHS, const Value *RHS, const Instruction *ContextI, const DataLayout &DL) argument
6437 getOffsetFromIndex(const GEPOperator *GEP, unsigned Idx, const DataLayout &DL) argument
6469 isPointerOffset(const Value *Ptr1, const Value *Ptr2, const DataLayout &DL) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Bitcode/Writer/
H A DBitcodeWriter.cpp1171 const std::string &DL = M.getDataLayoutStr(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DCodeViewDebug.cpp515 void CodeViewDebug::maybeRecordLocation(const DebugLoc &DL, argument
2906 isUsableDebugLoc(DebugLoc DL) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp593 static bool checkHighLaneIndex(SDNode *DL, SDValue &LaneOp, int &LaneIdx) { argument
828 const DataLayout &DL = CurDAG->getDataLayout(); local
889 const DataLayout &DL local
1518 const DataLayout &DL = CurDAG->getDataLayout(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp429 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
856 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument
1326 DebugLoc DL; local
4831 DebugLoc DL = MI->getDebugLoc(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp263 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &, argument
298 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, argument
468 static SDValue getTargetNode(GlobalAddressSDNode *N, SDLoc DL, EVT Ty, argument
473 static SDValue getTargetNode(BlockAddressSDNode *N, SDLoc DL, EVT Ty, argument
479 static SDValue getTargetNode(ConstantPoolSDNode *N, SDLoc DL, EV argument
1221 DebugLoc DL = MI.getDebugLoc(); local
1252 DebugLoc DL = MI.getDebugLoc(); local
1284 DebugLoc DL = MI.getDebugLoc(); local
1385 DebugLoc DL = MI.getDebugLoc(); local
1544 CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsFixed, bool IsRet, Type *OrigTy) argument
1765 convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument
1785 unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1818 convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument
1840 unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1868 unpackF64OnRV32DSoftABI(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1963 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
2184 SDLoc &DL = CLI.DL; local
2473 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
2929 const DataLayout &DL = AI->getModule()->getDataLayout(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp260 inline void getAddressOperands(X86ISelAddressMode &AM, const SDLoc &DL, argument
401 inline SDValue getI8Imm(unsigned Imm, const SDLoc &DL) { argument
406 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { argument
411 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &DL) { argument
415 getExtractVEXTRACTImmediate(SDNode *N, unsigned VecWidth, const SDLoc &DL) argument
423 getInsertVINSERTImmediate(SDNode *N, unsigned VecWidth, const SDLoc &DL) argument
1491 auto &DL = CurDAG->getDataLayout(); local
2711 auto &DL = MF->getDataLayout(); local
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H A DX86InstrInfo.cpp1142 const DebugLoc &DL = Orig.getDebugLoc(); local
3243 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
3339 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, ArrayRef<MachineOperand> Cond, Register TrueReg, Register FalseReg) const argument
3438 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument
4389 DebugLoc DL = MIB->getDebugLoc(); local
4408 DebugLoc DL = MIB->getDebugLoc(); local
4465 DebugLoc DL = MIB->getDebugLoc(); local
6195 DebugLoc DL; local
6270 DebugLoc DL; local
8537 DebugLoc DL = FirstMBB.findDebugLoc(MBBI); variable
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/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGDebugInfo.cpp4369 auto DL = local
H A DCGExprScalar.cpp3340 auto &DL = CGF.CGM.getDataLayout(); local
4816 const auto &DL = CGM.getDataLayout(); local
4612 createCastsForTypeOfSameSize(CGBuilderTy &Builder, const llvm::DataLayout &DL, Value *Src, llvm::Type *DstTy, StringRef Name = �) argument
4930 const auto &DL = CGM.getDataLayout(); local
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H A DCGStmtOpenMP.cpp3225 auto DL = ApplyDebugLocation::CreateDefaultArtificial(CGF, S.getBeginLoc()); local
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h341 virtual MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const { argument
348 MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const { argument
1349 getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown = false) const argument
1369 getMemValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown = false) const argument
1389 getSimpleValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown = false) const argument
3631 splitValueIntoRegisterParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, Optional<CallingConv::ID> CC) const argument
3640 joinRegisterPartsIntoValue(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, Optional<CallingConv::ID> CC) const argument
3688 SDLoc DL; member in struct:llvm::TargetLoweringBase::TargetLowering::CallLoweringInfo
3983 prepareVolatileOrAtomicLoad(SDValue Chain, const SDLoc &DL, SelectionDAG &DAG) const argument
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/freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/
H A DStmt.h1692 DefaultStmt(SourceLocation DL, SourceLocation CL, Stmt *substmt) argument
2402 DoStmt(Stmt *Body, Expr *Cond, SourceLocation DL, SourceLocation WL, argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp907 auto &DL = TLO.DAG.getDataLayout(); local
2965 buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, SDValue N1, MutableArrayRef<int> Mask, SelectionDAG &DAG) const argument
3079 foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const argument
3310 foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const argument
4314 LowerAsmOutputForConstraint( SDValue &Chain, SDValue &Flag, SDLoc DL, const AsmOperandInfo &OpInfo, SelectionDAG &DAG) const argument
4465 ParseConstraints(const DataLayout &DL, const TargetRegisterInfo *TRI, const CallBase &Call) const argument
5214 prepareUREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL, SmallVectorImpl<SDNode *> &Created) const argument
5449 prepareSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL, SmallVectorImpl<SDNode *> &Created) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/
H A DVerifier.cpp125 const DataLayout &DL; member in struct:llvm::VerifierSupport
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp425 evaluateGEPOffsetExpression(User *GEP, InstCombiner &IC, const DataLayout &DL) argument
519 canRewriteGEPAsOffset(Value *Start, Value *Base, const DataLayout &DL, SetVector<Value *> &Explored) argument
643 rewriteGEPAsOffset(Value *Start, Value *Base, const DataLayout &DL, SetVector<Value *> &Explored) argument
763 getAsConstantIndexedAddress(Value *V, const DataLayout &DL) argument
804 transformToIndexedCompare(GEPOperator *GEPLHS, Value *RHS, ICmpInst::Predicate Cond, const DataLayout &DL) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp5782 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp185 const DataLayout &DL; member in class:__anon4760::SimplifyCFGOpt
228 SimplifyCFGOpt(const TargetTransformInfo &TTI, const DataLayout &DL, argument
428 static ConstantInt *GetConstantInt(Value *V, const DataLayout &DL) { argument
469 const DataLayout &DL; member in struct:__anon4761::ConstantComparesGatherer
484 ConstantComparesGatherer(Instruction *Cond, const DataLayout &DL) : DL(D argument
2224 FoldCondBranchOnPHI(BranchInst *BI, const DataLayout &DL, AssumptionCache *AC) argument
2343 FoldTwoEntryPHINode(PHINode *PN, const TargetTransformInfo &TTI, const DataLayout &DL) argument
3018 mergeConditionalStoreToAddress(BasicBlock *PTB, BasicBlock *PFB, BasicBlock *QTB, BasicBlock *QFB, BasicBlock *PostBB, Value *Address, bool InvertPCond, bool InvertQCond, const DataLayout &DL, const TargetTransformInfo &TTI) argument
3162 mergeConditionalStores(BranchInst *PBI, BranchInst *QBI, const DataLayout &DL, const TargetTransformInfo &TTI) argument
3315 SimplifyCondBranchToCondBranch(BranchInst *PBI, BranchInst *BI, const DataLayout &DL, const TargetTransformInfo &TTI) argument
3797 SimplifyBranchOnICmpChain(BranchInst *BI, IRBuilder<> &Builder, const DataLayout &DL) argument
4569 eliminateDeadSwitchCases(SwitchInst *SI, AssumptionCache *AC, const DataLayout &DL) argument
4757 ConstantFold(Instruction *I, const DataLayout &DL, const SmallDenseMap<Value *, Constant *> &ConstantPool) argument
4791 GetCaseResults(SwitchInst *SI, ConstantInt *CaseVal, BasicBlock *CaseDest, BasicBlock **CommonDest, SmallVectorImpl<std::pair<PHINode *, Constant *>> &Res, const DataLayout &DL, const TargetTransformInfo &TTI) argument
4881 InitializeUniqueCases(SwitchInst *SI, PHINode *&PHI, BasicBlock *&CommonDest, SwitchCaseResultVectorTy &UniqueResults, Constant *&DefaultResult, const DataLayout &DL, const TargetTransformInfo &TTI, uintptr_t MaxUniqueResults, uintptr_t MaxCasesPerResult) argument
4999 switchToSelect(SwitchInst *SI, IRBuilder<> &Builder, const DataLayout &DL, const TargetTransformInfo &TTI) argument
5088 SwitchLookupTable( Module &M, uint64_t TableSize, ConstantInt *Offset, const SmallVectorImpl<std::pair<ConstantInt *, Constant *>> &Values, Constant *DefaultValue, const DataLayout &DL, const StringRef &FuncName) argument
5260 WouldFitInRegister(const DataLayout &DL, uint64_t TableSize, Type *ElementType) argument
5278 ShouldBuildLookupTable(SwitchInst *SI, uint64_t TableSize, const TargetTransformInfo &TTI, const DataLayout &DL, const SmallDenseMap<PHINode *, Type *> &ResultTypes) argument
5404 SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder, const DataLayout &DL, const TargetTransformInfo &TTI) argument
5663 ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder, const DataLayout &DL, const TargetTransformInfo &TTI) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp666 createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, const SDLoc &DL) argument
1475 DebugLoc DL = MI.getDebugLoc(); local
1629 const DebugLoc &DL = MI.getDebugLoc(); local
1667 DebugLoc DL = MI.getDebugLoc(); local
1860 DebugLoc DL = MI.getDebugLoc(); local
1915 DebugLoc DL = MI.getDebugLoc(); local
3014 passArgOnStack(SDValue StackPtr, unsigned Offset, SDValue Chain, SDValue Arg, const SDLoc &DL, bool IsTailCall, SelectionDAG &DAG) const argument
3155 SDLoc DL = CLI.DL; local
3491 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, TargetLowering::CallLoweringInfo &CLI) const argument
3558 UnpackFromArgumentSlot(SDValue Val, const CCValAssign &VA, EVT ArgVT, const SDLoc &DL, SelectionDAG &DAG) argument
3618 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
3791 LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps, const SDLoc &DL, SelectionDAG &DAG) const argument
3803 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
4270 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const argument
4328 copyByValRegs( SDValue Chain, const SDLoc &DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const argument
4381 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
4477 writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain, const SDLoc &DL, SelectionDAG &DAG, CCState &State) const argument
4579 DebugLoc DL = MI.getDebugLoc(); local
4655 DebugLoc DL = MI.getDebugLoc(); local
4752 DebugLoc DL = MI.getDebugLoc(); local
4798 DebugLoc DL = MI.getDebugLoc(); local
4882 DebugLoc DL = MI.getDebugLoc(); local
4932 DebugLoc DL = MI.getDebugLoc(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/
H A DBitcodeReader.cpp4835 const DataLayout &DL = TheModule->getDataLayout(); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp1223 const DataLayout &DL = MIRBuilder.getDataLayout(); local
1465 const DataLayout &DL = MIRBuilder.getDataLayout(); local
1568 const DataLayout &DL = MIRBuilder.getDataLayout(); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1015 const DataLayout &DL = Fn.getParent()->getDataLayout(); local
1292 const DataLayout &DL = DAG.getDataLayout(); local
1116 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
1369 combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, SDValue True, SDValue False, SDValue CC, DAGCombinerInfo &DCI) const argument
1492 splitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT, SelectionDAG &DAG) const argument
2816 constantFoldBFE(SelectionDAG &DAG, IntTy Src0, uint32_t Offset, uint32_t Width, const SDLoc &DL) argument
3427 getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const argument
[all...]
H A DSIInstrInfo.cpp463 const DataLayout &DL = MF.getFunction().getParent()->getDataLayout(); local
522 reportIllegalCopy(const SIInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, const char *Msg = �) argument
536 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument
863 materializeImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DestReg, int64_t Value) const argument
924 insertVectorSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, ArrayRef<MachineOperand> Cond, Register TrueReg, Register FalseReg) const argument
1052 insertEQ(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register SrcReg, int Value) const argument
1065 insertNE(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register SrcReg, int Value) const argument
1242 const DebugLoc &DL = MBB.findDebugLoc(MI); local
1375 const DebugLoc &DL = MBB.findDebugLoc(MI); local
1431 const DebugLoc &DL = MBB.findDebugLoc(MI); local
1439 const DebugLoc &DL = Insert->getDebugLoc(); local
1523 DebugLoc DL = MBB.findDebugLoc(MI); local
1570 DebugLoc DL = MBB.findDebugLoc(MI); local
1774 DebugLoc DL = MBB.findDebugLoc(MI); local
1979 insertIndirectBranch(MachineBasicBlock &MBB, MachineBasicBlock &DestBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const argument
2257 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
2370 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, ArrayRef<MachineOperand> Cond, Register TrueReg, Register FalseReg) const argument
4185 DebugLoc DL = MBB->findDebugLoc(I); local
4198 DebugLoc DL = MI->getDebugLoc(); local
4373 const DebugLoc &DL = MI.getDebugLoc(); local
4382 const DebugLoc &DL = MI.getDebugLoc(); local
4408 const DebugLoc &DL = MI.getDebugLoc(); local
4477 const DebugLoc &DL = MI.getDebugLoc(); local
4657 emitLoadSRsrcFromVGPRLoop(const SIInstrInfo &TII, MachineRegisterInfo &MRI, MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, const DebugLoc &DL, MachineOperand &Rsrc) argument
4748 const DebugLoc &DL = MI.getDebugLoc(); local
5048 const DebugLoc &DL = MI.getDebugLoc(); local
5372 const DebugLoc &DL = Inst.getDebugLoc(); local
5550 DebugLoc DL = Inst.getDebugLoc(); local
5621 DebugLoc DL = Inst.getDebugLoc(); local
5648 const DebugLoc &DL = Inst.getDebugLoc(); local
5714 const DebugLoc &DL = Inst.getDebugLoc(); local
5743 const DebugLoc &DL = Inst.getDebugLoc(); local
5774 DebugLoc DL = Inst.getDebugLoc(); local
5839 const DebugLoc &DL = Inst.getDebugLoc(); local
5901 DebugLoc DL = Inst.getDebugLoc(); local
5965 const DebugLoc &DL = Inst.getDebugLoc(); local
6004 const DebugLoc &DL = Inst.getDebugLoc(); local
6040 const DebugLoc &DL = Inst.getDebugLoc(); local
6139 const DebugLoc &DL = Inst.getDebugLoc(); local
6708 getAddNoCarry(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DestReg) const argument
6723 getAddNoCarry(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DestReg, RegScavenger &RS) const argument
7071 createPHIDestinationCopy( MachineBasicBlock &MBB, MachineBasicBlock::iterator LastPHIIt, const DebugLoc &DL, Register Src, Register Dst) const argument
7086 createPHISourceCopy( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, const DebugLoc &DL, Register Src, unsigned SrcSubReg, Register Dst) const argument
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp679 EVT SystemZTargetLowering::getSetCCResultType(const DataLayout &DL, argument
955 bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL, argument
1311 static SDValue convertLocVTToValVT(SelectionDAG &DAG, const SDLoc &DL, argument
1340 static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL, argument
1364 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1535 SDLoc &DL = CLI.DL; local
1732 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
2035 adjustZeroCmp(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
2055 adjustSubwordCmp(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
2211 adjustForSubtraction(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
2281 adjustICmpTruncate(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
2412 adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
2503 adjustForRedundantAnd(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument
3099 lowerThreadPointer(const SDLoc &DL, SelectionDAG &DAG) const argument
4444 getPermuteNode(SelectionDAG &DAG, const SDLoc &DL, const Permute &P, SDValue Op0, SDValue Op1) argument
4490 getGeneralPermuteNode(SelectionDAG &DAG, const SDLoc &DL, SDValue *Ops, const SmallVectorImpl<int> &Bytes) argument
4661 getNode(SelectionDAG &DAG, const SDLoc &DL) argument
5697 combineExtract(const SDLoc &DL, EVT ResVT, EVT VecVT, SDValue Op, unsigned Index, DAGCombinerInfo &DCI, bool Force) const argument
5803 combineTruncateExtract( const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const argument
7122 DebugLoc DL = MI->getDebugLoc(); local
7245 DebugLoc DL = MI.getDebugLoc(); local
7340 DebugLoc DL = MI.getDebugLoc(); local
7458 DebugLoc DL = MI.getDebugLoc(); local
7574 DebugLoc DL = MI.getDebugLoc(); local
7688 DebugLoc DL = MI.getDebugLoc(); local
7716 DebugLoc DL = MI.getDebugLoc(); local
7746 DebugLoc DL = MI.getDebugLoc(); local
7927 DebugLoc DL = MI.getDebugLoc(); local
8034 DebugLoc DL = MI.getDebugLoc(); local
8058 DebugLoc DL = MI.getDebugLoc(); local
[all...]

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