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  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/

Lines Matching defs:DL

1015   const DataLayout &DL = Fn.getParent()->getDataLayout();
1021 Align Alignment = DL.getABITypeAlign(BaseArgTy);
1023 unsigned AllocSize = DL.getTypeAllocSize(BaseArgTy);
1037 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset);
1121 const SDLoc &DL, SelectionDAG &DAG) const {
1125 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain);
1195 Fn, Reason + FuncName, CLI.DL.getDebugLoc());
1292 const DataLayout &DL = DAG.getDataLayout();
1299 SDLoc DL(Op);
1303 DL.getDebugLoc(), DS_Warning);
1311 SDValue Trap = DAG.getNode(ISD::TRAP, DL, MVT::Other, DAG.getEntryNode());
1312 SDValue OutputChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
1324 unsigned Offset = MFI->allocateLDSGlobal(DL, *cast<GlobalVariable>(GV));
1369 SDValue AMDGPUTargetLowering::combineFMinMaxLegacy(const SDLoc &DL, EVT VT,
1396 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, RHS, LHS);
1397 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, LHS, RHS);
1415 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, LHS, RHS);
1416 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, RHS, LHS);
1421 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, RHS, LHS);
1422 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, LHS, RHS);
1433 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, LHS, RHS);
1434 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, RHS, LHS);
1492 AMDGPUTargetLowering::splitVector(const SDValue &N, const SDLoc &DL,
1499 SDValue Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
1500 DAG.getVectorIdxConstant(0, DL));
1502 HiVT.isVector() ? ISD::EXTRACT_SUBVECTOR : ISD::EXTRACT_VECTOR_ELT, DL,
1503 HiVT, N, DAG.getVectorIdxConstant(LoVT.getVectorNumElements(), DL));
1639 SDLoc DL(Op);
1663 SDValue jq = DAG.getConstant(1, DL, IntVT);
1667 jq = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
1670 jq = DAG.getNode(ISD::SRA, DL, VT, jq,
1671 DAG.getConstant(BitSize - 2, DL, VT));
1674 jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
1684 SDValue fa = DAG.getNode(ToFp, DL, FltVT, ia);
1687 SDValue fb = DAG.getNode(ToFp, DL, FltVT, ib);
1689 SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT,
1690 fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb));
1693 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq);
1696 SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq);
1707 SDValue fr = DAG.getNode(OpCode, DL, FltVT, fqneg, fb, fa);
1710 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
1713 fr = DAG.getNode(ISD::FABS, DL, FltVT, fr);
1716 fb = DAG.getNode(ISD::FABS, DL, FltVT, fb);
1721 SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE);
1724 jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
1727 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq);
1730 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS);
1731 Rem = DAG.getNode(ISD::SUB, DL, VT, LHS, Rem);
1737 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize);
1738 Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize);
1740 SDValue TruncMask = DAG.getConstant((UINT64_C(1) << DivBits) - 1, DL, VT);
1741 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask);
1742 Rem = DAG.getNode(ISD::AND, DL, VT, Rem, TruncMask);
1745 return DAG.getMergeValues({ Div, Rem }, DL);
1751 SDLoc DL(Op);
1758 SDValue One = DAG.getConstant(1, DL, HalfVT);
1759 SDValue Zero = DAG.getConstant(0, DL, HalfVT);
1763 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero);
1764 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, One);
1767 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero);
1768 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, One);
1773 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
1776 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(0), Zero});
1777 SDValue REM = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(1), Zero});
1779 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV));
1780 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM));
1795 SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo);
1796 SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi);
1797 SDValue Mad1 = DAG.getNode(FMAD, DL, MVT::f32, Cvt_Hi,
1798 DAG.getConstantFP(APInt(32, 0x4f800000).bitsToFloat(), DL, MVT::f32),
1800 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, DL, MVT::f32, Mad1);
1801 SDValue Mul1 = DAG.getNode(ISD::FMUL, DL, MVT::f32, Rcp,
1802 DAG.getConstantFP(APInt(32, 0x5f7ffffc).bitsToFloat(), DL, MVT::f32));
1803 SDValue Mul2 = DAG.getNode(ISD::FMUL, DL, MVT::f32, Mul1,
1804 DAG.getConstantFP(APInt(32, 0x2f800000).bitsToFloat(), DL, MVT::f32));
1805 SDValue Trunc = DAG.getNode(ISD::FTRUNC, DL, MVT::f32, Mul2);
1806 SDValue Mad2 = DAG.getNode(FMAD, DL, MVT::f32, Trunc,
1807 DAG.getConstantFP(APInt(32, 0xcf800000).bitsToFloat(), DL, MVT::f32),
1809 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2);
1810 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc);
1812 DAG.getBuildVector(MVT::v2i32, DL, {Rcp_Lo, Rcp_Hi}));
1814 SDValue Zero64 = DAG.getConstant(0, DL, VT);
1815 SDValue One64 = DAG.getConstant(1, DL, VT);
1816 SDValue Zero1 = DAG.getConstant(0, DL, MVT::i1);
1819 SDValue Neg_RHS = DAG.getNode(ISD::SUB, DL, VT, Zero64, RHS);
1820 SDValue Mullo1 = DAG.getNode(ISD::MUL, DL, VT, Neg_RHS, Rcp64);
1821 SDValue Mulhi1 = DAG.getNode(ISD::MULHU, DL, VT, Rcp64, Mullo1);
1822 SDValue Mulhi1_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1,
1824 SDValue Mulhi1_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1,
1827 SDValue Add1_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Lo,
1829 SDValue Add1_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Hi,
1831 SDValue Add1_HiNc = DAG.getNode(ISD::ADD, DL, HalfVT, Rcp_Hi, Mulhi1_Hi);
1833 DAG.getBuildVector(MVT::v2i32, DL, {Add1_Lo, Add1_Hi}));
1835 SDValue Mullo2 = DAG.getNode(ISD::MUL, DL, VT, Neg_RHS, Add1);
1836 SDValue Mulhi2 = DAG.getNode(ISD::MULHU, DL, VT, Add1, Mullo2);
1837 SDValue Mulhi2_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2,
1839 SDValue Mulhi2_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2,
1842 SDValue Add2_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_Lo,
1844 SDValue Add2_HiC = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_HiNc,
1846 SDValue Add2_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add2_HiC,
1849 DAG.getBuildVector(MVT::v2i32, DL, {Add2_Lo, Add2_Hi}));
1850 SDValue Mulhi3 = DAG.getNode(ISD::MULHU, DL, VT, LHS, Add2);
1852 SDValue Mul3 = DAG.getNode(ISD::MUL, DL, VT, RHS, Mulhi3);
1854 SDValue Mul3_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mul3, Zero);
1855 SDValue Mul3_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mul3, One);
1856 SDValue Sub1_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Lo,
1858 SDValue Sub1_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Hi,
1860 SDValue Sub1_Mi = DAG.getNode(ISD::SUB, DL, HalfVT, LHS_Hi, Mul3_Hi);
1862 DAG.getBuildVector(MVT::v2i32, DL, {Sub1_Lo, Sub1_Hi}));
1864 SDValue MinusOne = DAG.getConstant(0xffffffffu, DL, HalfVT);
1865 SDValue C1 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, MinusOne, Zero,
1867 SDValue C2 = DAG.getSelectCC(DL, Sub1_Lo, RHS_Lo, MinusOne, Zero,
1869 SDValue C3 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, C2, C1, ISD::SETEQ);
1876 SDValue Sub2_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Lo,
1878 SDValue Sub2_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Mi,
1880 SDValue Sub2_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi,
1883 DAG.getBuildVector(MVT::v2i32, DL, {Sub2_Lo, Sub2_Hi}));
1885 SDValue Add3 = DAG.getNode(ISD::ADD, DL, VT, Mulhi3, One64);
1887 SDValue C4 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, MinusOne, Zero,
1889 SDValue C5 = DAG.getSelectCC(DL, Sub2_Lo, RHS_Lo, MinusOne, Zero,
1891 SDValue C6 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, C5, C4, ISD::SETEQ);
1894 SDValue Add4 = DAG.getNode(ISD::ADD, DL, VT, Add3, One64);
1896 SDValue Sub3_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Lo,
1898 SDValue Sub3_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi,
1900 SDValue Sub3_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub3_Mi,
1903 DAG.getBuildVector(MVT::v2i32, DL, {Sub3_Lo, Sub3_Hi}));
1908 SDValue Sel1 = DAG.getSelectCC(DL, C6, Zero, Add4, Add3, ISD::SETNE);
1909 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE);
1911 SDValue Sel2 = DAG.getSelectCC(DL, C6, Zero, Sub3, Sub2, ISD::SETNE);
1912 SDValue Rem = DAG.getSelectCC(DL, C3, Zero, Sel2, Sub1, ISD::SETNE);
1922 SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_Hi, RHS_Lo);
1923 SDValue REM_Part = DAG.getNode(ISD::UREM, DL, HalfVT, LHS_Hi, RHS_Lo);
1925 SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, Zero, REM_Part, LHS_Hi, ISD::SETEQ);
1926 SDValue REM = DAG.getBuildVector(MVT::v2i32, DL, {REM_Lo, Zero});
1927 REM = DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM);
1929 SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, Zero, DIV_Part, Zero, ISD::SETEQ);
1936 SDValue POS = DAG.getConstant(bitPos, DL, HalfVT);
1938 SDValue HBit = DAG.getNode(ISD::SRL, DL, HalfVT, LHS_Lo, POS);
1939 HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, One);
1940 HBit = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, HBit);
1943 REM = DAG.getNode(ISD::SHL, DL, VT, REM, DAG.getConstant(1, DL, VT));
1945 REM = DAG.getNode(ISD::OR, DL, VT, REM, HBit);
1947 SDValue BIT = DAG.getConstant(1ULL << bitPos, DL, HalfVT);
1948 SDValue realBIT = DAG.getSelectCC(DL, REM, RHS, BIT, Zero, ISD::SETUGE);
1950 DIV_Lo = DAG.getNode(ISD::OR, DL, HalfVT, DIV_Lo, realBIT);
1953 SDValue REM_sub = DAG.getNode(ISD::SUB, DL, VT, REM, RHS);
1954 REM = DAG.getSelectCC(DL, REM, RHS, REM_sub, REM, ISD::SETUGE);
1957 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {DIV_Lo, DIV_Hi});
1958 DIV = DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV);
1965 SDLoc DL(Op);
1971 return DAG.getMergeValues(Results, DL);
1986 SDValue Z = DAG.getNode(AMDGPUISD::URECIP, DL, VT, Y);
1989 SDValue NegY = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Y);
1990 SDValue NegYZ = DAG.getNode(ISD::MUL, DL, VT, NegY, Z);
1991 Z = DAG.getNode(ISD::ADD, DL, VT, Z,
1992 DAG.getNode(ISD::MULHU, DL, VT, Z, NegYZ));
1995 SDValue Q = DAG.getNode(ISD::MULHU, DL, VT, X, Z);
1997 DAG.getNode(ISD::SUB, DL, VT, X, DAG.getNode(ISD::MUL, DL, VT, Q, Y));
2001 SDValue One = DAG.getConstant(1, DL, VT);
2002 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE);
2003 Q = DAG.getNode(ISD::SELECT, DL, VT, Cond,
2004 DAG.getNode(ISD::ADD, DL, VT, Q, One), Q);
2005 R = DAG.getNode(ISD::SELECT, DL, VT, Cond,
2006 DAG.getNode(ISD::SUB, DL, VT, R, Y), R);
2009 Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE);
2010 Q = DAG.getNode(ISD::SELECT, DL, VT, Cond,
2011 DAG.getNode(ISD::ADD, DL, VT, Q, One), Q);
2012 R = DAG.getNode(ISD::SELECT, DL, VT, Cond,
2013 DAG.getNode(ISD::SUB, DL, VT, R, Y), R);
2015 return DAG.getMergeValues({Q, R}, DL);
2020 SDLoc DL(Op);
2026 SDValue Zero = DAG.getConstant(0, DL, VT);
2027 SDValue NegOne = DAG.getConstant(-1, DL, VT);
2040 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero);
2041 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero);
2042 SDValue DIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
2045 DAG.getNode(ISD::SIGN_EXTEND, DL, VT, DIVREM.getValue(0)),
2046 DAG.getNode(ISD::SIGN_EXTEND, DL, VT, DIVREM.getValue(1))
2048 return DAG.getMergeValues(Res, DL);
2051 SDValue LHSign = DAG.getSelectCC(DL, LHS, Zero, NegOne, Zero, ISD::SETLT);
2052 SDValue RHSign = DAG.getSelectCC(DL, RHS, Zero, NegOne, Zero, ISD::SETLT);
2053 SDValue DSign = DAG.getNode(ISD::XOR, DL, VT, LHSign, RHSign);
2056 LHS = DAG.getNode(ISD::ADD, DL, VT, LHS, LHSign);
2057 RHS = DAG.getNode(ISD::ADD, DL, VT, RHS, RHSign);
2059 LHS = DAG.getNode(ISD::XOR, DL, VT, LHS, LHSign);
2060 RHS = DAG.getNode(ISD::XOR, DL, VT, RHS, RHSign);
2062 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS);
2065 Div = DAG.getNode(ISD::XOR, DL, VT, Div, DSign);
2066 Rem = DAG.getNode(ISD::XOR, DL, VT, Rem, RSign);
2068 Div = DAG.getNode(ISD::SUB, DL, VT, Div, DSign);
2069 Rem = DAG.getNode(ISD::SUB, DL, VT, Rem, RSign);
2075 return DAG.getMergeValues(Res, DL);
2499 SDLoc DL(Op);
2502 SDValue Ext = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Src);
2503 return DAG.getNode(ISD::UINT_TO_FP, DL, DestVT, Ext);
2509 SDLoc DL(Op);
2511 SDValue IntToFp32 = DAG.getNode(Op.getOpcode(), DL, MVT::f32, Src);
2514 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag);
2537 SDLoc DL(Op);
2539 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, DL, MVT::i32, Src);
2540 return DAG.getNode(ISD::SINT_TO_FP, DL, DestVT, Ext);
2548 SDLoc DL(Op);
2551 SDValue IntToFp32 = DAG.getNode(Op.getOpcode(), DL, MVT::f32, Src);
2554 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag);
2596 SDLoc DL(Op);
2601 return DAG.getNode(AMDGPUISD::FP_TO_FP16, DL, Op.getValueType(), N0);
2614 SDValue Zero = DAG.getConstant(0, DL, MVT::i32);
2615 SDValue One = DAG.getConstant(1, DL, MVT::i32);
2616 SDValue U = DAG.getNode(ISD::BITCAST, DL, MVT::i64, N0);
2617 SDValue UH = DAG.getNode(ISD::SRL, DL, MVT::i64, U,
2618 DAG.getConstant(32, DL, MVT::i64));
2619 UH = DAG.getZExtOrTrunc(UH, DL, MVT::i32);
2620 U = DAG.getZExtOrTrunc(U, DL, MVT::i32);
2621 SDValue E = DAG.getNode(ISD::SRL, DL, MVT::i32, UH,
2622 DAG.getConstant(20, DL, MVT::i64));
2623 E = DAG.getNode(ISD::AND, DL, MVT::i32, E,
2624 DAG.getConstant(ExpMask, DL, MVT::i32));
2627 E = DAG.getNode(ISD::ADD, DL, MVT::i32, E,
2628 DAG.getConstant(-ExpBiasf64 + ExpBiasf16, DL, MVT::i32));
2630 SDValue M = DAG.getNode(ISD::SRL, DL, MVT::i32, UH,
2631 DAG.getConstant(8, DL, MVT::i32));
2632 M = DAG.getNode(ISD::AND, DL, MVT::i32, M,
2633 DAG.getConstant(0xffe, DL, MVT::i32));
2635 SDValue MaskedSig = DAG.getNode(ISD::AND, DL, MVT::i32, UH,
2636 DAG.getConstant(0x1ff, DL, MVT::i32));
2637 MaskedSig = DAG.getNode(ISD::OR, DL, MVT::i32, MaskedSig, U);
2639 SDValue Lo40Set = DAG.getSelectCC(DL, MaskedSig, Zero, Zero, One, ISD::SETEQ);
2640 M = DAG.getNode(ISD::OR, DL, MVT::i32, M, Lo40Set);
2643 SDValue I = DAG.getNode(ISD::OR, DL, MVT::i32,
2644 DAG.getSelectCC(DL, M, Zero, DAG.getConstant(0x0200, DL, MVT::i32),
2645 Zero, ISD::SETNE), DAG.getConstant(0x7c00, DL, MVT::i32));
2648 SDValue N = DAG.getNode(ISD::OR, DL, MVT::i32, M,
2649 DAG.getNode(ISD::SHL, DL, MVT::i32, E,
2650 DAG.getConstant(12, DL, MVT::i32)));
2653 SDValue OneSubExp = DAG.getNode(ISD::SUB, DL, MVT::i32,
2655 SDValue B = DAG.getNode(ISD::SMAX, DL, MVT::i32, OneSubExp, Zero);
2656 B = DAG.getNode(ISD::SMIN, DL, MVT::i32, B,
2657 DAG.getConstant(13, DL, MVT::i32));
2659 SDValue SigSetHigh = DAG.getNode(ISD::OR, DL, MVT::i32, M,
2660 DAG.getConstant(0x1000, DL, MVT::i32));
2662 SDValue D = DAG.getNode(ISD::SRL, DL, MVT::i32, SigSetHigh, B);
2663 SDValue D0 = DAG.getNode(ISD::SHL, DL, MVT::i32, D, B);
2664 SDValue D1 = DAG.getSelectCC(DL, D0, SigSetHigh, One, Zero, ISD::SETNE);
2665 D = DAG.getNode(ISD::OR, DL, MVT::i32, D, D1);
2667 SDValue V = DAG.getSelectCC(DL, E, One, D, N, ISD::SETLT);
2668 SDValue VLow3 = DAG.getNode(ISD::AND, DL, MVT::i32, V,
2669 DAG.getConstant(0x7, DL, MVT::i32));
2670 V = DAG.getNode(ISD::SRL, DL, MVT::i32, V,
2671 DAG.getConstant(2, DL, MVT::i32));
2672 SDValue V0 = DAG.getSelectCC(DL, VLow3, DAG.getConstant(3, DL, MVT::i32),
2674 SDValue V1 = DAG.getSelectCC(DL, VLow3, DAG.getConstant(5, DL, MVT::i32),
2676 V1 = DAG.getNode(ISD::OR, DL, MVT::i32, V0, V1);
2677 V = DAG.getNode(ISD::ADD, DL, MVT::i32, V, V1);
2679 V = DAG.getSelectCC(DL, E, DAG.getConstant(30, DL, MVT::i32),
2680 DAG.getConstant(0x7c00, DL, MVT::i32), V, ISD::SETGT);
2681 V = DAG.getSelectCC(DL, E, DAG.getConstant(1039, DL, MVT::i32),
2685 SDValue Sign = DAG.getNode(ISD::SRL, DL, MVT::i32, UH,
2686 DAG.getConstant(16, DL, MVT::i32));
2687 Sign = DAG.getNode(ISD::AND, DL, MVT::i32, Sign,
2688 DAG.getConstant(0x8000, DL, MVT::i32));
2690 V = DAG.getNode(ISD::OR, DL, MVT::i32, Sign, V);
2691 return DAG.getZExtOrTrunc(V, DL, Op.getValueType());
2702 SDLoc DL(Op);
2704 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src);
2706 DAG.getNode(Op.getOpcode(), DL, MVT::i64, FPExtend);
2725 SDLoc DL(Op);
2727 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src);
2729 DAG.getNode(Op.getOpcode(), DL, MVT::i64, FPExtend);
2749 SDLoc DL(Op);
2758 Args[I] = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ScalarVT, Args[I], VTOp);
2760 return DAG.getBuildVector(VT, DL, Args);
2817 uint32_t Width, const SDLoc &DL) {
2821 return DAG.getConstant(Result, DL, MVT::i32);
2824 return DAG.getConstant(Src0 >> Offset, DL, MVT::i32);
3316 SDLoc DL(N);
3334 N0 = DAG.getZExtOrTrunc(N0, DL, MVT::i32);
3335 N1 = DAG.getZExtOrTrunc(N1, DL, MVT::i32);
3336 Mul = getMul24(DAG, DL, N0, N1, Size, false);
3338 N0 = DAG.getSExtOrTrunc(N0, DL, MVT::i32);
3339 N1 = DAG.getSExtOrTrunc(N1, DL, MVT::i32);
3340 Mul = getMul24(DAG, DL, N0, N1, Size, true);
3347 return DAG.getSExtOrTrunc(Mul, DL, VT);
3358 SDLoc DL(N);
3366 N0 = DAG.getSExtOrTrunc(N0, DL, MVT::i32);
3367 N1 = DAG.getSExtOrTrunc(N1, DL, MVT::i32);
3369 SDValue Mulhi = DAG.getNode(AMDGPUISD::MULHI_I24, DL, MVT::i32, N0, N1);
3371 return DAG.getSExtOrTrunc(Mulhi, DL, VT);
3382 SDLoc DL(N);
3390 N0 = DAG.getZExtOrTrunc(N0, DL, MVT::i32);
3391 N1 = DAG.getZExtOrTrunc(N1, DL, MVT::i32);
3393 SDValue Mulhi = DAG.getNode(AMDGPUISD::MULHI_U24, DL, MVT::i32, N0, N1);
3395 return DAG.getZExtOrTrunc(Mulhi, DL, VT);
3429 const SDLoc &DL,
3438 Op = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Op);
3440 SDValue FFBX = DAG.getNode(Opc, DL, MVT::i32, Op);
3442 FFBX = DAG.getNode(ISD::TRUNCATE, DL, VT, FFBX);
3902 SDLoc DL(N);
3928 CastedElts.push_back(DAG.getNode(ISD::BITCAST, DL, DestEltVT, Elt));
4021 return DAG.getConstant(0, DL, MVT::i32);
4048 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i32, BitsFrom,
4052 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT);
4061 DL);
4068 DL);
4073 SDValue ShiftVal = DAG.getConstant(OffsetVal, DL, MVT::i32);
4074 return DAG.getNode(Signed ? ISD::SRA : ISD::SRL, DL, MVT::i32,