/macosx-10.9.5/tcl-102/tcl_ext/tcllib/tcllib/modules/pt/rde_critcl/ |
H A D | param.c | 20 char* CC; /* [TCL_UTF_MAX] */ member in struct:RDE_PARAM_ [all...] |
/macosx-10.9.5/tcl-102/tcl_ext/tkimg/tkimg/compat/libtiff/contrib/acorn/ |
H A D | Makefile | 90 CC = gcc macro
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/macosx-10.9.5/tcl-102/tcl_ext/tkimg/tkimg/compat/libtiff/contrib/addtiffo/ |
H A D | Makefile | 111 CC = gcc macro
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/macosx-10.9.5/tcl-102/tcl_ext/tkimg/tkimg/compat/libtiff/contrib/iptcutil/ |
H A D | Makefile | 110 CC = gcc macro
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/macosx-10.9.5/xnu-2422.115.4/bsd/kern/ |
H A D | tty.c | 171 #define CC CONTROL macro 218 #undef CC macro [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/ |
H A D | Instructions.h | 1251 void setCallingConv(CallingConv::ID CC) { argument 3014 void setCallingConv(CallingConv::ID CC) { argument
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/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 2258 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, local
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H A D | TargetLowering.cpp | 1974 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; local
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H A D | SelectionDAGBuilder.cpp | 2058 ISD::CondCode CC; local [all...] |
H A D | DAGCombiner.cpp | 3326 SDValue LHS, RHS, CC; local 4123 ISD::CondCode CC local 542 isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS, SDValue &CC) argument 4181 ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get(); local 6674 CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1)); local 9062 SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 440 ARMCC::CondCodes CC = (ARMCC::CondCodes)(int)Cond[0].getImm(); local 1578 ARMCC::CondCodes CC = getInstrPredicate(MI, PredReg); local 1982 inline static ARMCC::CondCodes getSwappedCondition(ARMCC::CondCodes CC) { argument 2182 ARMCC::CondCodes CC = (ARMCC::CondCodes)Instr.getOperand(IO-1).getImm(); local [all...] |
H A D | ARMISelLowering.cpp | 76 ARMCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, argument 1087 static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) { argument 1104 static void FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, argument 1140 CCAssignFn *ARMTargetLowering::CCAssignFnForNode(CallingConv::ID CC, argument 2776 getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &ARMcc, SelectionDAG &DAG, DebugLoc dl) const argument 2922 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); local 3024 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local 3074 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local 3602 SDValue CC = Op.getOperand(2); local 7078 isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, bool &Invert, SDValue &OtherOp, SelectionDAG &DAG) argument 8868 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get(); local 8948 ARMCC::CondCodes CC = local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 42 unsigned CC = ARMCC::AL; local 694 unsigned CC; local 733 unsigned CC; local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 2517 CondCodeSDNode *CC = dyn_cast<CondCodeSDNode>(Op.getOperand(2)); local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 2337 unsigned X86::GetCondBranchFromCond(X86::CondCode CC) { argument 2361 X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) { argument 2386 static X86::CondCode getSwappedCondition(X86::CondCode CC) { argument 2404 static unsigned getSETFromCond(X86::CondCode CC, argument 2672 X86::CondCode CC = (X86::CondCode)Cond[0].getImm(); local 4461 X86::CondCode CC = static_cast<X86::CondCode>(Cond[0].getImm()); local [all...] |
H A D | X86ISelLowering.cpp | 1785 static bool IsTailCallConvention(CallingConv::ID CC) { argument 1803 static bool FuncIsMadeTailCallSafe(CallingConv::ID CC, argument 7778 SDValue CC = DAG.getConstant(X86::COND_NE, MVT::i8); local 8714 SDValue X86TargetLowering::LowerToBT(SDValue And, ISD::CondCode CC, argument 8791 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local 8848 SDValue CC = Op.getOperand(2); local 8873 SDValue CC = Op.getOperand(2); local 9054 SDValue CC; local 9255 SDValue CC; local 9797 ISD::CondCode CC; local 10055 SDValue CC = DAG.getConstant(X86CC, MVT::i8); local 10476 CallingConv::ID CC = Func->getCallingConv(); local 12254 X86::CondCode CC = X86::getCondFromCMovOpc(CMOVOpc); local 14043 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local 14290 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); local 14345 checkBoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) argument 14438 X86::CondCode CC = (X86::CondCode)N->getConstantOperandVal(2); local 15988 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get(); local 16016 X86::CondCode CC = X86::CondCode(N->getConstantOperandVal(0)); local 16048 X86::CondCode CC = X86::CondCode(N->getConstantOperandVal(2)); local [all...] |
/macosx-10.9.5/passwordserver_sasl-170/cyrus_sasl/plugins/ |
H A D | Makefile | 93 CC = gcc macro
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/macosx-10.9.5/vim-53/src/ |
H A D | Makefile | 269 CC= macro 1701 cd xxd; CC="$(CC)" CFLAGS="$(CPPFLAGS) $(CFLAGS)" \\ macro 2368 CC="$(CC) $(OSDEF_CFLAGS)" srcdir=$(srcdir) sh $(srcdir)/osdef.sh macro [all...] |
/macosx-10.9.5/JavaScriptCore-7537.78.1/assembler/ |
H A D | ARMAssembler.h | 113 CC = 0x30000000, // Unsigned lower. enumerator in enum:JSC::ARMAssembler::__anon2639
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/macosx-10.9.5/llvmCore-3425.0.33/bindings/ocaml/llvm/ |
H A D | llvm_ocaml.c | 1191 CAMLprim value llvm_set_instruction_call_conv(value CC, LLVMValueRef Inst) { argument
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 572 static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) { argument 600 static bool InvertFPCondCode(Mips::CondCode CC) { argument 627 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local 668 ISD::CondCode CC local 894 GetFPBranchCodeFromCond(Mips::CondCode CC) argument 1644 Mips::CondCode CC = local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 310 } CC; member in union:__anon10340::ARMOperand::__anon10341 2074 static ARMOperand *CreateCondCode(ARMCC::CondCodes CC, SMLoc S) { argument 2704 unsigned CC = StringSwitch<unsigned>(Tok.getString().lower()) local 4697 unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2)) local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1330 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local 1431 SDValue CC = DAG.getSetCC(dl, MVT::i32, VT.isInteger() ? GprIndex : FprIndex, local 2333 CalculateParameterAndLinkageAreaSize(SelectionDAG &DAG, bool isPPC64, bool isVarArg, unsigned CC, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, unsigned &nAltivecParamsAtEnd) argument 5646 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get(); local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/VMCore/ |
H A D | Core.cpp | 1363 void LLVMSetFunctionCallConv(LLVMValueRef Fn, unsigned CC) { argument 1655 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { argument
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