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331722 |
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29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes.
Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes.
Requested by: gjb (re)
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330897 |
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14-Mar-2018 |
eadler |
Partial merge of the SPDX changes
These changes are incomplete but are making it difficult to determine what other changes can/should be merged.
No objections from: pfg
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302408 |
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07-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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296825 |
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14-Mar-2016 |
wma |
Make MPIC compatible with ARM_INTRNG
After ARM_INTRNG introduction, MPIC code needed several modifications: - IRQ resource and its handler added - several DEVMETHODs of INTRNG interface implemented - defines enhanced to ensure code compiles as well for AXP as for A38X - added dummy MSI_IRQ, ERR_IRQ defines for Armada38x - MPIC driver was added to files.armada38x, ARM_INTRNG option enabled in kernconf file and regs of MPIC corrected in dts file.
Instead of modifying Armada38X DTS, offsets to CPU registers defined in driver were changed. That required restoring 'reg' property of mpic node in ArmadaXP to state compliant with Linux DTS.
Additionally, required ARM_INTRNG definitions were added to mv_common.c.
Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: adrian, andrew, ian, skra Approved by: cognet (mentor) Differential Revision: https://reviews.freebsd.org/D5030
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294441 |
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20-Jan-2016 |
zbb |
Introduce initial driver for PMSU on Armada38x
This is a stub for PMSU driver. Note that it cannot be used to set the secondary core boot address during attach because drivers are attached later than SI_SUB_CPU sysinit where cores are started. Setting the boot address should be done manually in platform_mp_start_ap().
SMP is working fine with this commit and was enabled in Armada38x kernel configuration file.
Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4427
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294439 |
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20-Jan-2016 |
zbb |
Add initial support for SMP on Armada38x
- Add file sys/arm/mv/armada38x/armada38x_mp.c - Set mp_maxid and mp_ncpus based on FDT unless SCU register indicates only one core - Boot CPU1 in platform_mp_start_ap() - IPI range defined
Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4426
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294436 |
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20-Jan-2016 |
zbb |
Add support for watchdog on Armada38x
A38X watchdog support was implemented in sys/arm/mv/timer.c driver. It required following modifications: - add "marvell,armada-380-wdt" compatibility, which supports only watchdog - correct and enhance definitions related to timer control register - unmask reset capability in RSTOUTn_MASK register - use dedicated watchdog timer on A38X instead of second timer
Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D4423
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294430 |
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20-Jan-2016 |
zbb |
Fix invalid root link detection in mv_pci driver
mv_pci driver omitted slot 0, which can be valid device on Armada38x. New mechanism detects if device is root link, basing on vendor's and device's IDs. It is restricted to Armada38x; on other machines, behaviour remains the same.
Reviewed by: andrew Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D4377
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294426 |
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20-Jan-2016 |
zbb |
Enable SCU unit for Armada38x
Valid SCU operation is necessary for SMP interoperability. Initialization function armada38x_enable_scu() was added.
Reviewed by: andrew, ian Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D4220
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294416 |
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20-Jan-2016 |
zbb |
Introduce initial support for Marvell Armada38x
This commit introduces initial support for Marvell Armada38x platform. Changes: - Add common DTS files for Armada38x SoCs and DTS file for A388-GP - Add ARMADA38X kernel configuration - Add option SOC_MV_ARMADA38X and set MV_PCI_PORTS - Add list of files to compile - Implement get_tclk(), get_sar_value(), cpu_reset() functions - Add CPU ID and SoC numbers - Correct ifdefs in arm/mv/timer.c
Reviewed by: ian, imp Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4210
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256760 |
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19-Oct-2013 |
rrs |
Corrects the Kirkwood dreamplug to use the right register for power managment. It was incorrectly using the clock register which also caused the status to be the opposite of what it is supposed to be. 1 - its disabled 0 - its enabled
Per kirkwood spec FSS_88F6180_9x_6281_OpenSource.pdf
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251371 |
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04-Jun-2013 |
gber |
Fix the passing of time on Armada XP.
In order to become independent of Coherency Fabric frequency, configure Timer and Watchdog to operate in 25MHz mode.
Submitted by: Zbigniew Bodek <zbb@semihalf.com>
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243580 |
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26-Nov-2012 |
marcel |
Allow building LINT by defining both SAMPLE_AT_RESET on the one hand and SAMPLE_AT_RESET_{LO|HI} on the other. It doesn't matter which values they take, as long as they are defined.
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240488 |
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14-Sep-2012 |
gber |
Add support for Armada XP A0.
- Add functions to calculate clocks instead using hardcoded values - Update reset and timers functions - Update number of interrupts - Change name of platform from db88f78100 to db78460 - Correct DRAM size and PCI IRQ routing in dts file.
Obtained from: Semihalf
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239370 |
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18-Aug-2012 |
hrs |
Sort IDs.
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239277 |
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15-Aug-2012 |
gonzo |
Merging of projects/armv6, part 7
Add Marvell ARMADA XP support
Obtained from: Marvell, Semihalf
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238873 |
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28-Jul-2012 |
hrs |
Add support for Marvell 88F6282.
Sponsored by: Plat'Home, Co.,Ltd.
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232512 |
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04-Mar-2012 |
raj |
Remove unused #defines. All this is now retrieved from the device tree.
MFC after: 1 week
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209131 |
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13-Jun-2010 |
raj |
Convert Marvell ARM platforms to FDT convention.
The following systems are involved:
- DB-88F5182 - DB-88F5281 - DB-88F6281 - DB-78100 - SheevaPlug
This overhaul covers the following major changes:
- All integrated peripherals drivers for Marvell ARM SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values).
- Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say good by to obio / mbus drivers and numerous hard-coded config data.
Note that world needs to be built WITH_FDT for the affected platforms.
Reviewed by: imp Sponsored by: The FreeBSD Foundation.
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196532 |
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25-Aug-2009 |
raj |
Properly handle initial state of power mgmt.
Modules on Marvell SOC can be selectively PM-disabled, and we must not access disabled devices' registers (attempt to initialize them) unconditionally, as this leads to the system hang. This patch introduces graceful handling of the PM state during devices init.
Submitted by: Michal Hajduk Obtained from: Semihalf
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194845 |
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24-Jun-2009 |
raj |
Introduce ata(4) support for Marvell integrated SATA controllers (found on 88F5xxx, 88F6xxx and MV78xxx system on chip devices).
Reviewed by: stas Obtained from: Semihalf
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194072 |
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12-Jun-2009 |
marcel |
Move the memory layout definitions and logic from mvreg.h to mvwin.h so that it isn't exposured unless needed. In particular this means that it's easier to tune the memory layout based on board details. While here, remove inclusion of <machine/intr.h> from mvreg.h. This also contains exposure to SoC specifics in MI drivers, because NIRQ depends on the SoC.
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191140 |
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16-Apr-2009 |
raj |
Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions, handle Z0 revision (early silicon) explicitly due to its quirks.
Obtained from: Marvell, Semihalf
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186909 |
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08-Jan-2009 |
raj |
Improve and extend Marvell SOCs platform code.
- Allow for setting per platform MPP/GPIO configuration in the kernel, so that we can override all settings firmware might set.
- Set decode windows for the remaining on-chip peripherals: CESA, SATA and XOR.
- Improve handling of USB controllers so that all port are available on the given SOC/platform (e.g. up to three on DB-78xxx), this includes rework of USB decode windows set-up.
- Other minor fixes and cosmetics.
Obtained from: Semihalf
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186899 |
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08-Jan-2009 |
raj |
Adjust Marvell SOC support for A0 chip revision.
- Clean up TCLK handling so that it's dynamically recognized depending on registers settings or chip version/revision. Update registers definitions.
- Teach SOC ident routine about A0 (initial silicon version for general audience)
Obtained from: Marvell, Semihalf
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185089 |
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19-Nov-2008 |
raj |
PCI/PCI-Express support for Marvell systems.
Obtained from: Marvell, Semihalf
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183840 |
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13-Oct-2008 |
raj |
Introduce basic support for Marvell families of system-on-chip ARM devices:
* Orion - 88F5181 - 88F5182 - 88F5281
* Kirkwood - 88F6281
* Discovery - MV78100
The above families of SOCs are built around CPU cores compliant with ARMv5TE instruction set architecture definition. They share a number of integrated peripherals. This commit brings support for the following basic elements:
* GPIO * Interrupt controller * L1, L2 cache * Timers, watchdog, RTC * TWSI (I2C) * UART
Other peripherals drivers will be introduced separately.
Reviewed by: imp, marcel, stass (Thanks guys!) Obtained from: Marvell, Semihalf
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