Searched refs:write_reg (Results 1 - 25 of 179) sorted by last modified time

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c324 misc_pkt.write_reg.reg_offset = input->write_reg.reg_offset;
325 misc_pkt.write_reg.reg_value = input->write_reg.reg_value;
H A Damdgpu_mes.h287 } write_reg; member in union:mes_misc_op_input::__anon12
H A Damdgpu_mes.c835 op_input.write_reg.reg_offset = reg;
836 op_input.write_reg.reg_value = val;
/linux-master/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c457 phy->ops.write_reg = e1000_write_phy_reg_hv;
555 phy->ops.write_reg = e1000e_write_phy_reg_bm;
597 phy->ops.write_reg = e1000e_write_phy_reg_bm;
5853 .write_reg = e1000e_write_phy_reg_igp,
H A Dhw.h555 s32 (*write_reg)(struct e1000_hw *, u32, u16); member in struct:e1000_phy_operations
/linux-master/include/linux/gpio/
H A Ddriver.h388 * @write_reg: writer function for generic GPIO
475 void (*write_reg)(void __iomem *reg, unsigned long data); member in struct:gpio_chip
/linux-master/include/linux/
H A Dmhi.h354 * @write_reg: Write a MHI register via the physical link (required)
435 void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, member in struct:mhi_controller
/linux-master/drivers/staging/fbtft/
H A Dfbtft-core.c205 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
208 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
211 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
H A Dfb_ssd1351.c38 write_reg(par, 0xfd, 0x12); /* Command Lock */
39 write_reg(par, 0xfd, 0xb1); /* Command Lock */
40 write_reg(par, 0xae); /* Display Off */
41 write_reg(par, 0xb3, 0xf1); /* Front Clock Div */
42 write_reg(par, 0xca, 0x7f); /* Set Mux Ratio */
43 write_reg(par, 0x15, 0x00, 0x7f); /* Set Column Address */
44 write_reg(par, 0x75, 0x00, 0x7f); /* Set Row Address */
45 write_reg(par, 0xa1, 0x00); /* Set Display Start Line */
46 write_reg(par, 0xa2, 0x00); /* Set Display Offset */
47 write_reg(pa
[all...]
/linux-master/drivers/bus/mhi/host/
H A Dpci_generic.c959 mhi_cntrl->write_reg = mhi_pci_write_reg;
H A Dmain.c67 mhi_cntrl->write_reg(mhi_cntrl, base + offset, val);
H A Dinit.c922 !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs ||
/linux-master/drivers/mtd/spi-nor/
H A Dcore.c175 return nor->controller_ops->write_reg(nor, opcode, buf, len);
2170 !nor->controller_ops->write_reg))) {
/linux-master/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.h34 void (*write_reg)(struct brcmnand_soc *soc, u32 val, u32 offset); member in struct:brcmnand_io_ops
78 return soc && soc->ops && soc->ops->read_reg && soc->ops->write_reg;
89 soc->ops->write_reg(soc, val, offset);
/linux-master/drivers/macintosh/
H A Dtherm_windtunnel.c121 write_reg( struct i2c_client *cl, int reg, int data, int len ) function
158 /* write_reg( x.fan, 0x24, val, 1 ); */
159 write_reg( x.fan, 0x25, val, 1 );
160 write_reg( x.fan, 0x20, 0, 1 );
225 if( write_reg( x.thermostat, 1, val, 1 ) )
229 write_reg( x.fan, 0x01, 0x01, 1 );
231 write_reg( x.fan, 0x23, 0x91, 1 );
233 write_reg( x.fan, 0x00, 0x95, 1 );
243 write_reg( x.thermostat, 2, x.overheat_hyst, 2 );
244 write_reg(
[all...]
/linux-master/drivers/accel/qaic/
H A Dmhi_controller.c538 mhi_cntrl->write_reg = mhi_write_reg;
/linux-master/drivers/net/wireless/realtek/rtw89/
H A Ddebug.c3933 rtw89_debugfs_add_w(write_reg);
/linux-master/drivers/net/wireless/realtek/rtw88/
H A Ddebug.c1228 rtw_debugfs_add_w(write_reg);
/linux-master/drivers/net/wireless/mediatek/mt76/mt7996/
H A Dmt7996.h526 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg,
H A Dmmio.c480 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg, argument
491 if (write_reg) {
/linux-master/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dmt7915.h520 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
H A Dmmio.c789 bool write_reg,
800 if (write_reg) {
788 mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, u32 clear, u32 set) argument
/linux-master/drivers/net/wireless/ath/ath12k/
H A Dmhi.c436 mhi_ctrl->write_reg = ath12k_mhi_op_write_reg;
/linux-master/drivers/net/wireless/ath/ath11k/
H A Dmhi.c381 mhi_ctrl->write_reg = ath11k_mhi_op_write_reg;
/linux-master/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_x550.c338 hw->phy.ops.write_reg = NULL;
538 hw->phy.ops.write_reg = NULL;
1900 ret_val = hw->phy.ops.write_reg(hw, reg_slice,
2494 status = hw->phy.ops.write_reg(hw,
2511 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,
2527 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,
2542 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,
2778 hw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
2800 hw->phy.ops.write_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
3271 phy->ops.write_reg
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