Searched refs:max_num_dpp (Results 1 - 25 of 38) sorted by path

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/linux-master/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c2266 ASSERT(dc->dcn_ip->max_num_dpp);
2267 for (i = 0; i < dc->dcn_ip->max_num_dpp; i++)
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_auto.c466 if (v->total_number_of_active_dpp[i][j] > v->max_num_dpp) {
508 if (v->total_number_of_active_dpp[i][j] <= v->max_num_dpp) {
H A Ddcn_calcs.c58 * RV2 delta: dram_clock_change_latency, max_num_dpp
143 .max_num_dpp = 4,
834 v->max_num_dpp = dc->dcn_ip->max_num_dpp;
1649 "max_num_dpp: %d\n"
1683 dc->dcn_ip->max_num_dpp,
1733 dc->dml.ip.max_num_dpp = dc->dcn_ip->max_num_dpp;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn10/
H A Ddcn10_fpu.c82 .max_num_dpp = 4,
135 dml->ip.max_num_dpp = 3;
138 dcn_ip->max_num_dpp = 3;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c123 .max_num_dpp = 6,
191 .max_num_dpp = 5,
594 .max_num_dpp = 4,
2408 dcn2_1_ip.max_num_dpp = pool->base.pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c91 .max_num_dpp = 6,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c78 .max_num_dpp = 4,
337 dcn3_01_ip.max_num_dpp = pool->base.pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c79 .max_num_dpp = 5,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c78 .max_num_dpp = 2,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c84 .max_num_dpp = 4,
229 .max_num_dpp = 4,
328 .max_num_dpp = 4,
596 dcn3_1_ip.max_num_dpp = dc->res_pool->pipe_count;
668 dcn3_15_ip.max_num_dpp = dc->res_pool->pipe_count;
735 dcn3_16_ip.max_num_dpp = dc->res_pool->pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c65 .max_num_dpp = 4,
196 dcn3_14_ip.max_num_dpp = dc->res_pool->pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c88 .max_num_dpp = 4,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c67 .max_num_dpp = 4,
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c69 .max_num_dpp = 4,
241 dcn3_5_ip.max_num_dpp = dc->res_pool->pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c48 .max_num_dpp = 4,
276 dcn3_51_ip.max_num_dpp = dc->res_pool->pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h314 * @max_num_dpp: Maximum number of DPP supported in the target ASIC.
316 unsigned int max_num_dpp; member in struct:_vcs_dpi_ip_params_st
H A Ddisplay_mode_vba.c425 mode_lib->vba.MaxNumDPP = ip->max_num_dpp;
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_core.c6726 mode_lib->ms.ip.max_num_dpp,
7048 mode_lib->ms.ip.max_num_dpp,
7070 mode_lib->ms.ip.max_num_dpp,
7142 } else if (mode_lib->ms.TotalNumberOfActiveDPP[j] < (dml_uint_t) mode_lib->ms.ip.max_num_dpp) {
7170 while (!(mode_lib->ms.TotalNumberOfActiveDPP[j] >= (dml_uint_t) mode_lib->ms.ip.max_num_dpp || mode_lib->ms.TotalNumberOfSingleDPPSurfaces[j] == 0)) {
7232 if (mode_lib->ms.TotalNumberOfActiveDPP[j] > (dml_uint_t) mode_lib->ms.ip.max_num_dpp) {
8257 mode_lib->ms.ip.max_num_dpp,
H A Ddisplay_mode_core_structs.h352 dml_uint_t max_num_dpp; member in struct:ip_params_st
H A Ddml2_translation_helper.c63 out->max_num_dpp = dml2->config.dcn_pipe_count;
136 out->max_num_dpp = 4;
481 out->max_num_dpp = in_ip_params->max_num_dpp;
H A Ddml2_wrapper.c111 int unused_dpps = p->ip_params->max_num_dpp;
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Ddcn_calcs.h153 float max_num_dpp; member in struct:dcn_bw_internal_vars
602 int max_num_dpp; member in struct:dcn_ip_params
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c1638 dc->dml.ip.max_num_dpp = pool->base.pipe_count;
1639 dc->dcn_ip->max_num_dpp = pool->base.pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c2399 loaded_ip->max_num_dpp = pool->base.pipe_count;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c113 .max_num_dpp = 4,
1189 dcn201_ip.max_num_dpp = pool->base.pipe_count;

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