Searched refs:channel_num (Results 1 - 25 of 42) sorted by path

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/linux-master/arch/m68k/include/asm/
H A Dquicc_simple.h24 typedef void (free_routine)(int scc_num, int channel_num, void *buf);
25 typedef void (store_rx_buffer_routine)(int scc_num, int channel_num, void *buff, int length);
26 typedef int (handle_tx_error_routine)(int scc_num, int channel_num, QUICC_BD *tbd);
27 typedef void (handle_rx_error_routine)(int scc_num, int channel_num, QUICC_BD *rbd);
28 typedef void (handle_lost_error_routine)(int scc_num, int channel_num);
/linux-master/include/linux/iio/frequency/
H A Dad9523.h40 * @channel_num: Output channel number.
54 unsigned channel_num; member in struct:ad9523_channel_spec
/linux-master/include/linux/
H A Dsh_dma.h54 * @channel_num: number of channels in the above array
75 int channel_num; member in struct:sh_dmae_pdata
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7722.c125 .channel_num = ARRAY_SIZE(sh7722_dmae_channels),
H A Dsetup-sh7724.c191 .channel_num = ARRAY_SIZE(sh7724_dmae_channels),
H A Dsetup-sh7757.c387 .channel_num = ARRAY_SIZE(sh7757_dmae_channels),
401 .channel_num = ARRAY_SIZE(sh7757_dmae_channels),
415 .channel_num = ARRAY_SIZE(sh7757_dmae_channels),
429 .channel_num = ARRAY_SIZE(sh7757_dmae_channels),
H A Dsetup-sh7780.c171 .channel_num = ARRAY_SIZE(sh7780_dmae0_channels),
183 .channel_num = ARRAY_SIZE(sh7780_dmae1_channels),
H A Dsetup-sh7785.c237 .channel_num = ARRAY_SIZE(sh7785_dmae0_channels),
249 .channel_num = ARRAY_SIZE(sh7785_dmae1_channels),
H A Dsetup-sh7786.c285 .channel_num = ARRAY_SIZE(dmac0_channels),
/linux-master/drivers/dma/sh/
H A Drz-dmac.c847 int channel_num; local
953 channel_num = i ? i - 1 : 0;
954 for (i = 0; i < channel_num; i++) {
H A Dshdmac.c150 for (i = 0; i < shdev->pdata->channel_num; i++) {
610 for (i = 0; i < shdev->pdata->channel_num; i++) {
688 if (!pdata || !pdata->channel_num)
745 pdata->channel_num);
807 for (; irq_cnt < pdata->channel_num; irq_cnt++) {
840 } while (irq_cnt < pdata->channel_num && chanirq_res);
853 pdata->channel_num, SH_DMAE_MAX_CHANNELS);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c384 mem_channel_number = vram_info->v30.channel_num;
407 mem_channel_number = vram_module->v9.channel_num;
428 mem_channel_number = vram_module->v10.channel_num;
449 mem_channel_number = vram_module->v11.channel_num;
470 mem_channel_number = vram_module->v9.channel_num;
H A Dumc_v8_10.c34 uint32_t channel_num; member in struct:channelnum_map_colbit
170 static uint32_t umc_v8_10_get_col_bit(uint32_t channel_num) argument
175 if (channel_num == umc_v8_10_channelnum_map_colbit_table[t].channel_num)
189 uint32_t channel_num = UMC_V8_10_TOTAL_CHANNEL_NUM(adev); local
190 uint32_t col_bit = umc_v8_10_get_col_bit(channel_num);
196 tmp_addr = SWIZZLE_MODE_TMP_ADDR(na, channel_num, channel_idx);
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser2.c2340 info->num_chans = info_v23->vram_module[0].channel_num;
2359 info->num_chans = info_v24->vram_module[0].channel_num;
2378 info->num_chans = info_v25->vram_module[0].channel_num;
2397 info->num_chans = info_v30->channel_num;
/linux-master/drivers/gpu/drm/amd/include/
H A Datomfirmware.h3164 uint8_t channel_num; member in struct:atom_umc_info_v4_0
3185 uint8_t channel_num; // Number of mem. channels supported in this module member in struct:atom_vram_module_v9
3246 uint8_t channel_num; member in struct:atom_vram_info_header_v3_0
3308 uint8_t channel_num; // Number of mem. channels supported in this module member in struct:atom_vram_module_v10
3348 uint8_t channel_num; // Number of mem. channels supported in this module member in struct:atom_vram_module_v11
/linux-master/drivers/iio/adc/
H A Dxilinx-ams.c506 u8 channel_num; local
510 channel_num = AMS_VCC_PSPLL0_CH;
513 channel_num = AMS_VCC_PSPLL3_CH;
516 channel_num = AMS_VCCINT_CH;
519 channel_num = AMS_VCCBRAM_CH;
522 channel_num = AMS_VCCAUX_CH;
525 channel_num = AMS_PSDDRPLL_CH;
528 channel_num = AMS_PSINTFPDDR_CH;
540 channel_num);
/linux-master/drivers/iio/frequency/
H A Dad9523.c910 if (chan->channel_num < AD9523_NUM_CHAN) {
911 __set_bit(chan->channel_num, &active_mask);
913 AD9523_CHANNEL_CLOCK_DIST(chan->channel_num),
928 ret = ad9523_vco_out_map(indio_dev, chan->channel_num,
936 st->ad9523_channels[i].channel = chan->channel_num;
/linux-master/drivers/net/wireless/ath/ath11k/
H A Ddp_rx.c2393 u8 channel_num; local
2406 channel_num = meta_data;
2413 } else if (channel_num >= 1 && channel_num <= 14) {
2415 } else if (channel_num >= 36 && channel_num <= 177) {
2422 channel_num =
2431 rx_status->freq = ieee80211_channel_to_frequency(channel_num,
/linux-master/drivers/net/wireless/ath/ath12k/
H A Ddp_rx.c2347 u8 channel_num; local
2361 channel_num = meta_data;
2366 } else if (channel_num >= 1 && channel_num <= 14) {
2368 } else if (channel_num >= 36 && channel_num <= 173) {
2375 channel_num =
2383 rx_status->freq = ieee80211_channel_to_frequency(channel_num,
/linux-master/drivers/net/wireless/ath/wil6210/
H A Dwmi.h4070 u8 channel_num; member in struct:wmi_internal_fw_set_channel_event
/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dcfg80211.c1061 params_le->channel_num = params_v2_le->channel_num;
1063 ch = le32_to_cpu(params_v2_le->channel_num);
1097 params_le->channel_num = 0;
1107 params_le->channel_num = cpu_to_le32(1);
1160 params_le->channel_num =
H A Dfwil_types.h385 __le32 channel_num; /* count of channels and ssids that follow member in struct:brcmf_scan_params_le
429 __le32 channel_num; /* count of channels and ssids that follow member in struct:brcmf_scan_params_v2_le
1016 * @channel_num: number of channels specified in @channel_list.
1022 __le32 channel_num; member in struct:brcmf_pno_config_le
H A Dp2p.c744 sparams->channel_num = cpu_to_le32(num_chans &
H A Dpno.c276 u32 n_chan = le32_to_cpu(pno_cfg->channel_num);
292 pno_cfg->channel_num = cpu_to_le32(n_chan);
/linux-master/drivers/net/wireless/intel/ipw2x00/
H A Dipw2200.c4688 x->channel_num);

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