#
7c054b2c |
|
09-May-2023 |
James Clark <james.clark@arm.com> |
iio: adc: Use devm_krealloc_array Now that it exists, use it instead of doing the multiplication and checking for overflow manually. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: James Clark <james.clark@arm.com> Link: https://lore.kernel.org/r/20230509094942.396150-4-james.clark@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
cd19fbfe |
|
19-Jan-2023 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
iio: adc: xilinx-ams: Convert to use fwnode_device_is_compatible() Replace open coded fwnode_device_is_compatible() in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20230119174749.76769-1-andriy.shevchenko@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
6794ed0c |
|
24-Nov-2022 |
Marco Pagani <marpagan@redhat.com> |
iio: adc: xilinx-ams: fix devm_krealloc() return value check The clang-analyzer reported a warning: "Value stored to 'ret' is never read". Fix the return value check if devm_krealloc() fails to resize ams_channels. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Marco Pagani <marpagan@redhat.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221125113112.219290-1-marpagan@redhat.com Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
40c0c131 |
|
08-Aug-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
iio: adc: xilinx-ams: Benefit from devm_clk_get_enabled() to simplify Make use of devm_clk_get_enabled() to replace some code that effectively open codes this new function. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20220808204740.307667-8-u.kleine-koenig@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
3b4a1bd8 |
|
21-Jun-2022 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
iio: adc: xilinx-ams: Switch to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() Using these newer macros allows the compiler to remove the unused structure and functions when !CONFIG_PM_SLEEP + removes the need to mark pm functions __maybe_unused. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220621202719.13644-10-jic23@kernel.org
|
#
f8ef475a |
|
09-May-2022 |
Lv Ruyi <lv.ruyi@zte.com.cn> |
iio: adc: xilinx-ams: fix return error variable Return irq instead of ret which always equals to zero here. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
0bf12616 |
|
27-Jan-2022 |
Robert Hancock <robert.hancock@calian.com> |
iio: adc: xilinx-ams: Fix single channel switching sequence Some of the AMS channels need to be read by switching into single-channel mode from the normal polling sequence. There was a logic issue in this switching code that could cause the first read of these channels to read back as zero. It appears that the sequencer should be set back to default mode before changing the channel selection, and the channel should be set before switching the sequencer back into single-channel mode. Also, write 1 to the EOC bit in the status register to clear it before waiting for it to become set, so that we actually wait for a new conversion to complete, and don't proceed based on a previous conversion completing. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20220127173450.3684318-5-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
d5d786fb |
|
27-Jan-2022 |
Robert Hancock <robert.hancock@calian.com> |
iio: adc: xilinx-ams: Fixed wrong sequencer register settings Register settings used for the sequencer configuration register were incorrect, causing some inputs to not be read properly. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20220127173450.3684318-4-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
1f21a415 |
|
27-Jan-2022 |
Robert Hancock <robert.hancock@calian.com> |
iio: adc: xilinx-ams: Fixed missing PS channels The code forgot to increment num_channels for the PS channel inputs, resulting in them not being enabled as they should. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20220127173450.3684318-3-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
2c432655 |
|
13-Feb-2022 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
iio: adc: xilinx-ams: Use devm_delayed_work_autocancel() to simplify code Use devm_delayed_work_autocancel() instead of hand writing it. This is less verbose and saves a few lines of code. devm_delayed_work_autocancel() uses devm_add_action() instead of devm_add_action_or_reset(). This is fine, because if the underlying memory allocation fails, no work has been scheduled yet. So there is nothing to undo. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2626e6a057e40cd2271ef0e5f81d12e607bad5b4.1644776929.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
#
d5c70627 |
|
03-Dec-2021 |
Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com> |
iio: adc: Add Xilinx AMS driver The AMS includes an ADC as well as on-chip sensors that can be used to sample external voltages and monitor on-die operating conditions, such as temperature and supply voltage levels. The AMS has two SYSMON blocks. PL-SYSMON block is capable of monitoring off chip voltage and temperature. PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring from an external master. Out of these interfaces currently only DRP is supported. Other block PS-SYSMON is memory mapped to PS. The AMS can use internal channels to monitor voltage and temperature as well as one primary and up to 16 auxiliary channels for measuring external voltages. The voltage and temperature monitoring channels also have event capability which allows to generate an interrupt when their value falls below or raises above a set threshold. Co-developed-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com> Link: https://lore.kernel.org/r/20211203212358.31444-4-anand.ashok.dumbre@xilinx.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
|