Searched refs:cache_line_size (Results 1 - 25 of 65) sorted by path

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/linux-master/drivers/scsi/cxlflash/
H A Dcommon.h173 } __aligned(cache_line_size());
228 } __aligned(cache_line_size());
H A Dsislite.h480 char carea[cache_line_size()]; /* 128B each */
/linux-master/tools/virtio/ringtest/
H A Dptr_ring.c14 #define cache_line_size() SMP_CACHE_BYTES macro
/linux-master/arch/arc/include/asm/
H A Dcache.h51 #define cache_line_size() SMP_CACHE_BYTES macro
/linux-master/arch/arm64/include/asm/
H A Dcache.h86 int cache_line_size(void);
88 #define dma_get_cache_alignment cache_line_size
/linux-master/arch/arm64/kernel/
H A Dcacheinfo.c15 int cache_line_size(void) function
22 EXPORT_SYMBOL_GPL(cache_line_size); variable
/linux-master/arch/mips/mm/
H A Dpage.c87 static int cache_line_size; variable
88 #define cache_line_mask() (cache_line_size - 1)
136 cache_line_size = cpu_dcache_line_size();
205 cache_line_size = cpu_scache_line_size();
207 cache_line_size = cpu_dcache_line_size();
214 max(cache_line_size >> 1,
217 max(cache_line_size >> 1,
238 } else if (cache_line_size == (half_clear_loop_size << 1)) {
299 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
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/linux-master/arch/powerpc/kernel/
H A Deeh_pe.c54 alloc_size = ALIGN(alloc_size, cache_line_size());
69 cache_line_size());
/linux-master/arch/s390/pci/
H A Dpci_irq.c443 zpci_ibv[cpu] = airq_iv_create(cache_line_size() * BITS_PER_BYTE,
/linux-master/arch/um/include/asm/
H A Dprocessor-generic.h95 #define cache_line_size() (boot_cpu_data.cache_alignment) macro
/linux-master/arch/x86/include/asm/
H A Dprocessor.h192 #define cache_line_size() (boot_cpu_data.x86_cache_alignment) macro
/linux-master/arch/x86/kvm/
H A Dx86.c8036 page_line_mask = ~(cache_line_size() - 1);
/linux-master/block/
H A Dblk-flush.c490 rq_sz = round_up(rq_sz + cmd_size, cache_line_size());
H A Dblk-mq.c3400 cache_line_size());
/linux-master/drivers/accel/habanalabs/common/
H A Dhabanalabs.h666 * @cache_line_size: device cache line size.
797 u16 cache_line_size; member in struct:asic_fixed_properties
/linux-master/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c575 prop->cache_line_size = DEVICE_CACHE_LINE_SIZE;
/linux-master/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c2446 prop->cache_line_size = DEVICE_CACHE_LINE_SIZE;
/linux-master/drivers/edac/
H A Di7core_edac.c1983 const int cache_line_size = 64; local
1991 cache_line_size * 1000000;
2023 const u32 cache_line_size = 64; local
2043 1000000 * cache_line_size;
H A Dthunderx_edac.c340 unsigned int cline_size = cache_line_size();
411 unsigned int cline_size = cache_line_size();
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_crat.c58 .cache_line_size = 64,
68 .cache_line_size = 64,
78 .cache_line_size = 64,
94 .cache_line_size = 64,
104 .cache_line_size = 64,
114 .cache_line_size = 64,
144 .cache_line_size = 64,
154 .cache_line_size = 64,
164 .cache_line_size = 64,
174 .cache_line_size
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H A Dkfd_crat.h170 uint16_t cache_line_size; member in struct:crat_subtype_cache
306 uint32_t cache_line_size; member in struct:kfd_gpu_cache_info
H A Dkfd_topology.c356 sysfs_show_32bit_prop(buffer, offs, "cache_line_size",
1567 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
1636 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc.h272 uint32_t cache_line_size; member in struct:dc_caps
/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource_helpers.c46 cache_lines_used = total_size_in_mall_bytes / dc->caps.cache_line_size + 2;
48 total_cache_lines = dc->caps.max_cab_allocation_bytes / dc->caps.cache_line_size;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c2054 dc->caps.cache_line_size = 64;
2398 dc->dml2_options.mall_cfg.cache_line_size_bytes = dc->caps.cache_line_size;

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