Searched refs:vcpu_set_msr (Results 1 - 18 of 18) sorted by relevance

/linux-master/tools/testing/selftests/kvm/x86_64/
H A Dvmx_msrs_test.c24 vcpu_set_msr(vcpu, msr_index, val & ~BIT_ULL(bit));
25 vcpu_set_msr(vcpu, msr_index, val);
38 vcpu_set_msr(vcpu, msr_index, val | BIT_ULL(bit));
39 vcpu_set_msr(vcpu, msr_index, val);
51 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, 0);
52 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, -1ull);
79 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
80 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED);
81 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
82 vcpu_set_msr(vcp
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H A Dvmx_pmu_caps_test.c92 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
110 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
129 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
130 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
139 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, BIT_ULL(bit));
140 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
143 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
205 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
206 vcpu_set_msr(vcpu, MSR_LBR_TOS, 7);
H A Drecalc_apic_map_test.c58 vcpu_set_msr(vcpus[i], MSR_IA32_APICBASE, LAPIC_X2APIC);
64 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_X2APIC);
65 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_DISABLED);
H A Dplatform_info_test.c72 vcpu_set_msr(vcpu, MSR_PLATFORM_INFO,
76 vcpu_set_msr(vcpu, MSR_PLATFORM_INFO, msr_platform_info);
H A Dhwcr_msr_test.c32 vcpu_set_msr(vcpu, MSR_K7_HWCR, 0);
H A Dxss_msr_test.c34 vcpu_set_msr(vcpu, MSR_IA32_XSS, xss_val);
H A Dtsc_msrs_test.c125 vcpu_set_msr(vcpu, MSR_IA32_TSC, HOST_ADJUST + val);
131 vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, UNITY * 123456);
136 vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, val);
H A Dtsc_scaling_sync.c57 vcpu_set_msr(vcpu, MSR_IA32_TSC, TEST_TSC_OFFSET);
H A Dmonitor_mwait_test.c124 vcpu_set_msr(vcpu, MSR_IA32_MISC_ENABLE,
H A Dsmm_test.c153 vcpu_set_msr(vcpu, MSR_IA32_SMBASE, SMRAM_GPA);
H A Dhyperv_ipi.c264 vcpu_set_msr(vcpu[1], HV_X64_MSR_VP_INDEX, RECEIVER_VCPU_ID_1);
270 vcpu_set_msr(vcpu[2], HV_X64_MSR_VP_INDEX, RECEIVER_VCPU_ID_2);
H A Dxapic_state_test.c140 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, apic_base);
H A Dhyperv_evmcs.c259 vcpu_set_msr(vcpu, HV_X64_MSR_VP_INDEX, vcpu->id);
H A Dhyperv_svm_test.c173 vcpu_set_msr(vcpu, HV_X64_MSR_VP_INDEX, vcpu->id);
H A Dhyperv_tlb_flush.c640 vcpu_set_msr(vcpu[1], HV_X64_MSR_VP_INDEX, WORKER_VCPU_ID_1);
645 vcpu_set_msr(vcpu[2], HV_X64_MSR_VP_INDEX, WORKER_VCPU_ID_2);
H A Dpmu_counters_test.c45 vcpu_set_msr(*vcpu, MSR_IA32_PERF_CAPABILITIES, perf_capabilities);
/linux-master/tools/testing/selftests/kvm/
H A Dsteal_time.c80 vcpu_set_msr(vcpu, MSR_KVM_STEAL_TIME, (ulong)st_gva[i] | KVM_MSR_ENABLED);
/linux-master/tools/testing/selftests/kvm/include/x86_64/
H A Dprocessor.h1101 #define vcpu_set_msr(vcpu, msr, val) \ macro

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