Searched refs:phy_ctrl (Results 1 - 18 of 18) sorted by relevance

/linux-master/drivers/usb/phy/
H A Dphy-am335x-control.h6 void (*phy_power)(struct phy_control *phy_ctrl, u32 id,
8 void (*phy_wkup)(struct phy_control *phy_ctrl, u32 id, bool on);
11 static inline void phy_ctrl_power(struct phy_control *phy_ctrl, u32 id, argument
14 phy_ctrl->phy_power(phy_ctrl, id, dr_mode, on);
17 static inline void phy_ctrl_wkup(struct phy_control *phy_ctrl, u32 id, bool on) argument
19 phy_ctrl->phy_wkup(phy_ctrl, id, on);
H A Dphy-am335x-control.c16 struct phy_control phy_ctrl; member in struct:am335x_control_usb
31 static void am335x_phy_wkup(struct phy_control *phy_ctrl, u32 id, bool on) argument
37 usb_ctrl = container_of(phy_ctrl, struct am335x_control_usb, phy_ctrl);
63 static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, argument
70 usb_ctrl = container_of(phy_ctrl, struct am335x_control_usb, phy_ctrl);
146 return &ctrl_usb->phy_ctrl;
154 const struct phy_control *phy_ctrl; local
160 phy_ctrl
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H A Dphy-keystone.c30 void __iomem *phy_ctrl; member in struct:keystone_usbphy
49 val = keystone_usbphy_readl(k_phy->phy_ctrl, USB_PHY_CTL_CLOCK);
50 keystone_usbphy_writel(k_phy->phy_ctrl, USB_PHY_CTL_CLOCK,
60 val = keystone_usbphy_readl(k_phy->phy_ctrl, USB_PHY_CTL_CLOCK);
61 keystone_usbphy_writel(k_phy->phy_ctrl, USB_PHY_CTL_CLOCK,
75 k_phy->phy_ctrl = devm_platform_ioremap_resource(pdev, 0);
76 if (IS_ERR(k_phy->phy_ctrl))
77 return PTR_ERR(k_phy->phy_ctrl);
H A Dphy-am335x.c18 struct phy_control *phy_ctrl; member in struct:am335x_phy
27 phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, am_phy->dr_mode, true);
35 phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, am_phy->dr_mode, false);
48 am_phy->phy_ctrl = am335x_get_phy_control(dev);
49 if (!am_phy->phy_ctrl)
80 phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, am_phy->dr_mode, false);
106 phy_ctrl_wkup(am_phy->phy_ctrl, am_phy->id, true);
108 phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, am_phy->dr_mode, false);
117 phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, am_phy->dr_mode, true);
120 phy_ctrl_wkup(am_phy->phy_ctrl, am_ph
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/linux-master/drivers/net/ethernet/silan/
H A Dsc92031.c554 u32 phy_ctrl; local
556 phy_ctrl = ioread32(port_base + PhyCtrl);
557 phy_ctrl &= ~(PhyCtrlDux | PhyCtrlSpd100 | PhyCtrlSpd10);
558 phy_ctrl |= PhyCtrlAne | PhyCtrlReset;
563 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd100 | PhyCtrlSpd10;
566 phy_ctrl |= PhyCtrlSpd10;
569 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd10;
572 phy_ctrl |= PhyCtrlSpd100;
575 phy_ctrl |= PhyCtrlDux | PhyCtrlSpd100;
579 iowrite32(phy_ctrl, port_bas
1124 u32 phy_ctrl; local
1187 u32 phy_ctrl; local
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/linux-master/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_phy.c178 u16 phy_ctrl; local
180 pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &phy_ctrl);
181 phy_ctrl |= MII_CR_RESET;
182 pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, phy_ctrl);
/linux-master/drivers/net/ethernet/intel/igb/
H A De1000_phy.c12 u16 *phy_ctrl);
865 u16 phy_ctrl; local
889 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
893 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
894 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
1323 * @phy_ctrl: pointer to current value of PHY_CONTROL
1333 u16 *phy_ctrl)
1350 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN;
1355 *phy_ctrl &= ~MII_CR_FULL_DUPLEX;
1359 *phy_ctrl |
1332 igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) argument
2050 u16 phy_ctrl; local
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/linux-master/drivers/net/ethernet/intel/igc/
H A Digc_phy.c432 u16 phy_ctrl; local
457 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
461 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
462 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
/linux-master/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_hw.c784 u32 master_ctrl, mac_ctrl, phy_ctrl; local
794 AT_READ_REG(hw, REG_GPHY_CTRL, &phy_ctrl);
801 phy_ctrl &= ~(GPHY_CTRL_EXT_RESET | GPHY_CTRL_CLS);
802 phy_ctrl |= GPHY_CTRL_SEL_ANA_RST | GPHY_CTRL_HIB_PULSE |
806 phy_ctrl |= GPHY_CTRL_PHY_IDDQ | GPHY_CTRL_PWDOWN_HW;
809 AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl);
814 phy_ctrl |= GPHY_CTRL_EXT_RESET;
832 atl1c_driver_name, mac_ctrl, master_ctrl, phy_ctrl, wol_ctrl);
835 AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl);
/linux-master/drivers/net/ethernet/intel/e1000e/
H A Dphy.c1121 u16 phy_ctrl; local
1145 ret_val = e1e_rphy(hw, MII_BMCR, &phy_ctrl);
1149 phy_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1150 ret_val = e1e_wphy(hw, MII_BMCR, phy_ctrl);
1458 * @phy_ctrl: pointer to current value of MII_BMCR
1467 void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) argument
1484 *phy_ctrl &= ~BMCR_ANENABLE;
1489 *phy_ctrl &= ~BMCR_FULLDPLX;
1493 *phy_ctrl |= BMCR_FULLDPLX;
1500 *phy_ctrl |
2113 u16 phy_ctrl; local
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H A Dich8lan.c3026 u32 phy_ctrl; local
3033 phy_ctrl = er32(PHY_CTRL);
3036 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU;
3037 ew32(PHY_CTRL, phy_ctrl);
3057 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU;
3058 ew32(PHY_CTRL, phy_ctrl);
3112 u32 phy_ctrl; local
3116 phy_ctrl = er32(PHY_CTRL);
3119 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU;
3120 ew32(PHY_CTRL, phy_ctrl);
5210 u32 phy_ctrl; local
5379 u32 phy_ctrl; local
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H A Dphy.h25 void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
/linux-master/drivers/net/phy/qcom/
H A Dqca808x.c384 int phy_ctrl = 0; local
398 phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
401 MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
/linux-master/drivers/pci/controller/dwc/
H A Dpcie-spear13xx.c42 u32 phy_ctrl; /* cr10 */ member in struct:pcie_app_reg
/linux-master/drivers/net/ethernet/intel/e1000/
H A De1000_main.c4679 u16 phy_ctrl; local
4695 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4696 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4697 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4699 phy_ctrl);
4703 &phy_ctrl)) {
4704 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4707 phy_ctrl);
4713 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4714 phy_ctrl |
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/linux-master/drivers/scsi/hisi_sas/
H A Dhisi_sas_v1_hw.c566 u32 phy_ctrl = hisi_sas_phy_read32(hisi_hba, i, PHY_CTRL); local
568 phy_ctrl |= PHY_CTRL_RESET_MSK;
569 hisi_sas_phy_write32(hisi_hba, i, PHY_CTRL, phy_ctrl);
/linux-master/drivers/mtd/nand/raw/
H A Dcadence-nand-controller.c384 u32 phy_ctrl; member in struct:cadence_nand_timings
1333 writel_relaxed(t->phy_ctrl, cdns_ctrl->reg + PHY_CTRL);
2620 t->phy_ctrl = reg;
/linux-master/drivers/scsi/esas2r/
H A Datioctl.h651 struct atto_csmi_phy_ctrl phy_ctrl; member in union:atto_ioctl_csmi

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