Searched refs:mes (Results 1 - 25 of 32) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mes.c47 struct amdgpu_mes *mes = &adev->mes; local
54 found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset);
55 if (found >= mes->num_mes_dbs) {
60 set_bit(found, mes->doorbell_bitmap);
63 *doorbell_index = mes->db_start_dw_offset + found * 2;
72 struct amdgpu_mes *mes = &adev->mes; local
75 rel_index = (doorbell_index - mes
83 struct amdgpu_mes *mes = &adev->mes; local
[all...]
H A Dmes_v11_0.c103 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, argument
111 struct amdgpu_device *adev = mes->adev;
112 struct amdgpu_ring *ring = &mes->ring;
124 spin_lock_irqsave(&mes->ring_lock, flags);
126 spin_unlock_irqrestore(&mes->ring_lock, flags);
131 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr;
132 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq;
136 spin_unlock_irqrestore(&mes->ring_lock, flags);
168 static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes, argument
171 struct amdgpu_device *adev = mes
226 mes_v11_0_remove_hw_queue(struct amdgpu_mes *mes, struct mes_remove_queue_input *input) argument
245 mes_v11_0_unmap_legacy_queue(struct amdgpu_mes *mes, struct mes_unmap_legacy_queue_input *input) argument
278 mes_v11_0_suspend_gang(struct amdgpu_mes *mes, struct mes_suspend_gang_input *input) argument
284 mes_v11_0_resume_gang(struct amdgpu_mes *mes, struct mes_resume_gang_input *input) argument
290 mes_v11_0_query_sched_status(struct amdgpu_mes *mes) argument
305 mes_v11_0_misc_op(struct amdgpu_mes *mes, struct mes_misc_op_input *input) argument
366 mes_v11_0_set_hw_resources(struct amdgpu_mes *mes) argument
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H A Dmes_v10_1.c89 static int mes_v10_1_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, argument
97 struct amdgpu_device *adev = mes->adev;
98 struct amdgpu_ring *ring = &mes->ring;
103 spin_lock_irqsave(&mes->ring_lock, flags);
105 spin_unlock_irqrestore(&mes->ring_lock, flags);
110 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr;
111 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq;
115 spin_unlock_irqrestore(&mes->ring_lock, flags);
147 static int mes_v10_1_add_hw_queue(struct amdgpu_mes *mes, argument
150 struct amdgpu_device *adev = mes
189 mes_v10_1_remove_hw_queue(struct amdgpu_mes *mes, struct mes_remove_queue_input *input) argument
208 mes_v10_1_unmap_legacy_queue(struct amdgpu_mes *mes, struct mes_unmap_legacy_queue_input *input) argument
242 mes_v10_1_suspend_gang(struct amdgpu_mes *mes, struct mes_suspend_gang_input *input) argument
248 mes_v10_1_resume_gang(struct amdgpu_mes *mes, struct mes_resume_gang_input *input) argument
254 mes_v10_1_query_sched_status(struct amdgpu_mes *mes) argument
269 mes_v10_1_set_hw_resources(struct amdgpu_mes *mes) argument
320 mes_v10_1_init_aggregated_doorbell(struct amdgpu_mes *mes) argument
[all...]
H A Damdgpu_mes.h91 /* mes ucode */
97 /* mes ucode data */
315 int (*add_hw_queue)(struct amdgpu_mes *mes,
318 int (*remove_hw_queue)(struct amdgpu_mes *mes,
321 int (*unmap_legacy_queue)(struct amdgpu_mes *mes,
324 int (*suspend_gang)(struct amdgpu_mes *mes,
327 int (*resume_gang)(struct amdgpu_mes *mes,
330 int (*misc_op)(struct amdgpu_mes *mes,
334 #define amdgpu_mes_kiq_hw_init(adev) (adev)->mes.kiq_hw_init((adev))
335 #define amdgpu_mes_kiq_hw_fini(adev) (adev)->mes
450 amdgpu_mes_lock(struct amdgpu_mes *mes) argument
456 amdgpu_mes_unlock(struct amdgpu_mes *mes) argument
[all...]
H A Damdgpu_doorbell_mgr.c158 adev->mes.db_start_dw_offset = size / sizeof(u32);
H A Damdgpu_kms.c380 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK;
381 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK)
385 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK;
386 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK)
H A Damdgpu_gmc.c592 if (ring == &adev->mes.ring ||
760 if (adev->mes.ring.sched.ready) {
H A Dsdma_v5_0.c1555 spin_lock(&adev->mes.queue_id_lock);
1556 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id);
1561 spin_unlock(&adev->mes.queue_id_lock);
H A Dsdma_v6_0.c1428 spin_lock(&adev->mes.queue_id_lock);
1429 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id);
1434 spin_unlock(&adev->mes.queue_id_lock);
H A Dsdma_v5_2.c1407 spin_lock(&adev->mes.queue_id_lock);
1408 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id);
1413 spin_unlock(&adev->mes.queue_id_lock);
H A Damdgpu_amdkfd.c712 ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) {
H A Damdgpu_ucode.c734 FW_VERSION_ATTR(mes_fw_version, 0444, mes.sched_version & AMDGPU_MES_VERSION_MASK);
735 FW_VERSION_ATTR(mes_kiq_fw_version, 0444, mes.kiq_version & AMDGPU_MES_VERSION_MASK);
H A Damdgpu_gfx.c953 if (adev->mes.ring.sched.ready)
1023 if (adev->mes.ring.sched.ready) {
H A Dgmc_v11_0.c234 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) &&
/linux-master/tools/power/cpupower/utils/idle_monitor/
H A Dcpupower-monitor.h71 #define print_overflow_err(mes, ov) \
75 "could be inaccurate\n"), mes, ov); \
/linux-master/tools/testing/cxl/test/
H A Dmem.c157 struct mock_event_store mes; member in struct:cxl_mockmem_data
170 return &mdata->mes.mock_logs[log_type];
204 static void mes_add_event(struct mock_event_store *mes, argument
213 log = &mes->mock_logs[log_type];
326 struct mock_event_store *mes = &mdata->mes; local
337 cxl_mem_get_event_records(mdata->mds, mes->ev_status);
462 static void cxl_mock_add_event_logs(struct mock_event_store *mes) argument
471 mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed);
472 mes_add_event(mes, CXL_EVENT_TYPE_INF
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/linux-master/include/uapi/linux/
H A Dif_arcnet.h94 } mes; member in struct:arc_cap
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_debug.h137 (dev->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 70);
H A Dkfd_device_queue_manager.c245 amdgpu_mes_lock(&adev->mes);
246 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);
247 amdgpu_mes_unlock(&adev->mes);
272 amdgpu_mes_lock(&adev->mes);
273 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);
274 amdgpu_mes_unlock(&adev->mes);
/linux-master/drivers/net/arcnet/
H A Dcapmode.c178 ((unsigned char *)&pkt->soft.cap.mes), length - 1);
213 ackpkt->soft.cap.mes.ack = acked;
/linux-master/drivers/misc/sgi-gru/
H A Dgrukservices.c1000 char mes[GRU_CACHE_LINE_BYTES], *m; local
1007 memset(mes, 0xee, sizeof(mes));
1011 mes[8] = i;
1013 ret = gru_send_message_gpa(&mqd, mes, sizeof(mes));
/linux-master/fs/reiserfs/
H A Dprints.c726 void print_cur_tb(char *mes) argument
728 printk("%s\n%s", mes, print_tb_buf);
H A Dreiserfs.h3205 void print_cur_tb(char *mes);
3207 void print_bi(struct buffer_info *bi, char *mes);
3214 /*void print_super_block (struct super_block * s, char * mes);*/
3216 void print_block_head(struct buffer_head *bh, char *mes);
H A Ddo_balan.c1611 char *mes)
1628 print_cur_tb(mes);
1610 check_internal_node(struct super_block *s, struct buffer_head *bh, char *mes) argument
/linux-master/drivers/media/i2c/
H A Dsaa717x.c1102 char *mes[4] = { local
1124 mes[audio_mode]);

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