#
617efef4 |
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11-Dec-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu: add ucode id for jpeg DPG support add ucode id and cmd buffer for jpeg psp sram programming and Jpeg DPG support. Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b35c3fea |
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07-Jun-2023 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support rlc auotload type set Support to set fw_load_type=3 to use backdoor rlc autoload. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
45b801c2 |
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07-Jun-2023 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: skip ucode bo reserve for RLC AUTOLOAD Skip ucode BO reservation for backdoor RLC autoload. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d20e1aec |
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09-Jan-2024 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: add debug flag to place fw bo on vram for frontdoor loading Use debug_mask=0x8 param to help isolating data path issues on new systems in early phase. v2: rename the flag for explicitness (lijo) Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6c5683bd |
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08-Jan-2024 |
Le Ma <le.ma@amd.com> |
Revert "drm/amdgpu: add param to specify fw bo location for front-door loading" This reverts commit c572abffe9f50c8ba33060865449313b3f588c35. Will use debug module param instead of independent module param. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
13a1851f |
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03-Jan-2024 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' Fixes the below: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:1404 amdgpu_ucode_request() warn: '*fw' from request_firmware() not released on lines: 1404. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Lijo Lazar <lijo.lazar@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c572abff |
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03-Jan-2024 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: add param to specify fw bo location for front-door loading This param can help isolating data path issues on new systems in early phase. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ef2354c7 |
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11-Oct-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu/umsch: fix missing stuff during rebase These are missed during rebase. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
79daf692 |
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11-Oct-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Add support to load P2S tables Add support to load P2S tables through PSP. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e8303cf |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b93fb0fe |
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25-Aug-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Add only valid firmware version nodes Show only firmware version attributes that have valid version. Hide others. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4f949033 |
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18-Jun-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add PSP loading support for UMSCH Add front door loading support. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c5d67a0e |
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08-May-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add PSP loading support for VPE Add PSP loading support for Video Processing Engine. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ce7b59c1 |
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11-May-2022 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add support for VPE firmware name decoding Add decoding VPE firmware name support. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
557d466b |
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25-Jul-2023 |
Ori Messinger <Ori.Messinger@amd.com> |
drm/amdgpu: Report Missing MES Firmware Versions with Sysfs Added missing MES firmware versions to the 'fw_version' sysfs directory, they should now exist as a files named "mes_fw_version" and "mes_kiq_fw_version" found at: /sys/class/drm/cardX/device/fw_version/mes_fw_version /sys/class/drm/cardX/device/fw_version/mes_kiq_fw_version Where X is the card number, and the version is displayed in hexadecimal. Signed-off-by: Ori Messinger <ori.messinger@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e03f04b8 |
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17-May-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amdgpu: Fix warnings in amdgpu _sdma, _ucode.c Fix below checkpatch warnings: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Comparisons should place the constant on the right side of the test WARNING: Missing a blank line after declarations Cc: Luben Tuikov <luben.tuikov@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
05947892 |
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23-Mar-2023 |
Stanley.Yang <Stanley.Yang@amd.com> |
drm/amdgpu: print ras drv fw debug info Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Candice Li <candice.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f5211c5d |
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17-Mar-2023 |
Lee Jones <lee@kernel.org> |
drm/amd/amdgpu/amdgpu_ucode: Remove unused function ‘amdgpu_ucode_print_imu_hdr’ Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:129:6: warning: no previous prototype for ‘amdgpu_ucode_print_imu_hdr’ [-Wmissing-prototypes] Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: David Airlie <airlied@gmail.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3cd658de |
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16-Mar-2023 |
Bill Liu <Bill.Liu@amd.com> |
drm/amdgpu: Adding CAP firmware initialization Added CAP firmware initialization for PSP v13.0.10 under psp_init_sriov_microcode Signed-off-by: Bill Liu <Bill.Liu@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bda88a26 |
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15-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Remove needless break for legacy IP discovery MP0 9.0.0 There is already a "default" case in the switch block, so there is no need to have a break after the switch block. Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0604897b |
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13-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Fix renoir/green sardine MP0 IP version detection The existing codebase never had a case for detecting MP0 version on Renoir and instead relied upon hardcoded chip name. This was missed as part of the changes to migrate all IP blocks to build filenames from `amdgpu_ucode.c`. Consequently, Renoir tries to fetch a binary with 11_0_3 in the filename and since it's supposed to have "renoir" in the filename fails to probe. The fbdev still works though so the series worked. Add a case for Renoir into the legacy table to ensure the right ASD and TA firmware load again. Reported-by: Ekene Akuneme <Ekene.Akuneme@amd.com> Reported-by: Nicholas Choi <Nicholas.Choi@amd.com> Cc: Alex Hung <Alex.Hung@amd.com> Fixes: 994a97447e38 ("drm/amd: Parse both v1 and v2 TA microcode headers using same function") Fixes: 54a3e032340e ("drm/amd: Add a legacy mapping to "amdgpu_ucode_ip_version_decode"") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
03000128 |
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04-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: make amdgpu_ucode_validate static No consumers outside of amdgpu_ucode.c use amdgpu_ucode_validate anymore, so make the function static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2210af50 |
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03-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Add a new helper for loading/validating microcode All microcode runs a basic validation after it's been loaded. Each IP block as part of init will run both. Introduce a wrapper for request_firmware and amdgpu_ucode_validate. This wrapper will also remap any error codes from request_firmware to -ENODEV. This is so that early_init will fail if firmware couldn't be loaded instead of the IP block being disabled. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54a3e032 |
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28-Dec-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Add a legacy mapping to "amdgpu_ucode_ip_version_decode" This will allow other parts of the driver that currently special case firmware file names to before IP version style naming to just have a single call to `amdgpu_ucode_ip_version_decode`. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b7236296 |
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16-Sep-2022 |
David Francis <David.Francis@amd.com> |
drm/amd: Add IMU fw version to fw version queries IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
68bc1473 |
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16-Sep-2022 |
David Francis <David.Francis@amd.com> |
drm/amd: Add IMU fw version to fw version queries IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d5c6ad72 |
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13-Sep-2022 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: support print rlc v2_x ucode hdr add rlc v2_x support to print_rlc_hdr helper Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2207efdd |
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14-Jul-2022 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/amdgpu: add TAP_DELAYS upload support for gfx10 Support {GLOBAL/SE0/SE1/SE2/SE3}_TAP_DELAYS uploading. v2: upload TAP_DELAYS before RLC autoload was triggered. (Hawking) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c4d7738c |
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24-May-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: simplify amdgpu_ucode_get_load_type() This is the same as the default case, so drop the extra logic. Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
289bcffb |
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13-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support imu for gfx11 Add support to initialize imu for gfx v11. IMU is a new power management block for gfx which manages gfx power. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
14ab2924 |
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12-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support RS64 CP fw front door load Support to load RS64 CP firmware front door load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8e070831 |
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12-Mar-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: renovate sdma fw struct Add sdma firmware struct version 2 to support new SDMA v6 and forward firmware version. v2: squash in fix Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aca670e4 |
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12-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: fix the fw size for sdma For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO may result to the ucode data overflow when copy ucode to BO as the PAGE alignment. IMU have the same issue. Fix the above issue by alignment the fw size per fw ID. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7edda674 |
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31-May-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu/gfx: refine fw hdr check fuction The return value of function amdgpu_ucode_hdr_version doesn't make sense, so change it to return true when fw header version is match with passed in parameters. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
619c94c3 |
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06-Sep-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: extend the show ucode name function Extend amdgpu_ucode_name function to show SDMA TH0, TH1, IMU, RLCP, RLCV and MES related ucode name via ucode id. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a32fa029 |
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05-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support IMU front door load Support for front door to load IMU firmware. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6777c8cf |
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01-Sep-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support for new SDMA front door load Support for SDMA v6_0 ucode front door load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8e41a56a |
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11-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support RLCV firmware front door load Support RLCV firmware front door load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a0fe38b4 |
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11-Apr-2022 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: support RLCP firmware front door load Support RLCP firmware front door load. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b0f34028 |
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14-Apr-2021 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu: add mes kiq frontdoor loading support Add mes kiq frontdoor loading support. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
641f053e |
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24-May-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add gfx firmware header v2_0 We need define new firmware header to support CP RS64 fw. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ab0cd4a9 |
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02-May-2022 |
Alice Wong <shiwei.wong@amd.com> |
drm/amdgpu/ucode: Remove firmware load type check in amdgpu_ucode_free_bo When psp_hw_init failed, it will set the load_type to AMDGPU_FW_LOAD_DIRECT. During amdgpu_device_ip_fini, amdgpu_ucode_free_bo checks that load_type is AMDGPU_FW_LOAD_DIRECT and skips deallocating fw_buf causing memory leak. Remove load_type check in amdgpu_ucode_free_bo. Signed-off-by: Alice Wong <shiwei.wong@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b37c41f2 |
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06-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: enable pptable ucode loading With SCPM enabled, pptable cannot be uploaded to SMU directly. The transferring has to be via PSP. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5fea10d5 |
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31-Aug-2021 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: support print psp v2_0 hdr debug information print out psp firmware v2_0 hdr information for debugging purpose Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1d5eee7d |
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10-Dec-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add function to decode ip version Add function to decode IP version. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4320e6f8 |
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21-Oct-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Update TA version output in driver TA version should only be displayed in firmware version column. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
40320159 |
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15-Oct-2021 |
Qing Wang <wangqing@vivo.com> |
drm/amdgpu: replace snprintf in show functions with sysfs_emit show() must not use snprintf() when formatting the value to be returned to user space. Fix the following coccicheck warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:427: WARNING: use scnprintf or sprintf. Signed-off-by: Qing Wang <wangqing@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aa9f8cc3 |
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09-Aug-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/ucode: add default behavior Default to PSP ucode loading unless the user specifies direct. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
de3a1e33 |
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08-Sep-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Unify PSP TA context Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02f958a2 |
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09-Sep-2021 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: refactor function to init no-psp fw Refactor the code of amdgpu_ucode_init_single_fw to make it more readable as too many ucode need to handle on this function currently. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6457205c |
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12-Aug-2021 |
Candice Li <candice.li@amd.com> |
drm/amd/amdgpu: consolidate PSP TA context Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b8e42844 |
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28-Jul-2021 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: enable psp front door loading by default for cyan_skillfish2 The function is ready on psp firmware, and enable it by default. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c5d0aa48 |
|
16-Jun-2021 |
Lang Yu <lang.yu@amd.com> |
drm/amdgpu: use direct loading by default for cyan_skillfish2 Will switch to front door loading by default after this function is stable. v2: use APU flags (Alex) Signed-off-by: Lang Yu <lang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d594e3cc |
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18-Dec-2018 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: load fw direclty for cyan_skillfish Use backdoor loading. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
222e0a71 |
|
21-Jul-2021 |
Candice Li <candice.li@amd.com> |
drm/amd/amdgpu: add consistent PSP FW loading size checking Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aae435c6 |
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23-Jun-2021 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add function to show ucode name via id Implement function amdgpu_ucode_name to show ucode name via ucode id. v2: rename it to amdgpu_ucode_name Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
79a0f441 |
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08-Jun-2021 |
John Clements <john.clements@amd.com> |
drm/amdgpu: Updated fw header structure source synchronized fw header with latest source Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
531d6e5d |
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03-Nov-2020 |
Aaron Liu <aaron.liu@amd.com> |
drm/amdgpu: support fw load type for yellow carp This patch sets fw load type as direct with fw_load_type=0 for yellow carp. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c0729819 |
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10-Nov-2020 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/amdgpu: add psp support for beige_goby add general PSP support for beige_goby Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2542e3c6 |
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13-Oct-2020 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/amdgpu: set fw load type for beige_goby Use direct load for beige_goby Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2f669734 |
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13-Apr-2020 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: allow use psp to load firmware (v2) Match existing asics. v2: rebase (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d39da7da |
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12-Nov-2019 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: set fw load type for aldebaran Set backdoor loading way in current phase v2: change case location to not break other asics Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a6d64c1a |
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06-Dec-2020 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr() the smc v2_0 printer is not compatible with the smc v2_1 . 1. add smc v2_1 printer. 2. cleanup code Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c4c5ae67 |
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02-Nov-2020 |
Deepak R Varma <mh12gx2825@gmail.com> |
drm/amdgpu/amdgpu: use "*" adjacent to data name When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
843c7eb2 |
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30-Sep-2020 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add rlc iram and dram firmware support Support to load RLC iram and dram ucode when RLC firmware struct use v2.2 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5bab858e |
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30-Sep-2020 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add rlc iram and dram firmware support Support to load RLC iram and dram ucode when RLC firmware struct use v2.2 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f897ea35 |
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01-Oct-2020 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: enable front door loading for dimgrey_cavefish Support both back and front door loading for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a14e0936 |
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09-Mar-2020 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: set fw load type for dimgrey_cavefish Use direct load for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ed3b7353 |
|
16-Sep-2020 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: enable psp support for vangogh This patch is to enable psp support for vangogh Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b0ebc8e9 |
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11-Oct-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: set fw load type for van gogh This patch sets fw load type as direct for van gogh for the moment. Will switch to psp when psp is ready. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1348969a |
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23-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: drm_device to amdgpu_device by inline-f (v2) Get the amdgpu_device from the DRM device by use of an inline function, drm_to_adev(). The inline function resolves a pointer to struct drm_device to a pointer to struct amdgpu_device. v2: Use a typed visible static inline function instead of an invisible macro. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
53b3f8f4 |
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19-Aug-2020 |
Dennis Li <Dennis.Li@amd.com> |
drm/amdgpu: refine codes to avoid reentering GPU recovery if other threads have holden the reset lock, recovery will fail to try_lock. Therefore we introduce atomic hive->in_reset and adev->in_gpu_reset, to avoid reentering GPU recovery. v2: drop "? true : false" in the definition of amdgpu_in_reset Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Dennis Li <Dennis.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f1403342 |
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12-Aug-2020 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: revert "fix system hang issue during GPU reset" The whole approach wasn't thought through till the end. We already had a reset lock like this in the past and it caused the same problems like this one. Completely revert the patch for now and add individual trylock protection to the hardware access functions as necessary. This reverts commit df9c8d1aa278c435c30a69b8f2418b4a52fcb929. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
df9c8d1a |
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08-Jul-2020 |
Dennis Li <Dennis.Li@amd.com> |
drm/amdgpu: fix system hang issue during GPU reset when GPU hang, driver has multi-paths to enter amdgpu_device_gpu_recover, the atomic adev->in_gpu_reset and hive->in_reset are used to avoid re-entering GPU recovery. During GPU reset and resume, it is unsafe that other threads access GPU, which maybe cause GPU reset failed. Therefore the new rw_semaphore adev->reset_sem is introduced, which protect GPU from being accessed by external threads during recovery. v2: 1. add rwlock for some ioctls, debugfs and file-close function. 2. change to use dqm->is_resetting and dqm_lock for protection in kfd driver. 3. remove try_lock and change adev->in_gpu_reset as atomic, to avoid re-enter GPU recovery for the same GPU hang. v3: 1. change back to use adev->reset_sem to protect kfd callback functions, because dqm_lock couldn't protect all codes, for example: free_mqd must be called outside of dqm_lock; [ 1230.176199] Hardware name: Supermicro SYS-7049GP-TRT/X11DPG-QT, BIOS 3.1 05/23/2019 [ 1230.177221] Call Trace: [ 1230.178249] dump_stack+0x98/0xd5 [ 1230.179443] amdgpu_virt_kiq_reg_write_reg_wait+0x181/0x190 [amdgpu] [ 1230.180673] gmc_v9_0_flush_gpu_tlb+0xcc/0x310 [amdgpu] [ 1230.181882] amdgpu_gart_unbind+0xa9/0xe0 [amdgpu] [ 1230.183098] amdgpu_ttm_backend_unbind+0x46/0x180 [amdgpu] [ 1230.184239] ? ttm_bo_put+0x171/0x5f0 [ttm] [ 1230.185394] ttm_tt_unbind+0x21/0x40 [ttm] [ 1230.186558] ttm_tt_destroy.part.12+0x12/0x60 [ttm] [ 1230.187707] ttm_tt_destroy+0x13/0x20 [ttm] [ 1230.188832] ttm_bo_cleanup_memtype_use+0x36/0x80 [ttm] [ 1230.189979] ttm_bo_put+0x1be/0x5f0 [ttm] [ 1230.191230] amdgpu_bo_unref+0x1e/0x30 [amdgpu] [ 1230.192522] amdgpu_amdkfd_free_gtt_mem+0xaf/0x140 [amdgpu] [ 1230.193833] free_mqd+0x25/0x40 [amdgpu] [ 1230.195143] destroy_queue_cpsch+0x1a7/0x270 [amdgpu] [ 1230.196475] pqm_destroy_queue+0x105/0x260 [amdgpu] [ 1230.197819] kfd_ioctl_destroy_queue+0x37/0x70 [amdgpu] [ 1230.199154] kfd_ioctl+0x277/0x500 [amdgpu] [ 1230.200458] ? kfd_ioctl_get_clock_counters+0x60/0x60 [amdgpu] [ 1230.201656] ? tomoyo_file_ioctl+0x19/0x20 [ 1230.202831] ksys_ioctl+0x98/0xb0 [ 1230.204004] __x64_sys_ioctl+0x1a/0x20 [ 1230.205174] do_syscall_64+0x5f/0x250 [ 1230.206339] entry_SYSCALL_64_after_hwframe+0x49/0xbe 2. remove try_lock and introduce atomic hive->in_reset, to avoid re-enter GPU recovery. v4: 1. remove an unnecessary whitespace change in kfd_chardev.c 2. remove comment codes in amdgpu_device.c 3. add more detailed comment in commit message 4. define a wrap function amdgpu_in_reset v5: 1. Fix some style issues. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Suggested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Lijo Lazar <Lijo.Lazar@amd.com> Suggested-by: Luben Tukov <luben.tuikov@amd.com> Signed-off-by: Dennis Li <Dennis.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f081e697 |
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29-Apr-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: use front door firmware loading for navy_flounder Same as other navi asics. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
47eb83d9 |
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10-Feb-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: set fw load type for navy_flounder Currently navy_flounder only supports backdoor loading type. Will switch to psp load type when psp is ready. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43a188e0 |
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06-May-2020 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu/psp: initialization PSP SPL fw Support for psp firmware header version v1_3 initialization and information print. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aa1faaa1 |
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06-Jun-2019 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu: upload mes firmware to gpu buffer Copy mes firmware to gpu buffer. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d4f3c390 |
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18-Mar-2019 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: set fw load type for sienna_cichlid Same as Navi1x. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
358e00e0 |
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24-Mar-2020 |
Kent Russell <kent.russell@amd.com> |
drm/amdgpu: Expose TA FW version in fw_version file Reporting the fw_version just returns 0, the actual version is kept as ta_*_ucode_version. This is the same as the feature reported in the amdgpu_firmware_info debugfs file. Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02350f0b |
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22-Oct-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amdgpu: Add ucode support for DMCUB The DMCUB is a secondary DMCU (Display MicroController Unit) that has its own separate firmware. It's required for DMCU support on Renoir. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
90c88dab |
|
23-Sep-2019 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: enable psp front door loading by default on Arcturus Front door firmware loading is done via the psp rather than the driver. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6c2243ef |
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15-Aug-2019 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu: fix debug level for ppt offset/size Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
8deac236 |
|
09-Aug-2019 |
Aaron Liu <aaron.liu@amd.com> |
drm/amdgpu: set fw default loading by psp for renoir By default, set amdgpu ucode type to AMDGPU_FW_LOAD_PSP. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6a7a0bdb |
|
09-Aug-2019 |
Aaron Liu <aaron.liu@amd.com> |
drm/amdgpu: add psp_v12_0 for renoir (v2) 1. Add psp ip block 2. Use direct loading type by default and it can also config psp loading type. 3. Bypass sos fw loading and xgmi&ras interface v2: drop TA loading Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
378d5389 |
|
24-Jul-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: set fw load type for renoir This patch sets fw load type as direct for renoir for the moment. Will switch to psp when psp is ready. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d4d838ba |
|
17-Dec-2018 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu: use front door firmware loading for navi12 Same as other navi asics. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
dc0d9622 |
|
22-Jul-2019 |
John Clements <John.Clements@amd.com> |
drm/amdgpu: add PSP KDB loading support for Arcturus Add support for the arcturus specific psp metadata to the amdgpu firmware and properly parse it when loading it. Signed-off-by: John Clements <john.clements@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7fafd613 |
|
10-Sep-2018 |
Le Ma <le.ma@amd.com> |
drm/amdgpu: set Arcturus fw load type as direct We currently only support direct firmware loading. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e2d2607f |
|
17-Dec-2018 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu: add navi14 ucode loading method Same as navi10. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
42989359 |
|
10-Jul-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: support key database loading for navi10 Starting from navi10, driver should send Key Database Load command to bootloader before loading sys_drv and sos Signed-off-by: John Clements <John.Clements@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
336a1c82 |
|
20-Feb-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: bump smc firmware header version to v2 (v2) This patch bumps smc firmware header version to v2 for storing soft pptable. v2: fix the typo, and add prints for v2 header Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bb67469e |
|
30-Jan-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: enable psp front door loading by default on navi10 Required for production hw and vddgfx. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
434dbb2a |
|
23-Oct-2018 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu/psp: support print out psp firmware header v1_1 info Support version 1.1. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6fa40564 |
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23-Oct-2018 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add helper function to print psp hdr print the psp header data like we do for other firmwares. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9dd4b75c |
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18-Jul-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: set navi10's fw loading type as direct For bring up. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fdf2f6c5 |
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09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop use of drmP.h in amdgpu/amdgpu* Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
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#
5bb23532 |
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22-Apr-2019 |
Ori Messinger <Ori.Messinger@amd.com> |
drm/amdgpu: Report firmware versions with sysfs v2 Firmware versions can be found as separate sysfs files at: /sys/class/drm/cardX/device/fw_version (where X is the card number) The firmware versions are displayed in hexadecimal. v2: Moved sysfs files to subfolder Signed-off-by: Ori Messinger <ori.messinger@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f667dc38 |
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26-Sep-2018 |
YueHaibing <yuehaibing@huawei.com> |
drm/amdgpu: remove set but not used variable 'header' Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c: In function 'amdgpu_ucode_init_bo': drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:431:39: warning: variable 'header' set but not used [-Wunused-but-set-variable] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b19caa17 |
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10-Oct-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Remove wrong fw loading type warning Remove the warning message: "-1 is not supported on VI" the -1 is the default fw load type, mean auto. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
735f654e |
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09-Oct-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Remove amdgpu_ucode_fini_bo The variable clean is unnecessary. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c8963ea4 |
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08-Oct-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Split amdgpu_ucode_init/fini_bo into two functions 1. one is for create/free bo when init/fini 2. one is for fill the bo before fw loading the ucode bo only need to be created when load driver and free when driver unload. when resume/reset, driver only need to re-fill the bo if the bo is allocated in vram. Suggested by Christian. v2: Return error when bo create failed. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
07da6aa4 |
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29-Sep-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Don't reallocate ucode bo when suspend driver don't release the ucode memory when suspend. so don't need to allocate bo when resume back. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9b008fb7 |
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29-Sep-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Remove FW_LOAD_DIRECT type support on VI AMDGPU_FW_LOAD_DIRECT is used for bring up. Now it don't work any more. so remove the support. v2: Add warning message if user select AMDGPU_FW_LOAD_DIRECT/AMDGPU_FW_LOAD_PSP on VI. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
741deade |
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13-Sep-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: simplify Raven, Raven2, and Picasso handling Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
669018bd |
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10-Jul-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add picasso ucode loading method Same as raven. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
01fcfc83 |
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11-Sep-2018 |
David Francis <David.Francis@amd.com> |
drm/amd: Add ucode DMCU support DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DMCU has two pieces of firmware: the ERAM and the interrupt vectors, which must be loaded seperately. To this end, the DMCU firmware has a custom header and parsing logic similar to MEC, to extract the two ucodes from a single struct firmware. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d9997b64 |
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28-Aug-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add missing CHIP_HAINAN in amdgpu_ucode_get_load_type This caused a confusing error message, but there is functionally no problem since the default method is DIRECT. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
0df5295c |
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09-Jul-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu/vg20: Change the load type of vega20 to psp (v2) Modified the vega20 load type to psp now that psp support is implemented. v2: squash in fixes history (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
24e6bc78 |
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23-Apr-2018 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu: Set vega20 load_type to AMDGPU_FW_LOAD_DIRECT. Please revert this patch when psp load fw is enabled. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4b1f540a |
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19-Apr-2018 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu: Add vega20 ucode loading method The same as vega10. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
34fd54bc |
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09-Nov-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: specify VEGAM ucode SMU load method Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
621a6318 |
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22-Jan-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add save restore list cntl gpm and srm firmware support RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d40e9b13 |
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22-Jan-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add new rlc firmware header format v2.1 Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc8282a7 |
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15-Jan-2018 |
Masanari Iida <standby24x7@gmail.com> |
treewide: Fix typos in printk This patch fixes spelling typos found in printk. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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#
6b9c6e1b |
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19-Oct-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu: add vega12 ucode loading method Same as vega10. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
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#
a95b0275 |
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14-Nov-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:cleanup firmware.fw_buf alloc/free use bo_create/free_kernel instead of manually doing it Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
503846e0 |
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17-Oct-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:cleanup ucode_init_bo 1,no sriov check since gpu recover is unified 2,need CPU_ACCESS_REQUIRED flag for VRAM if SRIOV because otherwise after following PIN the first allocated VRAM bo is wasted due to some TTM mgr reason. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
13a752e3 |
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17-Oct-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:cleanup in_sriov_reset and lock_reset since now gpu reset is unified with gpu_recover for both bare-metal and SR-IOV: 1)rename in_sriov_reset to in_gpu_reset 2)move lock_reset from adev->virt to adev Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d59c026b |
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15-Sep-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu/sriov:fix memory leak after gpu reset GPU reset will require all hw doing hw_init thus ucode_init_bo will be invoked again, which lead to memory leak skip the fw_buf allocation during sriov gpu reset to avoid memory leak. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
50811c71 |
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04-Sep-2017 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: enable raven to load firmwares by psp at default (v2) - v2: share code with CHIP_VEGA10 case Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02dc13e4 |
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10-Aug-2017 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: jt_size was wrongly counted twice Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2046d46d |
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20-Jul-2017 |
Yong Zhao <Yong.Zhao@amd.com> |
drm/amdgpu: Add a parameter to amdgpu_bo_create() The parameter init_value contains the value to which we initialized VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
342169c4 |
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04-Jul-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: set firmware loading type as direct by default for raven In previous case, driver can't enable psp via the kernel parameter for raven. We should open this path and set it as direct by default till psp firmware loading is workable. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7504938f |
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07-Jun-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add check when no firmware need to load Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
948edf09 |
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09-Jun-2017 |
horchen <horace.chen@amd.com> |
drm/amdgpu: add contiguous flag in ucode bo create Under VF environment, the ucode would be settled to the visible VRAM, As it would be pinned to the visible VRAM, it's better to add contiguous flag,otherwise it need to move gpu address during the pin process. This movement is not necessary. Signed-off-by: horchen <horace.chen@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4456ef4e |
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04-May-2017 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add Raven chip id case for ucode Set the appropriate ucode loading mechanism. Set to direct for now. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ae1a336 |
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26-Apr-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add gpu_info firmware (v3) Add a new gpu info firmware to store gpu specific configuration data. This allows us to store hw constants in a unified place. v2: adjust structure and elements v3: further restructure Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Tested-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc108ec7 |
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10-Apr-2017 |
Trigger Huang <trigger.huang@amd.com> |
drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2) In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE, there is no actual firmware data, but we still need alloc a BO and tell the BO's mc address to HW, or world switch will hang on VFs. v2: fix coding style (Alex) Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2445b227 |
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03-Mar-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: rework common ucode handling for vega10 Handle ucode differences in vega10. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e635ee07 |
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01-Nov-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: use new flag to handle different firmware loading method This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
daf42c31 |
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10-Oct-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add a ucode size member into firmware info This will be used for newer asics. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4c2b2453 |
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27-Sep-2016 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:properly fix some JumpTable issues we found some MEC ucode leads to IB test fail or even ring test fail if Jump Table of it is not start in FW bo with page aligned address, fixed by always make JT address page aligned. we don't need to patch JT2 for MEC2, because for VI, MEC2 is a copy of MEC1, thus when converting fw_type for MEC_JT2 we just return MEC1,hw can use the same JT for both MEC1 & MEC2. above two change fixed some ring/ib test failure issue for some version of MEC ucode. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bed5712e |
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26-Sep-2016 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:add MEC_STORAGE ucode id for sriov for sriov, SMC need MEC_STORAGE reserved in fw bo. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Frank Min <frank.min@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f501a7e5 |
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27-Apr-2016 |
Frank Min <Frank.Min@amd.com> |
drm/amdgpu:fw bo should be in VRAM for SRIOV for GTT memory SMC can only access it within PF space, which is not used for SRIOV case, thus for SRIOV case, we let SMC use FB space for ucode bo. Signed-off-by: Frank Min <frank.min@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
806c60c2 |
|
28-Sep-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: clean up to set fw_offset as 0 twice Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fd506558 |
|
11-Sep-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: move some release handles into fail labels (v2) Clean up the codes to move the release handles into fail labels. v2: squash in Christian's regression fix Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
72d7668b |
|
03-Sep-2015 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: export reservation_object from dmabuf to ttm (v2) Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c. Port of radeon commit 831b6966a60fe72d85ae3576056b4e4e0775b112. v2: fix up kfd. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
d38ceaf9 |
|
20-Apr-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add core driver (v4) This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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