Searched refs:low_part (Results 1 - 25 of 32) sorted by relevance

12

/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c122 address->grph.meta_addr.low_part);
131 address->grph.addr.low_part);
151 address->video_progressive.chroma_meta_addr.low_part);
159 address->video_progressive.luma_meta_addr.low_part);
168 address->video_progressive.chroma_addr.low_part);
176 address->video_progressive.luma_addr.low_part);
202 address->grph_stereo.right_alpha_meta_addr.low_part);
210 address->grph_stereo.right_meta_addr.low_part);
220 address->grph_stereo.left_alpha_meta_addr.low_part);
228 address->grph_stereo.left_meta_addr.low_part);
[all...]
H A Ddcn30_mmhubbub.c84 REG_SET(MMHUBBUB_WARMUP_BASE_ADDR_LOW, 0, MMHUBBUB_WARMUP_BASE_ADDR_LOW, start_address_shift.low_part);
/linux-master/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn30.c102 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
111 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
137 REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part);
152 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);
163 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
170 REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);
180 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);
187 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
196 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
H A Ddmub_dcn32.c164 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
173 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
194 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
203 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
226 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);
235 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
244 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);
251 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
260 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
517 REG_WRITE(DMCUB_SCRATCH9, addr->grph.addr.low_part);
[all...]
H A Ddmub_dcn20.c169 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
178 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
206 REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part);
221 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);
233 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
240 REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);
250 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);
257 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
266 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
H A Ddmub_dcn31.c165 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
174 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
197 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);
206 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
215 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);
222 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
231 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
H A Ddmub_dcn35.c183 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
192 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
211 REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);
218 REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);
239 REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);
248 REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
257 REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);
264 REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
273 REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
282 REG_WRITE(DMCUB_REGION6_OFFSET, offset.u.low_part);
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Dcompressor.h42 uint32_t low_part; member in struct:fbc_physical_address::__anon2486
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.c402 address->grph.meta_addr.low_part);
411 address->grph.addr.low_part);
431 address->video_progressive.chroma_meta_addr.low_part);
439 address->video_progressive.luma_meta_addr.low_part);
448 address->video_progressive.chroma_addr.low_part);
456 address->video_progressive.luma_addr.low_part);
482 address->grph_stereo.right_meta_addr.low_part);
492 address->grph_stereo.left_meta_addr.low_part);
501 address->grph_stereo.right_addr.low_part);
509 address->grph_stereo.left_addr.low_part);
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hubp.c716 address->grph.meta_addr.low_part;
722 address->grph.addr.low_part;
733 address->video_progressive.luma_meta_addr.low_part;
738 address->video_progressive.chroma_meta_addr.low_part;
744 address->video_progressive.luma_addr.low_part;
749 address->video_progressive.chroma_addr.low_part;
765 address->grph_stereo.right_meta_addr.low_part;
772 address->grph_stereo.left_meta_addr.low_part;
778 address->grph_stereo.left_addr.low_part;
783 address->grph_stereo.right_addr.low_part;
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.c68 DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, mc_vm_apt_default.low_part);
605 CURSOR_SURFACE_ADDRESS, attr->address.low_part);
624 hubp->att.SURFACE_ADDR = attr->address.low_part;
662 REG_WRITE(DMDATA_ADDRESS_LOW, attr->address.low_part);
756 address->grph.meta_addr.low_part);
765 address->grph.addr.low_part);
785 address->video_progressive.chroma_meta_addr.low_part);
793 address->video_progressive.luma_meta_addr.low_part);
802 address->video_progressive.chroma_addr.low_part);
810 address->video_progressive.luma_addr.low_part);
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hubp.c127 CURSOR_SURFACE_ADDRESS, attr->address.low_part);
H A Ddcn32_mmhubbub.c84 REG_SET(MMHUBBUB_WARMUP_BASE_ADDR_LOW, 0, MMHUBBUB_WARMUP_BASE_ADDR_LOW, start_address_shift.low_part);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c209 hws->fb_base.low_part = fb_base;
212 hws->fb_top.low_part = fb_top;
214 hws->fb_offset.low_part = fb_offset;
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_hw_types.h47 uint32_t low_part; member in struct:large_integer::__anon211
52 uint32_t low_part; member in struct:large_integer::__anon212
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_ipp.c131 CURSOR_SURFACE_ADDRESS, attributes->address.low_part);
H A Ddce_mem_input.c806 GRPH_SECONDARY_SURFACE_ADDRESS, address.low_part >> 8,
821 address.low_part >> 8);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c417 clk_mgr_dcn316->smu_wm_set.mc_address.low_part);
437 smu_dpm_clks->mc_address.low_part);
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c346 address->grph.meta_addr.low_part = lower_32_bits(dcc_address);
792 address->grph.addr.low_part = lower_32_bits(addr);
815 address->video_progressive.luma_addr.low_part =
819 address->video_progressive.chroma_addr.low_part =
1269 attributes.address.low_part = lower_32_bits(address);
/linux-master/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_compressor.c302 compressor->compr_surface_address.addr.low_part;
H A Ddce110_mem_input_v.c81 temp = address.low_part >>
117 temp = address.low_part >>
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c352 pipe_ctx->plane_state->address.grph.addr.low_part,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c495 clk_mgr_dcn31->smu_wm_set.mc_address.low_part);
515 smu_dpm_clks->mc_address.low_part);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c447 clk_mgr_dcn315->smu_wm_set.mc_address.low_part);
467 smu_dpm_clks->mc_address.low_part);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c560 clk_mgr_dcn314->smu_wm_set.mc_address.low_part);
580 smu_dpm_clks->mc_address.low_part);

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