Searched refs:iowrite32 (Results 1 - 25 of 510) sorted by relevance

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/linux-master/drivers/net/ethernet/cisco/enic/
H A Dvnic_cq.c48 iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
49 iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
50 iowrite32(color_enable, &cq->ctrl->color_enable);
51 iowrite32(cq_head, &cq->ctrl->cq_head);
52 iowrite32(cq_tail, &cq->ctrl->cq_tail);
53 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
54 iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
55 iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
56 iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
57 iowrite32(interrupt_offse
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H A Dvnic_intr.c42 iowrite32(coalescing_type, &intr->ctrl->coalescing_type);
43 iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);
44 iowrite32(0, &intr->ctrl->int_credits);
50 iowrite32(vnic_dev_intr_coal_timer_usec_to_hw(intr->vdev,
56 iowrite32(0, &intr->ctrl->int_credits);
/linux-master/drivers/scsi/fnic/
H A Dvnic_cq.c50 iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
51 iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
52 iowrite32(color_enable, &cq->ctrl->color_enable);
53 iowrite32(cq_head, &cq->ctrl->cq_head);
54 iowrite32(cq_tail, &cq->ctrl->cq_tail);
55 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
56 iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
57 iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
58 iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
59 iowrite32(interrupt_offse
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H A Dvnic_intr.c39 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);
40 iowrite32(coalescing_type, &intr->ctrl->coalescing_type);
41 iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);
42 iowrite32(0, &intr->ctrl->int_credits);
47 iowrite32(0, &intr->ctrl->int_credits);
H A Dvnic_wq_copy.c15 iowrite32(1, &wq->ctrl->enable);
22 iowrite32(0, &wq->ctrl->enable);
50 iowrite32(0, &wq->ctrl->fetch_index);
51 iowrite32(0, &wq->ctrl->posted_index);
52 iowrite32(0, &wq->ctrl->error_status);
92 iowrite32(wq->ring.desc_count, &wq->ctrl->ring_size);
93 iowrite32(0, &wq->ctrl->fetch_index);
94 iowrite32(0, &wq->ctrl->posted_index);
95 iowrite32(cq_index, &wq->ctrl->cq_index);
96 iowrite32(error_interrupt_enabl
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H A Dvnic_wq.c151 iowrite32(count, &wq->ctrl->ring_size);
152 iowrite32(fetch_index, &wq->ctrl->fetch_index);
153 iowrite32(posted_index, &wq->ctrl->posted_index);
154 iowrite32(cq_index, &wq->ctrl->cq_index);
155 iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);
156 iowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);
157 iowrite32(0, &wq->ctrl->error_status);
173 iowrite32(wq->ring.desc_count, &wq->ctrl->ring_size);
174 iowrite32(0, &wq->ctrl->fetch_index);
175 iowrite32(
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/linux-master/drivers/scsi/snic/
H A Dvnic_cq.c43 iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);
44 iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);
45 iowrite32(color_enable, &cq->ctrl->color_enable);
46 iowrite32(cq_head, &cq->ctrl->cq_head);
47 iowrite32(cq_tail, &cq->ctrl->cq_tail);
48 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);
49 iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);
50 iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);
51 iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);
52 iowrite32(interrupt_offse
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H A Dvnic_intr.c36 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);
37 iowrite32(coalescing_type, &intr->ctrl->coalescing_type);
38 iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);
39 iowrite32(0, &intr->ctrl->int_credits);
44 iowrite32(0, &intr->ctrl->int_credits);
/linux-master/arch/arm/mach-shmobile/
H A Dsetup-r8a7740.c33 iowrite32(0x01600164, reg);
47 iowrite32(0x0, pfc_inta_ctrl);
54 iowrite32(0x0, intc_prio_base + 0x0);
55 iowrite32(0x0, intc_prio_base + 0x4);
56 iowrite32(0x0, intc_prio_base + 0x8);
57 iowrite32(0x0, intc_prio_base + 0xc);
/linux-master/drivers/net/wwan/t7xx/
H A Dt7xx_cldma.c34 iowrite32(val, hw_info->ap_pdn_base + REG_CLDMA_IP_BUSY);
57 iowrite32(ul_cfg, hw_info->ap_pdn_base + REG_CLDMA_UL_CFG);
59 iowrite32(UL_MEM_CHECK_DIS, hw_info->ap_pdn_base + REG_CLDMA_UL_MEM);
60 iowrite32(DL_MEM_CHECK_DIS, hw_info->ap_pdn_base + REG_CLDMA_DL_MEM);
72 iowrite32(val, reg);
78 iowrite32(TXRX_STATUS_BITMASK, hw_info->ap_pdn_base + REG_CLDMA_L2TIMCR0);
79 iowrite32(TXRX_STATUS_BITMASK, hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0);
81 iowrite32(EMPTY_STATUS_BITMASK, hw_info->ap_pdn_base + REG_CLDMA_L2TIMCR0);
82 iowrite32(EMPTY_STATUS_BITMASK, hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0);
91 iowrite32(va
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H A Dt7xx_mhccif.c37 iowrite32(mask, mhccif_pbase + REG_EP2RC_SW_INT_ACK);
50 iowrite32(val, IREG_BASE(t7xx_dev) + DISABLE_ASPM_LOWPWR);
68 iowrite32(T7XX_L1_BIT(1), IREG_BASE(t7xx_dev) + ENABLE_ASPM_LOWPWR);
73 iowrite32(val, IREG_BASE(t7xx_dev) + ENABLE_ASPM_LOWPWR);
87 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_SET);
92 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_CLR);
120 iowrite32(BIT(channel), mhccif_pbase + REG_RC2EP_SW_BSY);
121 iowrite32(channel, mhccif_pbase + REG_RC2EP_SW_TCHNUM);
H A Dt7xx_dpmaif.c42 iowrite32(DPMAIF_AP_ALL_L2TISAR0_MASK, hw_info->pcie_base + DPMAIF_AP_L2TISAR0);
45 iowrite32(ul_intr_enable, hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMCR0);
46 iowrite32(~ul_intr_enable, hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMSR0);
60 iowrite32(DPMAIF_AP_APDL_ALL_L2TISAR0_MASK, hw_info->pcie_base + DPMAIF_AP_APDL_L2TISAR0);
63 iowrite32(~ul_intr_enable, hw_info->pcie_base + DPMAIF_AO_UL_APDL_L2TIMSR0);
71 iowrite32(DPMAIF_AP_IP_BUSY_MASK, hw_info->pcie_base + DPMAIF_AP_IP_BUSY);
72 iowrite32(isr_en_msk->ap_udl_ip_busy_en_msk,
76 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0);
77 iowrite32(DPMA_HPC_ALL_INT_MASK, hw_info->pcie_base + DPMAIF_HPC_INTR_MASK);
91 iowrite32(ul_int_que_don
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/linux-master/drivers/watchdog/
H A Ddavinci_wdt.c80 iowrite32(0, davinci_wdt->base + TCR);
82 iowrite32(0, davinci_wdt->base + TGCR);
84 iowrite32(tgcr, davinci_wdt->base + TGCR);
86 iowrite32(0, davinci_wdt->base + TIM12);
87 iowrite32(0, davinci_wdt->base + TIM34);
90 iowrite32(timer_margin, davinci_wdt->base + PRD12);
92 iowrite32(timer_margin, davinci_wdt->base + PRD34);
94 iowrite32(ENAMODE12_PERIODIC, davinci_wdt->base + TCR);
100 iowrite32(WDKEY_SEQ0 | WDEN, davinci_wdt->base + WDTCR);
102 iowrite32(WDKEY_SEQ
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/linux-master/include/linux/pds/
H A Dpds_intr.h119 iowrite32(coal, &intr_ctrl->coal_init);
125 iowrite32(mask, &intr_ctrl->mask);
137 iowrite32(cred | flags, &intr_ctrl->credits);
148 iowrite32(cred, &intr_ctrl->credits);
160 iowrite32(mask, &intr_ctrl->mask_on_assert);
/linux-master/arch/arc/plat-axs10x/
H A Daxs10x.c67 iowrite32(~(1 << MB_TO_GPIO_IRQ), (void __iomem *) GPIO_INTMASK);
68 iowrite32(0, (void __iomem *) GPIO_INTTYPE_LEVEL);
69 iowrite32(~0, (void __iomem *) GPIO_INT_POLARITY);
70 iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);
239 iowrite32(slave_select, base + 0x0); /* SLV0 */
240 iowrite32(slave_offset, base + 0x8); /* OFFSET0 */
248 iowrite32(slave_select, base + 0x4); /* SLV1 */
249 iowrite32(slave_offset, base + 0xC); /* OFFSET1 */
258 iowrite32(1, (void __iomem *) CREG_CPU_ADDR_770_UPD);
263 iowrite32(
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/linux-master/drivers/net/ethernet/dec/tulip/
H A Dmedia.c68 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
82 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
84 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
91 iowrite32(MDIO_ENB | dataval, mdio_addr);
93 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
98 iowrite32(MDIO_ENB_IN, mdio_addr);
101 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
123 iowrite32(val, ioaddr + comet_miireg2offset[location]);
129 iowrite32(cmd, ioaddr + 0xA0);
141 iowrite32(MDIO_EN
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H A D21142.c79 iowrite32(0, ioaddr + CSR13);
80 iowrite32(0x0003FFFF, ioaddr + CSR14);
82 iowrite32(t21142_csr13[dev->if_port], ioaddr + CSR13);
87 iowrite32(0, ioaddr + CSR13);
88 iowrite32(0x0003FFFF, ioaddr + CSR14);
90 iowrite32(1, ioaddr + CSR13);
98 iowrite32(0x0301, ioaddr + CSR12);
124 iowrite32(0x0001, ioaddr + CSR13);
126 iowrite32(csr14, ioaddr + CSR14);
128 iowrite32(t
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H A Dpnic.c33 iowrite32(0x32 | (dev->if_port & 1), ioaddr + CSR12);
35 iowrite32(0x1F868, ioaddr + 0xB8);
62 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkFail) | TPLnkPass, ioaddr + CSR7);
70 iowrite32(tp->csr6, ioaddr + CSR6);
71 iowrite32(0x30, ioaddr + CSR12);
72 iowrite32(0x0201F078, ioaddr + 0xB8); /* Turn on autonegotiation. */
83 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkPass) | TPLnkFail, ioaddr + CSR7);
118 iowrite32(0x0201F078, ioaddr + 0xB8);
137 iowrite32(0x33, ioaddr + CSR12);
139 iowrite32(
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/linux-master/drivers/w1/masters/
H A Damd_axi_w1.c81 iowrite32(IRQ, amd_axi_w1_local->base_addr + AXIW1_IRQE_REG);
123 iowrite32(AXIW1_READBIT, amd_axi_w1_local->base_addr + AXIW1_INST_REG);
126 iowrite32(AXIW1_WRITEBIT + (bit & 0x01),
130 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG);
144 iowrite32(AXI_CLEAR, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG);
170 iowrite32(AXIW1_READBYTE, amd_axi_w1_local->base_addr + AXIW1_INST_REG);
173 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG);
186 iowrite32(AXI_CLEAR, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG);
211 iowrite32(AXIW1_WRITEBYTE + val, amd_axi_w1_local->base_addr + AXIW1_INST_REG);
214 iowrite32(AXIW1_G
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/linux-master/drivers/ata/
H A Dsata_rcar.c158 iowrite32(0, base + SATAPHYADDR_REG);
160 iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
163 iowrite32(0, base + SATAPHYRESET_REG);
173 iowrite32(0, base + SATAPHYRESET_REG);
175 iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
177 iowrite32(val, base + SATAPHYWDATA_REG);
182 iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
192 iowrite32(0, base + SATAPHYADDR_REG);
210 iowrite32(RCAR_GEN2_PHY_CTL1, base + RCAR_GEN2_PHY_CTL1_REG);
211 iowrite32(RCAR_GEN2_PHY_CTL
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/linux-master/drivers/staging/media/starfive/camss/
H A Dstf-camss.h79 iowrite32(val, stfcamss->isp_base + reg);
85 iowrite32(val, stfcamss->isp_base + reg);
97 iowrite32(val, stfcamss->isp_base + reg);
102 iowrite32(ioread32(stfcamss->isp_base + reg) | mask,
114 iowrite32(val, stfcamss->syscon_base + reg);
123 iowrite32(value | bit_mask, stfcamss->syscon_base + reg);
132 iowrite32(value & ~bit_mask, stfcamss->syscon_base + reg);
/linux-master/drivers/net/ethernet/pensando/ionic/
H A Dionic_regs.h56 iowrite32(coal, &intr_ctrl[intr_idx].coal_init);
62 iowrite32(mask, &intr_ctrl[intr_idx].mask);
73 iowrite32(cred | flags, &intr_ctrl[intr_idx].credits);
84 iowrite32(cred, &intr_ctrl[intr_idx].credits);
90 iowrite32(mask, &intr_ctrl[intr_idx].mask_assert);
/linux-master/drivers/rtc/
H A Drtc-asm9260.c126 iowrite32(0, priv->iobase + HW_CIIR);
177 iowrite32(0, priv->iobase + HW_SEC);
179 iowrite32(tm->tm_year, priv->iobase + HW_YEAR);
180 iowrite32(tm->tm_mon, priv->iobase + HW_MONTH);
181 iowrite32(tm->tm_mday, priv->iobase + HW_DOM);
182 iowrite32(tm->tm_wday, priv->iobase + HW_DOW);
183 iowrite32(tm->tm_yday, priv->iobase + HW_DOY);
184 iowrite32(tm->tm_hour, priv->iobase + HW_HOUR);
185 iowrite32(tm->tm_min, priv->iobase + HW_MIN);
186 iowrite32(t
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/linux-master/drivers/media/pci/dt3155/
H A Ddt3155.c40 iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2);
47 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
70 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);
76 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
96 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);
116 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
154 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
155 iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START);
156 iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE);
157 iowrite32(p
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/linux-master/drivers/net/fddi/skfp/h/
H A Dtypes.h33 #define outpd(p,l) iowrite32(l,p)

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