Lines Matching refs:iowrite32

158 	iowrite32(0, base + SATAPHYADDR_REG);
160 iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
163 iowrite32(0, base + SATAPHYRESET_REG);
173 iowrite32(0, base + SATAPHYRESET_REG);
175 iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
177 iowrite32(val, base + SATAPHYWDATA_REG);
182 iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
192 iowrite32(0, base + SATAPHYADDR_REG);
210 iowrite32(RCAR_GEN2_PHY_CTL1, base + RCAR_GEN2_PHY_CTL1_REG);
211 iowrite32(RCAR_GEN2_PHY_CTL2, base + RCAR_GEN2_PHY_CTL2_REG);
212 iowrite32(RCAR_GEN2_PHY_CTL3, base + RCAR_GEN2_PHY_CTL3_REG);
213 iowrite32(RCAR_GEN2_PHY_CTL4, base + RCAR_GEN2_PHY_CTL4_REG);
214 iowrite32(RCAR_GEN2_PHY_CTL5 | RCAR_GEN2_PHY_CTL5_DC |
223 iowrite32(priv->sataint_mask, priv->base + SATAINTMASK_REG);
234 iowrite32(~(u32)SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
239 iowrite32(priv->sataint_mask & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
258 iowrite32(*ptr++, reg);
273 iowrite32(ctl, ap->ioaddr.ctl_addr);
278 iowrite32(ATA_DEVICE_OBS, ap->ioaddr.device_addr);
289 iowrite32(0x55, ioaddr->nsect_addr);
290 iowrite32(0xaa, ioaddr->lbal_addr);
292 iowrite32(0xaa, ioaddr->nsect_addr);
293 iowrite32(0x55, ioaddr->lbal_addr);
295 iowrite32(0x55, ioaddr->nsect_addr);
296 iowrite32(0xaa, ioaddr->lbal_addr);
322 iowrite32(ap->ctl, ioaddr->ctl_addr);
324 iowrite32(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
326 iowrite32(ap->ctl, ioaddr->ctl_addr);
366 iowrite32(tf->ctl, ioaddr->ctl_addr);
372 iowrite32(tf->hob_feature, ioaddr->feature_addr);
373 iowrite32(tf->hob_nsect, ioaddr->nsect_addr);
374 iowrite32(tf->hob_lbal, ioaddr->lbal_addr);
375 iowrite32(tf->hob_lbam, ioaddr->lbam_addr);
376 iowrite32(tf->hob_lbah, ioaddr->lbah_addr);
380 iowrite32(tf->feature, ioaddr->feature_addr);
381 iowrite32(tf->nsect, ioaddr->nsect_addr);
382 iowrite32(tf->lbal, ioaddr->lbal_addr);
383 iowrite32(tf->lbam, ioaddr->lbam_addr);
384 iowrite32(tf->lbah, ioaddr->lbah_addr);
388 iowrite32(tf->device, ioaddr->device_addr);
406 iowrite32(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
412 iowrite32(tf->ctl, ioaddr->ctl_addr);
420 iowrite32(tf->command, ap->ioaddr.command_addr);
497 iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg << 2));
546 iowrite32(ap->bmdma_prd_dma, base + ATAPI_DTB_ADR_REG);
557 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
574 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
589 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
712 iowrite32(~sataintstat & priv->sataint_mask, base + SATAINTSTAT_REG);
769 iowrite32(val, base + ATAPI_CONTROL1_REG);
776 iowrite32(val, base + ATAPI_CONTROL1_REG);
781 iowrite32(val, base + ATAPI_CONTROL1_REG);
784 iowrite32(0, base + SATAINTSTAT_REG);
785 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
788 iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
921 iowrite32(0, base + ATAPI_INT_ENABLE_REG);
923 iowrite32(0, base + SATAINTSTAT_REG);
924 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
940 iowrite32(0, base + ATAPI_INT_ENABLE_REG);
942 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
966 iowrite32(0, base + SATAINTSTAT_REG);
967 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
970 iowrite32(ATAPI_INT_ENABLE_SATAINT,