Searched refs:gvt_vgpu_err (Results 1 - 14 of 14) sorted by relevance

/linux-master/drivers/gpu/drm/i915/gvt/
H A Ddebug.h30 #define gvt_vgpu_err(fmt, args...) \ macro
H A Dfb_decoder.c228 gvt_vgpu_err("Out-of-bounds pixel format index\n");
242 gvt_vgpu_err("Non-supported pixel format (0x%x)\n", fmt);
254 gvt_vgpu_err("Translate primary plane gma 0x%x to gpa fail\n",
354 gvt_vgpu_err("Non-supported cursor mode (0x%x)\n", mode);
377 gvt_vgpu_err("Translate cursor plane gma 0x%x to gpa fail\n",
436 gvt_vgpu_err("Non-supported pixel format (0x%x)\n", fmt);
481 gvt_vgpu_err("Translate sprite plane gma 0x%x to gpa fail\n",
H A Dopregion.c426 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
433 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
439 gvt_vgpu_err("requesting SMI service\n");
452 gvt_vgpu_err("requesting runtime service: func \"%s\","
470 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
477 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
H A Ddmabuf.c292 gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
316 gvt_vgpu_err("invalid plane id:%d\n", plane_id);
322 gvt_vgpu_err("fb size is zero\n");
327 gvt_vgpu_err("Not aligned fb address:0x%llx\n", info->start);
332 gvt_vgpu_err("invalid gma addr\n");
450 gvt_vgpu_err("alloc dmabuf_obj failed\n");
458 gvt_vgpu_err("allocate intel vgpu fb info failed\n");
513 gvt_vgpu_err("invalid dmabuf id:%d\n", dmabuf_id);
520 gvt_vgpu_err("create gvt gem obj failed\n");
529 gvt_vgpu_err("expor
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H A Dedid.c58 gvt_vgpu_err("Driver tries to read EDID without proper sequence!\n");
62 gvt_vgpu_err("edid_get_byte() exceeds the size of EDID!\n");
67 gvt_vgpu_err("Reading EDID but EDID is not available!\n");
78 gvt_vgpu_err("No EDID available during the reading?\n");
265 gvt_vgpu_err("Unknown/reserved GMBUS cycle detected!\n");
336 gvt_vgpu_err("warning: gmbus3 read with nothing returned\n");
H A Dexeclist.c196 gvt_vgpu_err("schedule out context is not running context,"
266 gvt_vgpu_err("virtual execlist slots are full\n");
287 gvt_vgpu_err("no available execlist slot\n");
386 gvt_vgpu_err("fail to emulate execlist schedule in\n");
468 gvt_vgpu_err("invalid elsp submission, desc0 is invalid\n");
476 gvt_vgpu_err("unexpected GGTT elsp submission\n");
487 gvt_vgpu_err("failed to submit desc %d\n", i);
495 gvt_vgpu_err("descriptors content: desc0 %08x %08x desc1 %08x %08x\n",
H A Dscheduler.c230 gvt_vgpu_err("Invalid guest context descriptor\n");
255 gvt_vgpu_err("invalid cmd found in guest context pages\n");
385 gvt_vgpu_err("fail to emit init breadcrumb\n");
393 gvt_vgpu_err("fail to alloc size =%ld shadow ring buffer\n",
470 gvt_vgpu_err("fail to allocate gem request\n");
692 gvt_vgpu_err("fail to vgpu pin mm\n");
699 gvt_vgpu_err("workload shadow ppgtt isn't ready\n");
712 gvt_vgpu_err("LRI shadow ppgtt fail to pin\n");
745 gvt_vgpu_err("fail to pin shadow mm\n");
755 gvt_vgpu_err("fai
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H A Dcmd_parser.c872 gvt_vgpu_err("failed to get the 4-level shadow vm\n");
885 gvt_vgpu_err("invalid shared shadow vm type\n");
900 gvt_vgpu_err("%s access to (%x) outside of MMIO range\n",
916 gvt_vgpu_err("%s access to non-render register (%x)\n",
929 gvt_vgpu_err("%s access to register (%x)\n",
940 gvt_vgpu_err("not allowed cmd %s reg (%x)\n", cmd, offset);
988 gvt_vgpu_err("try to write RO reg %x\n",
1373 gvt_vgpu_err("unknown plane code %d\n", plane);
1491 gvt_vgpu_err("fail to decode MI display flip command\n");
1497 gvt_vgpu_err("invali
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H A Dmmio.c164 gvt_vgpu_err("fail to emulate MMIO read %08x len %d\n",
231 gvt_vgpu_err("fail to emulate MMIO write %08x len %d\n", offset,
H A Dgtt.c836 gvt_vgpu_err("fail to allocate ppgtt shadow page\n");
851 gvt_vgpu_err("fail to map dma addr\n");
973 gvt_vgpu_err("fail to find shadow page: mfn: 0x%lx\n",
1046 gvt_vgpu_err("fail: shadow page %p shadow entry 0x%llx type %d\n",
1128 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1273 gvt_vgpu_err("GVT doesn't support 1GB entry\n");
1315 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1344 gvt_vgpu_err("fail to find guest page\n");
1360 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1395 gvt_vgpu_err("fai
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H A Dkvmgt.c155 gvt_vgpu_err("vfio_pin_pages failed for iova %pad, ret %d\n",
191 gvt_vgpu_err("DMA mapping failed for pfn 0x%lx, ret %d\n",
409 gvt_vgpu_err("invalid op or offset for Intel vgpu OpRegion\n");
451 gvt_vgpu_err("invalid EDID blob\n");
458 gvt_vgpu_err("invalid EDID link state %d\n",
466 gvt_vgpu_err("EDID size is bigger than %d!\n",
474 gvt_vgpu_err("write read-only EDID region at offset %d\n",
516 gvt_vgpu_err("failed to access EDID region\n");
667 gvt_vgpu_err("KVM is required to use Intel vGPU\n");
771 gvt_vgpu_err("Invali
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H A Daperture_gm.c219 gvt_vgpu_err("Failed to alloc fences\n");
250 gvt_vgpu_err("Invalid vGPU creation params\n");
H A Dhandlers.c198 gvt_vgpu_err("access oob fence reg %d/%d\n",
230 gvt_vgpu_err("Unsupported IPS setting %x, cannot enable 64K gtt.\n",
299 gvt_vgpu_err("invalid forcewake offset 0x%x\n", offset);
856 gvt_vgpu_err("Invalid train pattern %d\n", train_pattern);
914 gvt_vgpu_err("Unsupported registers %x\n", offset);
1172 gvt_vgpu_err("Unsupported DP port access!\n");
1230 gvt_vgpu_err("dp_aux_header: len %d is too large\n", len);
1297 gvt_vgpu_err("dp_aux_header: len %d is too large\n", len);
1383 gvt_vgpu_err("SBI caching meets maximum limits\n");
1463 gvt_vgpu_err("invali
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H A Dmmio_context.c397 gvt_vgpu_err("timeout in invalidate ring %s tlb\n",

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