Searched refs:ecclk (Results 1 - 25 of 34) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpower_state.h182 unsigned long ecclk; member in struct:pp_clock_engine_request
H A Dhwmgr.h103 uint32_t ecclk; member in struct:phm_vceclock_voltage_dependency_record
157 uint32_t ecclk; member in struct:phm_vce_clock_voltage_dependency_record
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.c79 if (clock <= ptable->entries[i].ecclk)
87 if (clock >= ptable->entries[i].ecclk)
538 (i < vce_table->count) ? vce_table->entries[i].ecclk : 0;
624 clock = table->entries[level].ecclk;
626 clock = table->entries[table->count - 1].ecclk;
1290 ptable->entries[ptable->count - 1].ecclk;
1735 uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; local
1793 ecclk = vce_table->entries[vce_index].ecclk;
1794 *((uint32_t *)value) = ecclk;
[all...]
H A Dsmu8_hwmgr.h148 uint32_t ecclk; member in struct:smu8_power_state
H A Dsmu7_hwmgr.h74 uint32_t ecclk; member in struct:smu7_vce_clocks
H A Dsmu10_hwmgr.h132 uint32_t ecclk; member in struct:smu10_power_state
H A Dvega10_hwmgr.h102 uint32_t ecclk; member in struct:vega10_vce_clocks
H A Dvega20_hwmgr.h119 uint32_t ecclk; member in struct:vega20_vce_clocks
H A Dprocesspptables.c1254 vce_table->entries[i].ecclk = ((unsigned long)entry->ucECClkHigh << 16)
1689 vce_state->ecclk = ((uint32_t)vce_clock_info->ucECClkHigh << 16) | le16_to_cpu(vce_clock_info->usECClkLow);
/linux-master/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.c947 (old_rps->ecclk != new_rps->ecclk)) {
949 if (new_rps->evclk || new_rps->ecclk)
953 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
1457 u32 evclk, u32 ecclk, u16 *voltage)
1464 if (((evclk == 0) && (ecclk == 0)) ||
1472 (ecclk <= table->entries[i].ecclk)) {
1508 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
1456 trinity_get_vce_clock_voltage(struct radeon_device *rdev, u32 evclk, u32 ecclk, u16 *voltage) argument
[all...]
H A Dradeon_asic.h697 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
749 int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
787 int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
H A Dsi_dpm.c2871 u32 evclk, u32 ecclk, u16 *voltage)
2878 if (((evclk == 0) && (ecclk == 0)) ||
2886 (ecclk <= table->entries[i].ecclk)) {
2945 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
2946 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk,
2950 rps->ecclk = 0;
5872 (old_rps->ecclk != new_rps->ecclk)) {
2870 si_get_vce_clock_voltage(struct radeon_device *rdev, u32 evclk, u32 ecclk, u16 *voltage) argument
[all...]
H A Dr600_dpm.c1107 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =
1122 rdev->pm.dpm.vce_states[i].ecclk =
H A Dradeon.h1340 u32 ecclk; member in struct:radeon_ps
1431 u32 ecclk; member in struct:radeon_vce_clock_voltage_dependency_entry
1522 u32 ecclk; member in struct:radeon_vce_state
1954 int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk);
H A Dkv_dpm.c1952 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
1955 new_rps->ecclk = 0;
2019 new_rps->evclk || new_rps->ecclk;
H A Dni.c2692 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) argument
2698 ecclk, false, &dividers);
/linux-master/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h64 u32 ecclk; member in struct:amdgpu_ps
162 u32 ecclk; member in struct:amdgpu_vce_clock_voltage_dependency_entry
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dlegacy_dpm.c441 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =
457 adev->pm.dpm.vce_states[i].ecclk =
H A Dkv_dpm.c2212 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
2215 new_rps->ecclk = 0;
2279 new_rps->evclk || new_rps->ecclk;
3249 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk));
H A Dsi_dpm.c3031 u32 evclk, u32 ecclk, u16 *voltage)
3038 if (((evclk == 0) && (ecclk == 0)) ||
3046 (ecclk <= table->entries[i].ecclk)) {
3462 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
3463 si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk,
3467 rps->ecclk = 0;
7010 (old_rps->ecclk != new_rps->ecclk)) {
3030 si_get_vce_clock_voltage(struct amdgpu_device *adev, u32 evclk, u32 ecclk, u16 *voltage) argument
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c1898 static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) argument
1903 /* Bypass evclk and ecclk with bclk */
1912 if (!evclk || !ecclk) {
1919 r = si_calc_upll_dividers(adev, evclk, ecclk, 125000, 250000,
H A Dvi.c1052 static int vi_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) argument
1076 ecclk, false, &dividers);
H A Dnv.c508 static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) argument
H A Dsoc21.c433 static int soc21_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) argument
/linux-master/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h40 u32 ecclk; member in struct:amd_vce_state

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