#
0bba09bc |
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25-May-2021 |
Shaokun Zhang <zhangshaokun@hisilicon.com> |
drm/radeon: remove the repeated declaration Function 'r300_mc_wait_for_idle' and 'r600_mc_wait_for_idle' are declared twice, remove the repeated declaration. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b54d679 |
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17-Feb-2021 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/radeon: do not use drm middle layer for debugfs (v2) Use debugfs API directly instead of drm middle layer. v2: squash in build fix (Alex) Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c57a8308 |
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09-Oct-2020 |
Sandeep Raghuraman <sandy.8925@gmail.com> |
drm/radeon: Add implementation of get_current_vddc for Sumo Add implementation of get_current_vddc() callback for Sumo. Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
52791eee |
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11-Aug-2019 |
Christian König <christian.koenig@amd.com> |
dma-buf: rename reservation_object to dma_resv Be more consistent with the naming of the other DMA-buf objects. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/323401/
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#
c63dd758 |
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01-Apr-2016 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Currently this is only supported on ASICs which have a page flip completion interrupt (>= R600), and only if the use_pflipirq parameter has value 2 (the default). Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
71fe2899 |
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18-Mar-2016 |
Jérome Glisse <jglisse@redhat.com> |
drm/radeon: allow to force hard GPU reset. In some cases, like when freezing for hibernation, we need to be able to force hard reset even if no engine are stuck. This patch add a bool option to current asic reset callback to allow to force hard reset on asic that supports it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a918efab |
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11-May-2015 |
Christian König <christian.koenig@amd.com> |
drm/radeon: add VCE 1.0 support v4 Initial support for VCE 1.0 using newest firmware. v2: rebased v3: fix for TN v4: fix FW size calculation Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0fda42ac |
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11-May-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: implement tn_set_vce_clocks This implements the function to set the vce clocks on TN hardware. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b7af630c |
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11-May-2015 |
Christian König <christian.koenig@amd.com> |
drm/radeon: implement si_set_vce_clocks v2 For setting clocks with VCE v1.0 v2: (chk) rebased on current tree Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa0cf2f2 |
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11-May-2015 |
Christian König <christian.koenig@amd.com> |
drm/radeon: rework VCE FW size calculation Previously we were completely over allocating, fix this by actually implementing the size calculation. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
013ead48 |
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30-Apr-2015 |
Christian König <christian.koenig@amd.com> |
drm/radeon: disable semaphores for UVD V1 (v2) Hardware doesn't seem to work correctly, just block userspace in this case. v2: add missing defines Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=85320 Signed-off-by: Christian König <christian.koenig@amd.com> CC: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
353eec2a |
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01-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_allowed_info_register for CIK Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4af692f6 |
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01-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_allowed_info_register for SI Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e66582f9 |
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01-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_allowed_info_register for cayman/TN Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ff609975 |
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01-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_allowed_info_register for EG/BTC Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c6d2ac2c |
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01-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_allowed_info_register for r6xx/r7xx Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9b23bad0 |
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30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kv: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ce9cdae |
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30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/tn: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2f8e1eb7 |
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30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/sumo: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dbbd3c81 |
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30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/ci: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ca1110bc |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/si: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1d633e3a |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/ni: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
99550ee9 |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/btc: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
296deb71 |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/rv7xx/eg: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d0a04d3b |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/rv6xx: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3c94566c |
|
30-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/rs780: implement get_current_sclk/mclk Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cb658906 |
|
21-Jan-2015 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Split off gart_get_page_entry ASIC hook from set_page_entry get_page_entry calculates the GART page table entry, which is just written to the GART page table by set_page_entry. This is a prerequisite for the following fix. Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6f945693 |
|
10-Dec-2014 |
Slava Grigorev <slava.grigorev@amd.com> |
radeon/audio: applied audio_dpms() and audio_mode_set() calls Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e72376d |
|
10-Dec-2014 |
Slava Grigorev <slava.grigorev@amd.com> |
radeon/audio: consolidate audio_mode_set() functions Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bfc1f97d |
|
22-Dec-2014 |
Slava Grigorev <slava.grigorev@amd.com> |
radeon/audio: consolidate audio_init() functions Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5e8150a6 |
|
07-Jan-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: bind fan control on SI cards to hwmon interface This adds a possibility to control fan on SI parts via exported hwmon variables. Note that automatic ucode fan management pauses if you choose to enable manual fan control. Use with caution! Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
36689e57 |
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07-Dec-2014 |
Oleg Chernovskiy <algonkvel@gmail.com> |
drm/radeon: bind fan control on CI cards to hwmon interface (v2) This adds a possibility to control fan on CI parts via exported hwmon variables. Note that automatic ucode fan management pauses if you choose to enable manual fan control. Use with caution! v2: agd5f: fix formatting, squash in: minor fix for pwm1_enable exposed value Track smc control in addition to fan mode This fixes pwm1_enable being constantly set to 1 because of enabled smc control also handle the case where smc fan control is disabled. Signed-off-by: Oleg Chernovskiy <algonkvel@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
faffaf62 |
|
19-Nov-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: rework vm_flush parameters Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
72156676 |
|
18-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: consolidate r600_audio.c into r600_hdmi.c Most of that functionality is only used by r600_hdmi.c and I'm planning to change that further. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
897eba82 |
|
17-Sep-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Disable HDP flush before every CS again for < r600 It was causing display corruption with R300 generation GPUs at least. Reported-and-Tested-by: Mikael Pettersson <mikpelinux@gmail.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
57d20a43 |
|
04-Sep-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: add the infrastructure for concurrent buffer access This allows us to specify if we want to sync to the shared fences of a reservation object or not. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
856754c3 |
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16-Apr-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: add UVD support for older asics v4 v2: cleanup R600 support v3: rebased on current drm-fixes-3.12 v4: rebased on drm-next-3.14 Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
03f62abd |
|
30-Jul-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: split PT setup in more functions Move the decision what to use into the common VM code. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
72a9987e |
|
31-Jul-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Always flush the HDP cache before submitting a CS to the GPU This ensures the GPU sees all previous CPU writes to VRAM, which makes it safe: * For userspace to stream data from CPU to GPU via VRAM instead of GTT * For IBs to be stored in VRAM instead of GTT * For ring buffers to be stored in VRAM instead of GTT, if the HPD flush is performed via MMIO Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
124764f1 |
|
31-Jul-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: s/ioctl_wait_idle/mmio_hpd_flush/ And clean up the function comment a little. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
77497f27 |
|
17-Jul-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitly Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7f90fc96 |
|
04-Jun-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: remove range check from *_gart_set_page We never check the return value anyway and if the index isn't valid would crash way before calling the functions. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
157fa14d |
|
27-May-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: split page flip and pending callback Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e928c61a |
|
27-May-2014 |
Christian König <christian.koenig@amd.com> |
drm/radeon: remove (pre|post)_page_flip callbacks They are doing the same on all generations anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
8f33a156 |
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16-May-2014 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/hdmi: use separated file for DCE 3.1/3.2 code DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and DCE 3. The order of setting registers and sets of registers are different. It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they have few differences as well. For now separate DCE 2 and DCE 3 path, so we can work on it without a risk of breaking DCE 3.1+. This has been tested for possible regressions on DCE32 HD4550 (RV710). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5ad6bf91 |
|
22-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: fill in set_vce_clocks for CIK asics Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d93f7937 |
|
22-May-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: initial VCE support v4 Only VCE 2.0 support so far. v2: squashing multiple patches into this one v3: add IRQ support for CIK, major cleanups, basic code documentation v4: remove HAINAN from chipset list Signed-off-by: Christian König <christian.koenig@amd.com>
|
#
9f3f63f2 |
|
30-Jan-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: use the driver state for dpm debugfs For btc and newer, we may modify the power state depending on the circumstances. Use the modified state rather than the base state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ea31bf69 |
|
09-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: remove generic rptr/wptr functions (v2) Fill in asic family specific versions rather than using the generic version. This lets us handle asic specific differences more easily. In this case, we disable sw swapping of the rtpr writeback value on r6xx+ since the hw does it for us. Fixes bogus rptr readback on BE systems. v2: remove missed cpu_to_le32(), add comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d8852c34 |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for KB/KV Make sure interrupts are enabled before we enable thermal interrupts. Also, don't powergate uvd, etc. until after the ring tests. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
90208427 |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for CI Make sure interrupts are enabled before we enable thermal interrupts. Also, don't powergate uvd until after the ring tests. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
963c115d |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for SI Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bda44c1a |
|
18-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for trinity Need to wait to enable cg and pg until after ring tests. Also make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
14ec9fab |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for sumo Need to wait to enable cg and pg until after ring tests. Also make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a3f11245 |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for rv7xx-NI Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a4643ba3 |
|
18-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for rs780/rs880/rv6xx Make sure interrupts are enabled before we enable thermal interrupts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1654b817 |
|
11-Nov-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: allow semaphore emission to fail To workaround bugs and/or certain limits it's sometimes useful to fall back to waiting on fences. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
|
#
24c16439 |
|
30-Oct-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: drop CP page table updates & cleanup v2 The DMA ring seems to be stable now. v2: remove pt_ring_index as well Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c9dbd705 |
|
01-Oct-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: implement blit copy callback for CIK Uses the CP ring rather than the DMA ring. Useful for debugging and benchmarking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b7a5ae97 |
|
09-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add bapm callback for kb/kv This adds the enable_bapm callback for kb/kv. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
11877060 |
|
09-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add bapm callback for trinity This adds the enable_bapm callback for trinity. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1b9ba70a |
|
05-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/r6xx: add a stubbed out set_uvd_clocks callback Certain r6xx boards use the same power state for both UVD and other things. Since we don't support UVD on r6xx boards at the moment, there was no callback installed for setting the UVD clocks, however, on systems that use the same power state, this leads to a NULL pointer dereference. Fill in a stubbed out implementation for now to avoid the crash. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66963 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: "3.11" <stable@vger.kernel.org>
|
#
63580c3e |
|
03-Sep-2013 |
Anthoine Bourgeois <anthoine.bourgeois@gmail.com> |
drm/radeon/dpm: implement force performance levels for rs780 (v2) Allows you to limit the selected power levels via sysfs. Force the feedback divider to select a power level. v2: fix checking in rs780_force_fbdiv, drop a duplicate divider structure in rs780_dpm_force_performance_level, Force the voltage level too. Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b530602f |
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31-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add audio support for DCE6/8 GPUs (v12) Similar to DCE4/5, but supports multiple audio pins which can be assigned per afmt block. v2: rework the driver to handle more than one audio pin. v3: try different dto reg v4: properly program dto v5 (ck): change dto programming order v6: program speaker allocation block v7: rebase v8: rebase on Rafał's changes v9: integrated Rafał's comments, update to latest drm_edid_to_speaker_allocation API v10: add missing line break in error message v11: add back audio enabled messages v12: fix copy paste typo in r600_audio_enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
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#
e409b128 |
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13-Aug-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: separate UVD code v3 Our different hardware blocks are actually completely separated, so it doesn't make much sense any more to structure the code by pure chipset generations. Start restructuring the code by separating our the UVD block. v2: updated commit message v3: rebased and restructurized start/stop functions for kv dpm. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2e1e6dad |
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13-Aug-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: remove special handling for the DMA ring Now that we have callbacks for [rw]ptr handling we can remove the special handling for the DMA rings and use the callbacks instead. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02c9f7fa |
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13-Aug-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: rework UVD writeback & [rw]ptr handling The hardware just doesn't support this correctly. Disable it before we accidentally write anywhere we shouldn't. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
942bdf7f |
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09-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement UVD powergating for CI Disable the UVD block when not in use to save power. The block is not actually powergated on CI, but we switch between UVD DPM (where the uvd clocks are adjusted on demand) and clocks off. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
77df508a |
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09-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement UVD powergating for KB/KV Powergate the UVD block when not in use to save power. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5e884f60 |
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06-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: restructure UVD code to handle UVD PG (v2) When we PG (powergate) UVD, we need to re-initialize it before we can use it again. v2: rebase on UVD stop fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2b4c8022 |
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18-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for KB/KV Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ae3e40e8 |
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18-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for KB/KV This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5496131e |
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15-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for CI Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
89536fd6 |
|
15-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for CI Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
94b4adc5 |
|
15-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for CI This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cc8dbbb4 |
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13-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add dpm support for CI dGPUs (v2) This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
41a524ab |
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13-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for KB/KV This adds dpm support for KB/KV asics. This includes: - dynamic engine clock scaling - dynamic voltage scaling - power containment - shader power scaling Set radeon.dpm=1 to enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
286d9cc6 |
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21-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_temperature() callbacks for CIK (v2) This added support for the on-chip thermal sensors on CIK asics. v2: fix register offset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4f862967 |
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04-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: remove r6xx+ blit copy routines No longer used now that we use the async dma engines or CP DMA for bo copies. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2858c00d |
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01-Aug-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: fix halting UVD Removing the clock/power or resetting the VCPU can cause hangs if that happens in the middle of a register write. Stall the memory and register bus before putting the VCPU into reset. Keep it in reset when unloading the module or suspending. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f4f85a8c |
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25-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance levels for rv6xx Allows you to limit the selected power levels via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
444bddc4 |
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02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for RS780/RS880 (v3) This allows you to look at the current DPM state via debugfs. Due to the way the hardware works on these asics, there's no way to look up exactly what power state we are in, so we make the best guess we can based on the current sclk. v2: Anthoine's version v3: fix ref div Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
072b5acc |
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11-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: implement bo copy callback using CP DMA (v2) Lighter weight than using the 3D engine. v2: fix ring count Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
76ad73e5 |
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07-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for cayman Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a84301c6 |
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07-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for btc Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d0b54bdc |
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08-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for evergreen Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b06195d9 |
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08-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for 7xx Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
9b5de596 |
|
02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for TN Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5d5e5591 |
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02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for ON/LN Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a160a6a3 |
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02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for SI Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
170a47f0 |
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02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for cayman Allows you to force a performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
8b5e6b7f |
|
02-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance levels for 7xx/eg/btc Allows you to limit the selected power levels via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7982128c |
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28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for SI This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bdf0c4f0 |
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28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for cayman This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
490ab931 |
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27-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for TN This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
fb70160c |
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28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for ON/LN This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bd210d11 |
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28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for 7xx/evergreen/btc This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
242916a5 |
|
28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for rv6xx This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a9e61410 |
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25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for SI (v7) This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fee3d744 |
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16-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add pre/post_set_power_state callback (cayman) This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e8a9539f |
|
16-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add pre/post_set_power_state callback (BTC) This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a284c48a |
|
16-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add pre/post_set_power_state callback (TN) This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
422a56bc |
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25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add pre/post_set_power_state callback (sumo) This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
98243917 |
|
16-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add pre/post_set_power_state callbacks (6xx-eg) For r6xx-evergreen, they are no-ops as they don't support any dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
69e0b57a |
|
12-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for cayman (v5) This adds dpm support for cayman asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: fold in tdp fix v3: fix indentation v4: fix 64 bit div v5: attempt to fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
|
#
d70229f7 |
|
12-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for trinity asics This adds dpm support for trinity asics. This includes: - clockgating - powergating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
80ea2c12 |
|
12-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for sumo asics (v2) This adds dpm support for sumo asics. This includes: - clockgating - powergating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. v2: fix indention Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
|
#
6596afd4 |
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25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for btc (v3) This adds dpm support for btc asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) Set radeon.dpm=1 to enable. v2: reduce stack usage v3: attempt to fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
dc50ba7f |
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25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for evergreen (v4) This adds dpm support for evergreen asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) Set radeon.dpm=1 to enable. v2: reduce stack usage, rename ulv struct v3: fix thermal interrupt check notices by Jerome v4: fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
66229b20 |
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25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for rv7xx (v4) This adds dpm support for rv7xx asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching Set radeon.dpm=1 to enable. v2: reduce stack usage v3: fix 64 bit div v4: fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4a6369e9 |
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12-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for rv6xx (v3) This adds dpm support for rv6xx asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching Set radeon.dpm=1 to enable. v2: remove duplicate line v3: fix thermal interrupt check noticed by Jerome Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
|
#
9d67006e |
|
12-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for rs780/rs880 This adds dpm support for rs780/rs880 asics. This includes: - clockgating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
29a15221 |
|
14-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add support for thermal sensor on tn Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6bd1c385 |
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21-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: make get_temperature functions a callback Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0672e27b |
|
09-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add radeon_asic struct for CIK (v12) v2: fix up for latest reset changes v3: use CP for pt updates for now v4: update for 2 level PTs v5: update for ib_parse removal v6: vm_flush api change v7: rebase v8: fix gfx ring function pointers v9: fix vm_set_page function params v10: update for compute changes v11: cleanup for release v12: update rptr/wptr callbacks Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f93bdefe |
|
29-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: use callbacks for ring pointer handling (v3) Add callbacks to the radeon_asic struct to handle rptr/wptr fetchs and wptr updates. We currently use one version for all rings, but this allows us to override with a ring specific versions. Needed for compute rings on CIK. v2: udpate as per Christian's comments v3: fix some rebase cruft Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
87167bb1 |
|
09-Apr-2013 |
Christian König <christian.koenig@amd.com> |
drm/radeon: add UVD support for CIK (v3) v2: agd5f: fix clock dividers setup for bonaire v3: agd5f: rebase Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6e2c3c0a |
|
03-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/cik: add pcie_port indirect register accessors Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2c67912c |
|
09-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_xclk() callback for CIK Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
44fa346f |
|
18-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_gpu_clock_counter() callback for cik Used for GPU clock counter snapshots. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
65337e60 |
|
05-Apr-2013 |
Samuel Li <samuel.li@amd.com> |
drm/radeon: Use direct mapping for fast fb access on RS780/RS880 (v2) v2: fix trailing whitespace Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a973bea1 |
|
18-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: switch audio handling to use callbacks Register audio callbacks for asic where we support audio. Cleans up the code and makes it easier to add support for newer asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b1f6f47e |
|
18-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: clean up audio dto programming Split into DCE2/3 and DCE4/5 variants. Still todo is to calculate the DTO dividers properly. Add proper formula to the comments. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ef0e6e65 |
|
07-Apr-2013 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: add set_uvd_clocks callback for r7xx v3 v2: avoid 64bit divide v3: rv740 uses the evegreen upll configuration Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
|
#
2539eb02 |
|
07-Apr-2013 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: add set_uvd_clocks callback for SI Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a8b4925c |
|
07-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add set_uvd_clocks callback for evergreen v2: remove unneeded register definitions Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
23d33ba3 |
|
07-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4) v2: write clk registers only once! v3: update cg scratch register properly v4: add TN support Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f2ba57b5 |
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07-Apr-2013 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: UVD bringup v8 Just everything needed to decode videos using UVD. v6: just all the bugfixes and support for R7xx-SI merged in one patch v7: UVD_CGC_GATE is a write only register, lockup detection fix v8: split out VRAM fallback changes, remove support for RV770, add support for HEMLOCK, add buffer sizes checks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d0418894 |
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24-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: switch get_gpu_clock() to a callback (v2) Cleans up the code for future asics v2: rebase, fix some missing radeon_asic updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
454d2e2a |
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14-Feb-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add a asic callback to get the xclk This is required to get the reference clock used by the gfx engine for things like timestamps. Fixes support for GL extensions the use timestamps on certain boards. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43f1214a |
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01-Feb-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: use IBs for VM page table updates v2 For very large page table updates, we can exceed the size of the ring. To avoid this, use an IB to perform the page table update. v2(ck): cleanup the IB infrastructure and the use it instead of filling the struct ourself. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
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#
123bc183 |
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24-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: use the reset mask to determine if rings are hung fetch the reset mask and check if the relevant ring flags are set to determine whether the ring is hung or not. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43fb7787 |
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04-Jan-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: split r6xx and r7xx copy_dma functions - r6xx actually uses a slightly different packet format, although both formats seem to work ok. - r7xx doesn't have the count multiple of 2 limitation. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cd459e52 |
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12-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI Allows us to use async DMA from userspace. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d2ead3ea |
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13-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2) Allows us to use the DMA ring from userspace. DMA doesn't have a good NOP packet in which to embed the reloc idx, so userspace has to add a reloc for each buffer used and order them to match the command stream. v2: fix address bounds checking Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cf4ccd01 |
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18-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2) Allows us to use the DMA ring from userspace. DMA doesn't have a good NOP packet in which to embed the reloc idx, so userspace has to add a reloc for each buffer used and order them to match the command stream. v2: fix address bounds checking, reloc indexing Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6253e4c7 |
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12-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: improve mc_stop/mc_resume on r5xx-r7xx Along the same lines of what was done for evergreen+ in the last kernel. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8c5fd7ef |
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04-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: Add initial support for async DMA on SI Pretty much the same as cayman. Some changes to the copy packets. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f60cbd11 |
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04-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: Add initial support for async DMA on cayman/TN There are 2 async DMA engines on cayman, one at 0xd000 and one at 0xd800. The programming interface is the same as evergreen however there are some changes to the commands for using vmids. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
233d1ad5 |
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04-Dec-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: Add initial support for async DMA on evergreen Pretty similar to 6xx/7xx except the count field increased in the packet header and the max IB size increased. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4d75658b |
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27-Sep-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: Add initial support for async DMA on r6xx/r7xx Uses the new multi-ring infrastucture. 6xx/7xx has a single async DMA ring. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
82ffd92b |
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02-Oct-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add vm set_page() callback for SI Use the new WRITE_DATA packet rather than the legacy ME_WRITE packet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
498522b4 |
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02-Oct-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: rework the vm_flush interface Pass the vm and ring index rather than an IB. This allows us to use the vm_flush interface for non-IB cases in the future. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
|
#
27810fb2 |
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01-Oct-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/pm: fix multi-head profile handling on BTC+ (v2) Starting on BTC, there are no longer separate states for single head and multi-head, we just use the high mclk/voltage for all states for multi-head. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=49981 v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dce34bfd |
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17-Sep-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: refactor set_page chipset interface v5 Cleanup the interface in preparation for hierarchical page tables. v2: add incr parameter to set_page for simple scattered PTs uptates added PDE-specific flags to r600_flags and radeon_drm.h removed superfluous value masking with 0xffffffff v3: removed superfluous bo_va->valid checking changed R600_PTE_VALID to R600_ENTRY_VALID to handle PDE too v4 (ck): fix indention style, rework and fix typos in commit message, add documentation for incr parameter, also use incr parameter for system pages v5 (agd5f): use upper_32_bits() and minor white space fixes Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dmitry Cherkassov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6d92f81d |
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14-Sep-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add get_backlight_level callback Read back the backlight level from the hw. Needed for proper backlight restoration on resume. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b9ce0afe |
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31-Aug-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: remove dead function def Was removed in the async VM update series. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
089a786e |
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11-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: Move looping over the PTEs into chip code Makes it easier to move it into the rings. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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#
ee60e29f |
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09-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: rework VMID handling Move binding onto the ring, simplifying handling a bit. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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#
9b40e5d8 |
|
07-Aug-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make VM flushs a ring operation Move flushing the VMs as function into the rings. First step to make VM operations async. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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#
37e9b6a6 |
|
03-Aug-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: rework the backlight control to be an asic callback This cleans up the interface a bit as well. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
62444b74 |
|
15-Aug-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: properly handle mc_stop/mc_resume on evergreen+ (v2) - Stop the displays from accessing the FB - Block CPU access - Turn off MC client access This should fix issues some users have seen, especially with UEFI, when changing the MC FB location that result in hangs or display corruption. v2: fix crtc enabled check noticed by Luca Tettamanti Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6759a0a7 |
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09-Aug-2012 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: implement timestamp userspace query (v2) Returns a snapshot of the GPU clock counter. Needed for certain OpenGL extensions. v2: agd5f - address Jerome's comments - add function documentation Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
81ee8fb6 |
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27-Jul-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: do not reenable crtc after moving vram start address It seems we can not update the crtc scanout address. After disabling crtc, update to base address do not take effect after crtc being reenable leading to at least frame being scanout from the old crtc base address. Disabling crtc display request lead to same behavior. So after changing the vram address if we don't keep crtc disabled we will have the GPU trying to read some random system memory address with some iommu this will broke the crtc engine and will lead to broken display and iommu error message. So to avoid this, disable crtc. For flicker less boot we will need to avoid moving the vram start address. This patch should also fix : https://bugs.freedesktop.org/show_bug.cgi?id=42373 Cc: <stable@vger.kernel.org> Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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#
2898c348 |
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05-Jul-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: remove ip_pool start/suspend The IB pool is in gart memory, so it is completely superfluous to unpin / repin it on suspend / resume. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
220907d9 |
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10-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: rework ring syncing code Move inter ring syncing with semaphores into the existing ring allocations, with that we need to lock the ring mutex only once. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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#
876dc9f3 |
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08-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: remove radeon_fence_create It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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#
3299de95 |
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14-May-2012 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/hdmi: compile audio status in 1 function This optmizes calls, registers reads and assignments. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
0783986a |
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14-May-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/hdmi: store info about all AFMT blocks Introduce special struct radeon_afmt for this purpose. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
f237750f |
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09-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: remove r600 blit mutex v2 If we don't store local data into global variables it isn't necessary to lock anything. v2: rebased on new SA interface Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
abfaa44b |
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02-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: remove cayman_gpu_is_lockup Since it is now identical to evergreen_gpu_is_lockup. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
8ba957b5 |
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02-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: remove r300_gpu_is_lockup Since it is now identical to r100_gpu_is_lockup. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
069211e5 |
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02-May-2012 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: move lockup detection code into radeon_ring.c It isn't chipset specific, so it makes no sense to have that inside r100.c. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
f122c610 |
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30-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: fix up audio interrupt handling - add support for rs6xx - add support for DCE4/5 - fixup 6xx/7xx Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
02779c08 |
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20-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add radeon_asic struct for SI Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
43b3cd99 |
|
20-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add initial DCE6 display watermark support Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
f712812e |
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23-Feb-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: make ring_start, ring_test, and ib_test per ring Each ring type may need a different variant. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
89e5181f |
|
23-Feb-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add a radeon asic callback for mc idle Required for future functionality. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
3ae19b75 |
|
23-Feb-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add wait_for_vblank asic callback Required for future functionality. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
721604a1 |
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05-Jan-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: GPU virtual memory support v22 Virtual address space are per drm client (opener of /dev/drm). Client are in charge of virtual address space, they need to map bo into it by calling DRM_RADEON_GEM_VA ioctl. First 16M of virtual address space is reserved by the kernel. Once using 2 level page table we should be able to have a small vram memory footprint for each pt (there would be one pt for all gart, one for all vram and then one first level for each virtual address space). Plan include using the sub allocator for a common vm page table area and using memcpy to copy vm page table in & out. Or use a gart object and copy things in & out using dma. v2: agd5f fixes: - Add vram base offset for vram pages. The GPU physical address of a vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete cards and the physical bus address of the stolen memory on integrated chips. - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1 v3: agd5f: - integrate with the semaphore/multi-ring stuff v4: - rebase on top ttm dma & multi-ring stuff - userspace is now in charge of the address space - no more specific cs vm ioctl, instead cs ioctl has a new chunk v5: - properly handle mem == NULL case from move_notify callback - fix the vm cleanup path v6: - fix update of page table to only happen on valid mem placement v7: - add tlb flush for each vm context - add flags to define mapping property (readable, writeable, snooped) - make ring id implicit from ib->fence->ring, up to each asic callback to then do ring specific scheduling if vm ib scheduling function v8: - add query for ib limit and kernel reserved virtual space - rename vm->size to max_pfn (maximum number of page) - update gem_va ioctl to also allow unmap operation - bump kernel version to allow userspace to query for vm support v9: - rebuild page table only when bind and incrementaly depending on bo referenced by cs and that have been moved - allow virtual address space to grow - use sa allocator for vram page table - return invalid when querying vm limit on non cayman GPU - dump vm fault register on lockup v10: agd5f: - Move the vm schedule_ib callback to a standalone function, remove the callback and use the existing ib_execute callback for VM IBs. v11: - rebase on top of lastest Linus v12: agd5f: - remove spurious backslash - set IB vm_id to 0 in radeon_ib_get() v13: agd5f: - fix handling of RADEON_CHUNK_ID_FLAGS v14: - fix va destruction - fix suspend resume - forbid bo to have several different va in same vm v15: - rebase v16: - cleanup left over of vm init/fini v17: agd5f: - cs checker v18: agd5f: - reworks the CS ioctl to better support multiple rings and VM. Rather than adding a new chunk id for VM, just re-use the IB chunk id and add a new flags for VM mode. Also define additional dwords for the flags chunk id to define the what ring we want to use (gfx, compute, uvd, etc.) and the priority. v19: - fix cs fini in weird case of no ib - semi working flush fix for ni - rebase on top of sa allocator changes v20: agd5f: - further CS ioctl cleanups from Christian's comments v21: agd5f: - integrate CS checker improvements v22: agd5f: - final cleanups for release, only allow VM CS on cayman Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
b15ba512 |
|
15-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: introduce a sub allocator and convert ib pool to it v4 Somewhat specializaed sub-allocator designed to perform sub-allocation for command buffer not only for current cs ioctl but for future command submission ioctl as well. Patch also convert current ib pool to use the sub allocator. Idea is that ib poll buffer can be share with other command buffer submission not having 64K granularity. v2 Harmonize pool handling and add suspend/resume callback to pin/unpin sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman, rs480, rs690, rs880) v3 Simplify allocator v4 Fix radeon_ib_get error path to properly free fence Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
b40e7e16 |
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17-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add cayman specific fence_ring_emit cayman is wb only and doesn't have a VC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
e32eb50d |
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22-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: rename struct radeon_cp to radeon_ring That naming seems to make more sense, since we not only want to run PM4 rings with it. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
5596a9db |
|
12-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make ring rptr and wptr register offsets variable Every ring seems to have the concept of read and write pointers. Make the register offset variable so we can use the functions for different types of rings. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
7b1f2485 |
|
23-Sep-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make all functions work with multiple rings. Give all asic and radeon_ring_* functions a radeon_cp parameter, so they know the ring to work with. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
15d3332f |
|
15-Sep-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon/kms: add support for semaphores v3 They are used to sync between rings, while fences sync between a ring and the cpu. v2 Fix radeon_semaphore_driver_fini when no semaphore were allocated. v3 Initialize list early on to avoid issue in case or early error Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
a4c9e2ee |
|
04-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms/pm: add a proper pm profile init function for fusion The new power tables need to be handled differently when setting up the profiles. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
fb3d9e97 |
|
12-Oct-2011 |
Ilija Hadzic <ihadzic@research.bell-labs.com> |
drm/radeon/kms: blit code commoning factor out most of evergreen blit code and use the refactored code from r600 that is now common for both r600 and evergreen Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
b3530963 |
|
12-Oct-2011 |
Ilija Hadzic <ihadzic@research.bell-labs.com> |
drm/radeon/kms: rename a variable for consistency blit copy functions deal with GPU pages, not CPU pages, so rename the variables and parameters accordingly Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
7dbf41db |
|
17-May-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: simplify r6xx blit code Covert 4k pages to multiples of 64x64x4 tiles. This is also more efficient than a scanline based approach from the MC's perspective. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
eb32d0c3 |
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12-Oct-2011 |
Ilija Hadzic <ihadzic@research.bell-labs.com> |
drm/radeon/kms: simplify evergreen blit code Covert 4k pages to multiples of 64x64x4 tiles. This is also more efficient than a scanline based approach from the MC's perspective. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
003cefe0 |
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15-Sep-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: Make GPU/CPU page size handling consistent in blit code (v2) The BO blit code inconsistenly handled the page size. This wasn't an issue on system with 4k pages since the GPU's page size is 4k as well. Switch the driver blit callbacks to take num pages in GPU page units. Fixes lemote mipsel systems using AMD rs780/rs880 chipsets. v2: incorporate suggestions from Michel. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
e3487629 |
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02-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add radeon_asic entry for cayman Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
4546b2c1 |
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18-Feb-2011 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
radeon: move blit functions to radeon_asic.h Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
053688ce |
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18-Feb-2011 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
radeon: kill decls for inline functions Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
3574dda4 |
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18-Feb-2011 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
radeon: consolidate asic-specific function decls for r600 & later Now all the asic specific stuff ist mostly hid in radeon_asic.* Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
12920591 |
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01-Feb-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add updated ib_execute function for evergreen Adds new packet to disable DX9 constant emulation. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
187f3da3 |
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28-Nov-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
radeon: consolidate asic-specific function decls for pre-r600 Move them to radeon_asic.h together with the other asic specific stuff. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
3313e3d4 |
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06-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add pcie get/set lane support for r6xx/r7xx/evergreen Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
6f34be50 |
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21-Nov-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add pageflip ioctl support (v3) This adds support for dri2 pageflipping. v2: precision updates from Mario Kleiner. v3: Multihead fixes from Mario Kleiner; missing crtc offset add note about update pending bit on pre-avivo chips Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
d7ccd8fc |
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09-Sep-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add drm blit support for evergreen This patch implements blit support for bo moves using the 3D engine. It uses the same method as r6xx/r7xx: - store the base state in an IB - emit variable state and vertex buffers to do the blit This allows the hw to move bos using the 3D engine and allows full use of vram beyond the pci aperture size. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
724c80e1 |
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27-Aug-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: enable writeback (v2) When writeback is enabled, the GPU shadows writes to certain registers into a buffer in memory. The driver can then read the values from the shadow rather than reading back from the register across the bus. Writeback can be disabled by setting the no_wb module param to 1. On r6xx/r7xx/evergreen, the following registers are shadowed: - CP scratch registers - CP read pointer - IH write pointer On r1xx-rr5xx, the following registers are shadowed: - CP scratch registers - CP read pointer v2: - Combine wb patches for r6xx-evergreen and r1xx-r5xx - Writeback is disabled on AGP boards since it tends to be unreliable on AGP using the gart. - Check radeon_wb_init return values properly. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
4c712e6c |
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14-Jul-2010 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: check/restore sanity before doing anything else with GPU. On systems using kexec, the new kernel is booted straight from the old kernel, without any warning to the graphics driver. So the GPU is basically left as-is in a running state, however the CPU side is completly reset. Without stating the saneness of anyone using kexec on live systems, we should at least try not to crash the GPU. This patch resets 3 registers to 0 that could cause bad things to happen to the running system. This allows kexec to work on a Power6/RN50 system. Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
cb5fcbd5 |
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28-May-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/evergreen: add initial CS parser Advanced validation is not implemented yet. The mesa code that uses this will be released soon. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
ce8f5370 |
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07-May-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: rework power management - Separate dynpm and profile based power management methods. You can select the pm method by echoing the selected method ("dynpm" or "profile") to power_method in sysfs. - Expose basic 4 profile in profile method "default" - default clocks "auto" - select between low and high based on ac/dc state "low" - DC, low power mode "high" - AC, performance mode The current base profile is "default", but it should switched to "auto" once we've tested on more systems. Switching the state is a matter of echoing the requested profile to power_profile in sysfs. The lowest power states are selected automatically when dpms turns the monitors off in all states but default. - Remove dynamic fence-based reclocking for the moment. We can revisit this later once we have basic pm in. - Move pm init/fini to modesetting path. pm is tightly coupled with display state. Make sure display side is initialized before pm. - Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume. - Remove dynpm module option. It's now selectable via sysfs. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
a424816f |
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24-Apr-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: rework power management Add two new sysfs attributes: - dynpm - power_state Echoing 0/1 to dynpm disables/enables dynamic power management. The driver scales the sclk dynamically based on the number of queued fences. dynpm only scales sclk dynamically in single head mode. Echoing x.y to power_state selects a static power state (x) and clock mode (y). This allows you to statically select a power state and clock mode. Selecting a static clock mode will disable dynpm. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
49e02b73 |
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23-Apr-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: add additional asic callbacks - pm_misc() - handles voltage, pcie lanes, and other non clock related power mode settings. Currently disabled. Needs further debugging - pm_prepare() - disables crtc mem requests right now. All memory clients need to be disabled when changing memory clocks. This function can be expanded to include disabling fb access as well. - pm_finish() - enable active memory clients. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
a48b9b4e |
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22-Apr-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: add asic specific callbacks for getting power state (v2) This also simplifies the code and enables reclocking with multiple heads active by tracking whether the power states are single or multi-head capable. Eventually, we will want to select a power state based on external factors (AC/DC state, user selection, etc.). (v2) Update for evergreen Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
bae6b562 |
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22-Apr-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: add asic specific callbacks for setting power state (v2) (v2) Add evergreen vbl checks Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
def9ba9c |
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21-Apr-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add gui_idle callback Check to see if the GUI engine and related blocks (2D, 3D, CP, etc) are idle or not. There are a number of cases when we need to know if the drawing engine is busy. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
45f9a39b |
|
24-Mar-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/evergreen: implement irq support Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
0fcdb61e |
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24-Mar-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/evergreen: add gart support Gart setup is more or less like r7xx. Copy rv770d.h to evergreend.h and fix up changes. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
90aca4d2 |
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09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: simplify & improve GPU reset V2 This simplify and improve GPU reset for R1XX-R6XX hw, it's not 100% reliable here are result: - R1XX/R2XX works bunch of time in a row, sometimes it seems it can work indifinitly - R3XX/R3XX the most unreliable one, sometimes you will be able to reset few times, sometimes not even once - R5XX more reliable than previous hw, seems to work most of the times but once in a while it fails for no obvious reasons (same status than previous reset just no same happy ending) - R6XX/R7XX are lot more reliable with this patch, still it seems that it can fail after a bunch (reset every 2sec for 3hour bring down the GPU & computer) This have been tested on various hw, for some odd reasons i wasn't able to lockup RS480/RS690 (while they use to love locking up). Note that on R1XX-R5XX the cursor will disapear after lockup haven't checked why, switch to console and back to X will restore cursor. Next step is to record the bogus command that leaded to the lockup. V2 Fix r6xx resume path to avoid reinitializing blit module, use the gpu_lockup boolean to avoid entering inifinite waiting loop on fence while reiniting the GPU Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
a2d07b74 |
|
09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: rename gpu_reset to asic_reset Patch rename gpu_reset to asic_reset in prevision of having gpu_reset doing more stuff than just basic asic reset. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
225758d8 |
|
09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4 This patch cleanup the fence code, it drops the timeout field of fence as the time to complete each IB is unpredictable and shouldn't be bound. The fence cleanup lead to GPU lockup detection improvement, this patch introduce a callback, allowing to do asic specific test for lockup detection. In this patch the CP is use as a first indicator of GPU lockup. If CP doesn't make progress during 1second we assume we are facing a GPU lockup. To avoid overhead of testing GPU lockup frequently due to fence taking time to be signaled we query the lockup callback every 500msec. There is plenty code comment explaining the design & choise inside the code. This have been tested mostly on R3XX/R5XX hw, in normal running destkop (compiz firefox, quake3 running) the lockup callback wasn't call once (1 hour session). Also tested with forcing GPU lockup and lockup was reported after the 1s CP activity timeout. V2 switch to 500ms timeout so GPU lockup get call at least 2 times in less than 2sec. V3 store last jiffies in fence struct so on ERESTART, EBUSY we keep track of how long we already wait for a given fence V4 make sure we got up to date cp read pointer so we don't have false positive Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
2b497502 |
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11-Mar-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/radeon: collect r100 asic related declarations in radeon_asic.h This just an example to show what radeon_asic.h might be good for. Before Jerome kills it ;) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
9479c54f |
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11-Mar-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/radeon: unconfuse return value of radeon_asic->clear_surface_reg No one cares about it, so set it to void. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
48e7a5f1 |
|
11-Mar-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/radeon: move asic structs to radeon_asic.c With these static structs gone, radeon_asic.h is a real header file and can be used as such. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
32b3c2ab |
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26-Feb-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: initialize set_surface_reg reg for rs600 asic rs600 asic was missing set_surface_reg callback leading to oops. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
aa5120d2 |
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18-Feb-2010 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/kms: implement reading active PCIE lanes on R600+ Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
44ca7478 |
|
11-Feb-2010 |
Pauli Nieminen <suokkos@gmail.com> |
drm/radeon: Add asic hook for dma copy to r200 cards. r200 cards have dma engine which can be used to tranfer data between vram and system memory. r300 dma engine registers match r200 dma engine. Enabling dma copy for r200 is simple as hooking r200 asic to already existing function r300_copy_dma. Rename r300_dma_copy to r200_dma_copyto reflect that supports starts from r200 cards. v2: Created a new asic object for r200 cards. Signed-off-by: Pauli Nieminen <suokkos@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
d80eeb0f |
|
11-Feb-2010 |
Pauli Nieminen <suokkos@gmail.com> |
drm/radeon/kms: Create asic structure for r300 pcie cards. Setting global asic structure to point to different function would cause problem in system where is multiple r300 cards with different bus type. r300_asic_pcie is just copy from r300_asic with gart tlb functions replaced with pcie versions. Signed-off-by: Pauli Nieminen <suokkos@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
bcc1c2a1 |
|
12-Jan-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add initial Evergreen support (Radeon HD 5xxx) This adds initial Evergreen KMS support, it doesn't include any acceleration features or interrupt handling yet. Major changes are DCE4 handling for PLLs for the > 2 crtcs. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
6d7f2d8d |
|
04-Feb-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: dynclks fixes - only r4xx/r5xx/rs6xx/rs740 have clock gating atom table, so disable it on r6xx. it's already disabled on r7xx - check to make sure the clock_gating hook exists before calling it. This avoids a segfault on asics without that function. - remove unused static power management function. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
c836a412 |
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23-Dec-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add functions to get current pcie lanes Currently unused. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
062b389c |
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04-Feb-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fix regression rendering issue on R6XX/R7XX It seems that some R6XX/R7XX silently ignore HDP flush when programmed through ring, this patch addback an ioctl callback to allow R6XX/R7XX hw to perform such flush through MMIO in order to fix a regression. For more details see: http://bugzilla.kernel.org/show_bug.cgi?id=15186 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
cafe6609 |
|
06-Jan-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Schedule host path read cache flush through the ring V2 R300 family will hard lockup if host path read cache flush is done through MMIO to HOST_PATH_CNTL. But scheduling same flush through ring seems harmless. This patch remove the hdp_flush callback and add a flush after each fence emission which means a flush after each IB schedule. Thus we should have same behavior without the hard lockup. Tested on R100,R200,R300,R400,R500,R600,R700 family. V2: Adjust fence counts in r600_blit_prepare_copy() Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
5ea597f3 |
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17-Dec-2009 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/kms: enable memory clock reading on legacy (V2) V2: detect IGP cards (which don't have own memory) Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
429770b3 |
|
04-Dec-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add asic callbacks for hpd Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
d8f60cfc |
|
01-Dec-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3) This enables the use of interrupts on r6xx/r7xx hardware. Interrupts are implemented via a ring buffer. The GPU adds interrupts vectors to the ring and the host reads them off in the interrupt handler. The interrupt controller requires firmware like the CP. This firmware must be installed and accessble to the firmware loader for interrupts to function. MSIs don't seem to work on my RS780. They work fine on all my discrete cards. I'm not sure about other RS780s or RS880s. I've disabled MSIs on RS780 and RS880, but it would probably be worth checking on some other systems. v2 - fix some checkpatch.pl problems; re-read the disp int status reg if we restart the ih; v3 - remove the irq handler if r600_irq_init() fails; remove spinlock in r600_ih_ring_fini(); move ih rb overflow check to r600_get_ih_wptr(); move irq ack to separate function; Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
23956dfa |
|
22-Nov-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add HDP flushing for all GPUs. rendercheck under kms on r600s was failing due to HDP flushing not happening. This adds HDP flushing to the object wait function for r100->r700 families. rendercheck passes basic tests on r600 with this change. Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
7433874e |
|
02-Nov-2009 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/kms: add debugfs for power management for AtomBIOS devices Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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#
62a8ea3f |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Remove old init path as no hw use it anymore This remove old init path and allow code cleanup, now all hw use the new init path, see top of radeon.h for description of this. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
c010f800 |
|
30-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert RS600 to new init path New init path allow to simply asic initialization and make easier to trace what happen on each different asic. We are removing most callback. Do a massive RS600 register cleanup to clarify RS600 register, we are still bit fuzy on some register and waiting for more informations. I don't have hw to test, so this patch is a best effort to not break anythings and to try to improve things. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
3bc68535 |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert RS690/RS740 to new init path (V2). Also cleanup register specific to RS690/RS740. Version 2 add missing header file for register, remove unecessary call to AGP function and fix an indentation bug. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
d4550907 |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert R100 to new init path (V2) New init path allow to simply asic initialization and make easier to trace what happen on each different asic. We are removing most callback. More cleanup should happen latter to remove even more callback. Also cleanup register specific to R100,RV200,RV250. Version 2 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
207bf9e9 |
|
30-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert R300 to new init path Also cleanup register specific to R300. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
#
ca6ffc64 |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3) Also cleanup register specific to RS400/RS480. This patch also fix legacy VGA register used to disable VGA access we were programming wrong register. Now we should properly disable VGA on r100 up to rs400 asics. Note that RS400/RS480 resume is broken, it hangs the computer while reprogramming dynamic clock, doesn't work either without that patch. We need to spend more time investigating this issue. Version 2 of the patch remove dead code that was left commented out in the previous version. Version 3 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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f0ed1f65 |
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28-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert R520 to new init path and associated cleanup Convert the r520 asic support to new init path, change are smaller than previous one as most of the architecture is now in place and more code sharing can happen btw various asics. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
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d39c3b89 |
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28-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert RV515 to new init path and associated cleanup Convert the rv515 asic support to new init path also add an explanation in radeon.h about the new init path. There is also few cleanups associated with this change (others asic calling rv515 helper functions). Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
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28d52043 |
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20-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
drm/vgaarb: add VGA arbitration support to the drm and kms. VGA arb requires DRM support for non-kms drivers, to turn on/off irqs when disabling the mem/io regions. VGA arb requires KMS support for GPUs where we can turn off VGA decoding. Currently we know how to do this for intel and radeon kms drivers, which allows them to be removed from the arbiter. This patch comes from Fedora rawhide kernel. Signed-off-by: Dave Airlie <airlied@redhat.com>
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4aac0473 |
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14-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: clear confusion in GART init/deinit path GART static one time initialization was mixed up with GART enabling/disabling which could happen several time for instance during suspend/resume cycles. This patch splits all GART handling into 4 differents function. gart_init is for one time initialization, gart_deinit is called upon module unload to free resources allocated by gart_init, gart_enable enable the GART and is intented to be call after first initialization and at each resume cycle or reset cycle. Finaly gart_disable stop the GART and is intended to be call at suspend time or when unloading the module. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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9f022ddf |
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11-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: convert r4xx to new init path This convert r4xx to new init path it also fix few bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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a3812877 |
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10-Sep-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/r600: use blit for BO moves Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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3ce0a23d |
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07-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: add r600 KMS support This adds the r600 KMS + CS support to the Linux kernel. The r600 TTM support is quite basic and still needs more work esp around using interrupts, but the polled fencing should work okay for now. Also currently TTM is using memcpy to do VRAM moves, the code is here to use a 3D blit to do this, but isn't fully debugged yet. Authors: Alex Deucher <alexdeucher@gmail.com> Dave Airlie <airlied@redhat.com> Jerome Glisse <jglisse@redhat.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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551ebd83 |
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31-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add rn50/r100/r200 CS tracker. This adds the command stream checker for the RN50, R100 and R200 cards. It stops any access to 3D registers on RN50, and does checks on buffer sizes on the r100/r200 cards. It also fixes some texture sizing checks on r300. Signed-off-by: Dave Airlie <airlied@redhat.com>
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a54775c8 |
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06-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add LTE/GTE discard + rv515 two sided stencil register. This adds some rv350+ register for LTE/GTE discard, and enables the rv515 two sided stencil register. It also disables the DEPTHXY_OFFSET register which can be used to workaround the CS checker. Moves rs690 to proper place in rs600 and uses correct table on rs600. Signed-off-by: Dave Airlie <airlied@redhat.com>
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3f7dc91a |
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26-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/rs600/690: use autogenerated safe register tables. This ports rs690 to the safe reg tables and makes rs600 also use the same table. Signed-off-by: Dave Airlie <airlied@redhat.com>
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7ed220d7 |
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13-Aug-2009 |
Michel Dänzer <daenzer@vmware.com> |
drm/radeon/kms: Fix up vertical blank interrupt support. Fixes 3D apps timing out in the WAIT_VBLANK ioctl. AVIVO bits compile-tested only. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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616b8434 |
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06-Aug-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Add specific rs690 authorized register table rs690 is r3xx 3D engine with AVIVO modesetting so we need to allow AVIVO register for vline synchronization. This add a specific table to rs690 to handle that. Thanks to Marc (marvin24) for debugging this and kudos to Andre (taiu1) for spotting the origin of the bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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c93bb85b |
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13-Jul-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fix bandwidth computation on avivo hardware Fix bandwidth computation and crtc priority in memory controller so that crtc memory request are fullfill in time to avoid display artifact. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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e024e110 |
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23-Jun-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add initial colortiling support. This adds new set/get tiling interfaces where the pitch and macro/micro tiling enables can be set. Along with a flag to decide if this object should have a surface when mapped. The only thing we need to allocate with a mapped surface should be the frontbuffer. Note rotate scanout shouldn't require one, and back/depth shouldn't either, though mesa needs some fixes. It fixes the TTM interfaces along Thomas's suggestions, and I've tested the surface stealing code with two X servers and not seen any lockdep issues. I've stopped tiling the fbcon frontbuffer, as I don't see there being any advantage other than testing, I've left the testing commands in there, just flip the fb_tiled to true in radeon_fb.c Open: Can we integrate endian swapping in with this? Future features: texture tiling - need to relocate texture registers TXOFFSET* with tiling info. This also merges Michel's cleanup surfaces regs at init time patch even though it makes sense on its own, this patch really relies on it. Some PowerMac firmwares set up a tiling surface at the beginning of VRAM which messes us up otherwise. that patch is: Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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068a117c |
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17-Jun-2009 |
Jerome Glisse <glisse@freedesktop.org> |
drm/radeon: command stream checker for r3xx-r5xx hardware For security purpose we want to make sure the userspace process doesn't access memory beyond buffer it owns. To achieve this we need to check states the userspace program. For color buffer and zbuffer we check that the clipping register will discard access beyond buffers set as color or zbuffer. For vertex buffer we check that no vertex fetch will happen beyond buffer end. For texture we check various texture states (number of mipmap level, texture size, texture depth, ...) to compute the amount of memory the texture fetcher might access. The command stream checking impact the performances so far quick benchmark shows an average of 3% decrease in fps of various applications. It can be optimized a bit more by caching result of checking and thus avoid a full recheck if no states changed since last check. Note that this patch is still incomplete on checking side as it doesn't check 2d rendering states. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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771fe6b9 |
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05-Jun-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: introduce kernel modesetting for radeon hardware Add kernel modesetting support to radeon driver, use the ttm memory manager to manage memory and DRM/GEM to provide userspace API. In order to avoid backward compatibility issue and to allow clean design and code the radeon kernel modesetting use different code path than old radeon/drm driver. When kernel modesetting is enabled the IOCTL of radeon/drm driver are considered as invalid and an error message is printed in the log and they return failure. KMS enabled userspace will use new API to talk with the radeon/drm driver. The new API provide functions to create/destroy/share/mmap buffer object which are then managed by the kernel memory manager (here TTM). In order to submit command to the GPU the userspace provide a buffer holding the command stream, along this buffer userspace have to provide a list of buffer object used by the command stream. The kernel radeon driver will then place buffer in GPU accessible memory and will update command stream to reflect the position of the different buffers. The kernel will also perform security check on command stream provided by the user, we want to catch and forbid any illegal use of the GPU such as DMA into random system memory or into memory not owned by the process supplying the command stream. This part of the code is still incomplete and this why we propose that patch as a staging driver addition, future security might forbid current experimental userspace to run. This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX (radeon up to X1950). Works is underway to provide support for R6XX, R7XX and newer hardware (radeon from HD2XXX to HD4XXX). Authors: Jerome Glisse <jglisse@redhat.com> Dave Airlie <airlied@redhat.com> Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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