Searched refs:dcache_line_size (Results 1 - 11 of 11) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/builtins/
H A Dclear_cache.c109 const size_t dcache_line_size = 4 << ((ctr_el0 >> 16) & 15);
110 for (addr = xstart & ~(dcache_line_size - 1); addr < xend;
111 addr += dcache_line_size)
/freebsd-11-stable/sys/arm/include/
H A Dcpuinfo.h116 int dcache_line_size; member in struct:cpuinfo
H A Dcpu-v6.h414 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
465 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
494 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
518 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
541 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
559 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
569 for ( ; va < eva; va += cpuinfo.dcache_line_size) {
/freebsd-11-stable/sys/arm64/arm64/
H A Dcpufunc_asm.S54 ldr x3, =dcache_line_size /* Load the D cache line size */
H A Dmachdep.c108 int64_t dcache_line_size; /* The minimum D cache line size */ variable
863 dcache_line_size = sizeof(int) << dcache_line_shift;
869 idcache_line_size = MIN(dcache_line_size, icache_line_size);
H A Dbusdma_bounce.c900 if (va & (dcache_line_size - 1))
902 if ((va + size) & (dcache_line_size - 1))
/freebsd-11-stable/sys/arm/arm/
H A Dcpuinfo.c53 .dcache_line_size = 32,
189 cpuinfo.dcache_line_size =
194 cpuinfo.dcache_line_size =
199 cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1;
H A Dgenassym.c165 ASSYM(DCACHE_LINE_SIZE, offsetof(struct cpuinfo, dcache_line_size));
H A Dbusdma_machdep-v6.c63 #define BUSDMA_DCACHE_ALIGN cpuinfo.dcache_line_size
/freebsd-11-stable/sys/arm64/include/
H A Dcpufunc.h124 extern int64_t dcache_line_size;
/freebsd-11-stable/sys/riscv/riscv/
H A Dmachdep.c113 int64_t dcache_line_size; /* The minimum D cache line size */ variable

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