Searched refs:WREG8 (Results 1 - 16 of 16) sorted by relevance
/linux-master/drivers/gpu/drm/mgag200/ |
H A D | mgag200_bmc.c | 17 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL); 23 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); 33 WREG8(DAC_INDEX, MGA1064_SPAREREG); 44 WREG8(DAC_INDEX, MGA1064_SPAREREG); 58 WREG8(DAC_INDEX, MGA1064_SPAREREG); 71 WREG8(MGAREG_CRTCEXT_INDEX, 1); 73 WREG8(MGAREG_CRTCEXT_DATA, tmp | 0x88); 76 WREG8(DAC_INDEX, MGA1064_REMHEADCTL2); 79 WREG8(DAC_DATA, tmp); 85 WREG8(DAC_INDE [all...] |
H A D | mgag200_g200wb.c | 117 WREG8(MGAREG_CRTC_INDEX, 0x1e); 120 WREG8(MGAREG_CRTC_DATA, tmp+1); 124 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 127 WREG8(DAC_DATA, tmp); 129 WREG8(DAC_INDEX, MGA1064_REMHEADCTL); 132 WREG8(DAC_DATA, tmp); 137 WREG8(MGAREG_MEM_MISC_WRITE, tmp); 139 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 142 WREG8(DAC_DATA, tmp); 147 WREG8(DAC_INDE [all...] |
H A D | mgag200_g200ev.c | 121 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 124 WREG8(DAC_DATA, tmp); 128 WREG8(MGAREG_MEM_MISC_WRITE, tmp); 130 WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); 132 WREG8(DAC_DATA, tmp & ~0x40); 134 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 137 WREG8(DAC_DATA, tmp); 145 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 148 WREG8(DAC_DATA, tmp); 152 WREG8(DAC_INDE [all...] |
H A D | mgag200_drv.h | 38 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg)) macro 48 WREG8(MGA_MISC_OUT, v) 66 WREG8(ATTR_INDEX, reg); \ 67 WREG8(ATTR_DATA, v); \ 72 WREG8(MGAREG_SEQ_INDEX, reg); \ 78 WREG8(MGAREG_SEQ_INDEX, reg); \ 79 WREG8(MGAREG_SEQ_DATA, v); \ 84 WREG8(MGAREG_CRTC_INDEX, reg); \ 90 WREG8(MGAREG_CRTC_INDEX, reg); \ 91 WREG8(MGAREG_CRTC_DAT [all...] |
H A D | mgag200_g200eh.c | 117 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 120 WREG8(DAC_DATA, tmp); 124 WREG8(MGAREG_MEM_MISC_WRITE, tmp); 126 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 129 WREG8(DAC_DATA, tmp); 139 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 143 WREG8(DAC_DATA, tmp); 145 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 149 WREG8(DAC_DATA, tmp);
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H A D | mgag200_mode.c | 37 WREG8(DAC_INDEX + MGA1064_INDEX, 0); 43 WREG8(DAC_INDEX + MGA1064_COL_PAL, i * 8 + i / 4); 44 WREG8(DAC_INDEX + MGA1064_COL_PAL, i * 4 + i / 16); 45 WREG8(DAC_INDEX + MGA1064_COL_PAL, i * 8 + i / 4); 49 WREG8(DAC_INDEX + MGA1064_COL_PAL, 0); 50 WREG8(DAC_INDEX + MGA1064_COL_PAL, i * 4 + i / 16); 51 WREG8(DAC_INDEX + MGA1064_COL_PAL, 0); 57 WREG8(DAC_INDEX + MGA1064_COL_PAL, i); 58 WREG8(DAC_INDEX + MGA1064_COL_PAL, i); 59 WREG8(DAC_INDE [all...] |
H A D | mgag200_g200er.c | 142 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 145 WREG8(DAC_DATA, tmp); 147 WREG8(DAC_INDEX, MGA1064_REMHEADCTL); 150 WREG8(DAC_DATA, tmp); 154 WREG8(MGAREG_MEM_MISC_WRITE, tmp); 156 WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); 160 WREG8(DAC_DATA, tmp);
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H A D | mgag200_i2c.c | 38 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); 46 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL);
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H A D | mgag200_drv.c | 202 WREG8(MGA_MISC_OUT, misc);
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | mxgpu_ai.c | 39 WREG8(AI_MAIBOX_CONTROL_RCV_OFFSET_BYTE, 2); 44 WREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE, val ? 1 : 0);
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H A D | mxgpu_nv.c | 38 WREG8(NV_MAIBOX_CONTROL_RCV_OFFSET_BYTE, 2); 43 WREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE, val ? 1 : 0);
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H A D | amdgpu.h | 1265 #define WREG8(reg, v) amdgpu_mm_wreg8(adev, (reg), (v)) macro
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | radeon_legacy_tv.c | 288 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL); 290 WREG8(RADEON_CLOCK_CNTL_DATA + 3, 0);
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H A D | r100.c | 2893 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); 2906 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); 3787 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & save->GENMO_WT); 3818 WREG8(R_0003C2_GENMO_WT, save->GENMO_WT); 3831 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & tmp);
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H A D | radeon_display.c | 72 WREG8(AVIVO_DC_LUT_RW_INDEX, 0); 209 WREG8(RADEON_PALETTE_INDEX, 0);
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H A D | radeon.h | 2499 #define WREG8(reg, v) writeb(v, (rdev->rmmio) + (reg)) macro
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Completed in 337 milliseconds