1260684Skaiw/* SPDX-License-Identifier: GPL-2.0-only */ 2260684Skaiw/* 3260684Skaiw * Copyright 2010 Matt Turner. 4260684Skaiw * Copyright 2012 Red Hat 5260684Skaiw * 6260684Skaiw * Authors: Matthew Garrett 7260684Skaiw * Matt Turner 8260684Skaiw * Dave Airlie 9260684Skaiw */ 10260684Skaiw#ifndef __MGAG200_DRV_H__ 11260684Skaiw#define __MGAG200_DRV_H__ 12260684Skaiw 13260684Skaiw#include <linux/i2c-algo-bit.h> 14260684Skaiw#include <linux/i2c.h> 15260684Skaiw 16260684Skaiw#include <video/vga.h> 17260684Skaiw 18260684Skaiw#include <drm/drm_connector.h> 19260684Skaiw#include <drm/drm_crtc.h> 20260684Skaiw#include <drm/drm_encoder.h> 21260684Skaiw#include <drm/drm_gem.h> 22260684Skaiw#include <drm/drm_gem_shmem_helper.h> 23260684Skaiw#include <drm/drm_plane.h> 24260684Skaiw 25260684Skaiw#include "mgag200_reg.h" 26260684Skaiw 27260684Skaiw#define DRIVER_AUTHOR "Matthew Garrett" 28260684Skaiw 29276371Semaste#define DRIVER_NAME "mgag200" 30260684Skaiw#define DRIVER_DESC "MGA G200 SE" 31260684Skaiw#define DRIVER_DATE "20110418" 32260684Skaiw 33260684Skaiw#define DRIVER_MAJOR 1 34260684Skaiw#define DRIVER_MINOR 0 35260684Skaiw#define DRIVER_PATCHLEVEL 0 36260684Skaiw 37260684Skaiw#define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg)) 38260684Skaiw#define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg)) 39260684Skaiw#define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg)) 40260684Skaiw#define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg)) 41260684Skaiw 42260684Skaiw#define MGA_BIOS_OFFSET 0x7ffc 43260684Skaiw 44260684Skaiw#define ATTR_INDEX 0x1fc0 45260684Skaiw#define ATTR_DATA 0x1fc1 46260684Skaiw 47260684Skaiw#define WREG_MISC(v) \ 48260684Skaiw WREG8(MGA_MISC_OUT, v) 49260684Skaiw 50260684Skaiw#define RREG_MISC(v) \ 51260684Skaiw ((v) = RREG8(MGA_MISC_IN)) 52260684Skaiw 53260684Skaiw#define WREG_MISC_MASKED(v, mask) \ 54260684Skaiw do { \ 55260684Skaiw u8 misc_; \ 56260684Skaiw u8 mask_ = (mask); \ 57260684Skaiw RREG_MISC(misc_); \ 58260684Skaiw misc_ &= ~mask_; \ 59260684Skaiw misc_ |= ((v) & mask_); \ 60260684Skaiw WREG_MISC(misc_); \ 61260684Skaiw } while (0) 62260684Skaiw 63260684Skaiw#define WREG_ATTR(reg, v) \ 64260684Skaiw do { \ 65260684Skaiw RREG8(0x1fda); \ 66260684Skaiw WREG8(ATTR_INDEX, reg); \ 67260684Skaiw WREG8(ATTR_DATA, v); \ 68260684Skaiw } while (0) \ 69260684Skaiw 70260684Skaiw#define RREG_SEQ(reg, v) \ 71260684Skaiw do { \ 72260684Skaiw WREG8(MGAREG_SEQ_INDEX, reg); \ 73260684Skaiw v = RREG8(MGAREG_SEQ_DATA); \ 74260684Skaiw } while (0) \ 75260684Skaiw 76260684Skaiw#define WREG_SEQ(reg, v) \ 77260684Skaiw do { \ 78260684Skaiw WREG8(MGAREG_SEQ_INDEX, reg); \ 79260684Skaiw WREG8(MGAREG_SEQ_DATA, v); \ 80260684Skaiw } while (0) \ 81260684Skaiw 82260684Skaiw#define RREG_CRT(reg, v) \ 83260684Skaiw do { \ 84260684Skaiw WREG8(MGAREG_CRTC_INDEX, reg); \ 85260684Skaiw v = RREG8(MGAREG_CRTC_DATA); \ 86260684Skaiw } while (0) \ 87260684Skaiw 88260684Skaiw#define WREG_CRT(reg, v) \ 89260684Skaiw do { \ 90260684Skaiw WREG8(MGAREG_CRTC_INDEX, reg); \ 91260684Skaiw WREG8(MGAREG_CRTC_DATA, v); \ 92260684Skaiw } while (0) \ 93260684Skaiw 94260684Skaiw#define RREG_ECRT(reg, v) \ 95260684Skaiw do { \ 96260684Skaiw WREG8(MGAREG_CRTCEXT_INDEX, reg); \ 97260684Skaiw v = RREG8(MGAREG_CRTCEXT_DATA); \ 98260684Skaiw } while (0) \ 99260684Skaiw 100260684Skaiw#define WREG_ECRT(reg, v) \ 101260684Skaiw do { \ 102260684Skaiw WREG8(MGAREG_CRTCEXT_INDEX, reg); \ 103260684Skaiw WREG8(MGAREG_CRTCEXT_DATA, v); \ 104260684Skaiw } while (0) \ 105260684Skaiw 106260684Skaiw#define GFX_INDEX 0x1fce 107260684Skaiw#define GFX_DATA 0x1fcf 108260684Skaiw 109260684Skaiw#define WREG_GFX(reg, v) \ 110260684Skaiw do { \ 111260684Skaiw WREG8(GFX_INDEX, reg); \ 112260684Skaiw WREG8(GFX_DATA, v); \ 113260684Skaiw } while (0) \ 114260684Skaiw 115260684Skaiw#define DAC_INDEX 0x3c00 116260684Skaiw#define DAC_DATA 0x3c0a 117260684Skaiw 118260684Skaiw#define WREG_DAC(reg, v) \ 119260684Skaiw do { \ 120260684Skaiw WREG8(DAC_INDEX, reg); \ 121260684Skaiw WREG8(DAC_DATA, v); \ 122260684Skaiw } while (0) \ 123260684Skaiw 124260684Skaiw#define MGA_MISC_OUT 0x1fc2 125260684Skaiw#define MGA_MISC_IN 0x1fcc 126260684Skaiw 127260684Skaiw/* 128260684Skaiw * TODO: This is a pretty large set of default values for all kinds of 129260684Skaiw * settings. It should be split and set in the various DRM helpers, 130260684Skaiw * such as the CRTC reset or atomic_enable helpers. The PLL values 131260684Skaiw * probably belong to each model's PLL code. 132260684Skaiw */ 133260684Skaiw#define MGAG200_DAC_DEFAULT(xvrefctrl, xpixclkctrl, xmiscctrl, xsyspllm, xsysplln, xsyspllp) \ 134260684Skaiw /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, \ 135260684Skaiw /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, \ 136260684Skaiw /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, \ 137260684Skaiw /* 0x18: */ (xvrefctrl), \ 138260684Skaiw /* 0x19: */ 0, \ 139260684Skaiw /* 0x1a: */ (xpixclkctrl), \ 140260684Skaiw /* 0x1b: */ 0xff, 0xbf, 0x20, \ 141260684Skaiw /* 0x1e: */ (xmiscctrl), \ 142260684Skaiw /* 0x1f: */ 0x20, \ 143260684Skaiw /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 144260684Skaiw /* 0x28: */ 0x00, 0x00, 0x00, 0x00, \ 145260684Skaiw /* 0x2c: */ (xsyspllm), \ 146260684Skaiw /* 0x2d: */ (xsysplln), \ 147260684Skaiw /* 0x2e: */ (xsyspllp), \ 148260684Skaiw /* 0x2f: */ 0x40, \ 149260684Skaiw /* 0x30: */ 0x00, 0xb0, 0x00, 0xc2, 0x34, 0x14, 0x02, 0x83, \ 150260684Skaiw /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3a, \ 151260684Skaiw /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, \ 152260684Skaiw /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 \ 153260684Skaiw 154260684Skaiw#define MGAG200_LUT_SIZE 256 155260684Skaiw 156260684Skaiw#define MGAG200_MAX_FB_HEIGHT 4096 157260684Skaiw#define MGAG200_MAX_FB_WIDTH 4096 158260684Skaiw 159260684Skaiwstruct mga_device; 160260684Skaiw 161260684Skaiw/* 162260684Skaiw * Stores parameters for programming the PLLs 163260684Skaiw * 164260684Skaiw * Fref: reference frequency (A: 25.175 Mhz, B: 28.361, C: XX Mhz) 165260684Skaiw * Fo: output frequency 166260684Skaiw * Fvco = Fref * (N / M) 167260684Skaiw * Fo = Fvco / P 168260684Skaiw * 169260684Skaiw * S = [0..3] 170260684Skaiw */ 171260684Skaiwstruct mgag200_pll_values { 172260684Skaiw unsigned int m; 173260684Skaiw unsigned int n; 174260684Skaiw unsigned int p; 175260684Skaiw unsigned int s; 176260684Skaiw}; 177260684Skaiw 178260684Skaiwstruct mgag200_crtc_state { 179260684Skaiw struct drm_crtc_state base; 180260684Skaiw 181260684Skaiw /* Primary-plane format; required for modesetting and color mgmt. */ 182260684Skaiw const struct drm_format_info *format; 183260684Skaiw 184260684Skaiw struct mgag200_pll_values pixpllc; 185260684Skaiw}; 186260684Skaiw 187260684Skaiwstatic inline struct mgag200_crtc_state *to_mgag200_crtc_state(struct drm_crtc_state *base) 188260684Skaiw{ 189260684Skaiw return container_of(base, struct mgag200_crtc_state, base); 190260684Skaiw} 191260684Skaiw 192260684Skaiwstruct mga_i2c_chan { 193260684Skaiw struct i2c_adapter adapter; 194260684Skaiw struct drm_device *dev; 195260684Skaiw struct i2c_algo_bit_data bit; 196260684Skaiw int data, clock; 197260684Skaiw}; 198260684Skaiw 199260684Skaiwenum mga_type { 200260684Skaiw G200_PCI, 201260684Skaiw G200_AGP, 202260684Skaiw G200_SE_A, 203260684Skaiw G200_SE_B, 204260684Skaiw G200_WB, 205260684Skaiw G200_EV, 206260684Skaiw G200_EH, 207260684Skaiw G200_EH3, 208260684Skaiw G200_ER, 209260684Skaiw G200_EW3, 210260684Skaiw}; 211260684Skaiw 212260684Skaiwstruct mgag200_device_info { 213260684Skaiw u16 max_hdisplay; 214260684Skaiw u16 max_vdisplay; 215260684Skaiw 216260684Skaiw /* 217260684Skaiw * Maximum memory bandwidth (MiB/sec). Setting this to zero disables 218260684Skaiw * the rsp test during mode validation. 219260684Skaiw */ 220260684Skaiw unsigned long max_mem_bandwidth; 221260684Skaiw 222260684Skaiw /* HW has external source (e.g., BMC) to synchronize with */ 223260684Skaiw bool has_vidrst:1; 224260684Skaiw 225260684Skaiw struct { 226260684Skaiw unsigned data_bit:3; 227260684Skaiw unsigned clock_bit:3; 228260684Skaiw } i2c; 229260684Skaiw 230260684Skaiw /* 231260684Skaiw * HW does not handle 'startadd' register correctly. Always set 232260684Skaiw * it's value to 0. 233260684Skaiw */ 234260684Skaiw bool bug_no_startadd:1; 235260684Skaiw}; 236260684Skaiw 237260684Skaiw#define MGAG200_DEVICE_INFO_INIT(_max_hdisplay, _max_vdisplay, _max_mem_bandwidth, \ 238260684Skaiw _has_vidrst, _i2c_data_bit, _i2c_clock_bit, \ 239260684Skaiw _bug_no_startadd) \ 240260684Skaiw { \ 241260684Skaiw .max_hdisplay = (_max_hdisplay), \ 242260684Skaiw .max_vdisplay = (_max_vdisplay), \ 243260684Skaiw .max_mem_bandwidth = (_max_mem_bandwidth), \ 244260684Skaiw .has_vidrst = (_has_vidrst), \ 245260684Skaiw .i2c = { \ 246260684Skaiw .data_bit = (_i2c_data_bit), \ 247260684Skaiw .clock_bit = (_i2c_clock_bit), \ 248260684Skaiw }, \ 249260684Skaiw .bug_no_startadd = (_bug_no_startadd), \ 250260684Skaiw } 251260684Skaiw 252260684Skaiwstruct mgag200_device_funcs { 253260684Skaiw /* 254260684Skaiw * Disables an external reset source (i.e., BMC) before programming 255260684Skaiw * a new display mode. 256260684Skaiw */ 257260684Skaiw void (*disable_vidrst)(struct mga_device *mdev); 258260684Skaiw 259260684Skaiw /* 260260684Skaiw * Enables an external reset source (i.e., BMC) after programming 261260684Skaiw * a new display mode. 262260684Skaiw */ 263260684Skaiw void (*enable_vidrst)(struct mga_device *mdev); 264260684Skaiw 265260684Skaiw /* 266260684Skaiw * Validate that the given state can be programmed into PIXPLLC. On 267260684Skaiw * success, the calculated parameters should be stored in the CRTC's 268260684Skaiw * state in struct @mgag200_crtc_state.pixpllc. 269260684Skaiw */ 270260684Skaiw int (*pixpllc_atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *new_state); 271260684Skaiw 272260684Skaiw /* 273260684Skaiw * Program PIXPLLC from the CRTC state. The parameters should have been 274260684Skaiw * stored in struct @mgag200_crtc_state.pixpllc by the corresponding 275260684Skaiw * implementation of @pixpllc_atomic_check. 276260684Skaiw */ 277260684Skaiw void (*pixpllc_atomic_update)(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 278260684Skaiw}; 279260684Skaiw 280260684Skaiwstruct mga_device { 281260684Skaiw struct drm_device base; 282260684Skaiw 283260684Skaiw const struct mgag200_device_info *info; 284260684Skaiw const struct mgag200_device_funcs *funcs; 285260684Skaiw 286260684Skaiw struct resource *rmmio_res; 287260684Skaiw void __iomem *rmmio; 288260684Skaiw struct mutex rmmio_lock; /* Protects access to rmmio */ 289260684Skaiw 290260684Skaiw struct resource *vram_res; 291260684Skaiw void __iomem *vram; 292260684Skaiw resource_size_t vram_available; 293260684Skaiw 294260684Skaiw struct drm_plane primary_plane; 295260684Skaiw struct drm_crtc crtc; 296260684Skaiw struct drm_encoder encoder; 297260684Skaiw struct mga_i2c_chan i2c; 298260684Skaiw struct drm_connector connector; 299260684Skaiw}; 300260684Skaiw 301260684Skaiwstatic inline struct mga_device *to_mga_device(struct drm_device *dev) 302260684Skaiw{ 303260684Skaiw return container_of(dev, struct mga_device, base); 304260684Skaiw} 305260684Skaiw 306260684Skaiwstruct mgag200_g200_device { 307260684Skaiw struct mga_device base; 308260684Skaiw 309260684Skaiw /* PLL constants */ 310260684Skaiw long ref_clk; 311260684Skaiw long pclk_min; 312260684Skaiw long pclk_max; 313260684Skaiw}; 314260684Skaiw 315260684Skaiwstatic inline struct mgag200_g200_device *to_mgag200_g200_device(struct drm_device *dev) 316260684Skaiw{ 317260684Skaiw return container_of(to_mga_device(dev), struct mgag200_g200_device, base); 318260684Skaiw} 319260684Skaiw 320260684Skaiwstruct mgag200_g200se_device { 321260684Skaiw struct mga_device base; 322260684Skaiw 323260684Skaiw /* SE model number stored in reg 0x1e24 */ 324260684Skaiw u32 unique_rev_id; 325260684Skaiw}; 326260684Skaiw 327260684Skaiwstatic inline struct mgag200_g200se_device *to_mgag200_g200se_device(struct drm_device *dev) 328260684Skaiw{ 329260684Skaiw return container_of(to_mga_device(dev), struct mgag200_g200se_device, base); 330260684Skaiw} 331260684Skaiw 332260684Skaiw /* mgag200_drv.c */ 333260684Skaiwint mgag200_init_pci_options(struct pci_dev *pdev, u32 option, u32 option2); 334260684Skaiwresource_size_t mgag200_probe_vram(void __iomem *mem, resource_size_t size); 335260684Skaiwresource_size_t mgag200_device_probe_vram(struct mga_device *mdev); 336260684Skaiwint mgag200_device_preinit(struct mga_device *mdev); 337260684Skaiwint mgag200_device_init(struct mga_device *mdev, 338260684Skaiw const struct mgag200_device_info *info, 339260684Skaiw const struct mgag200_device_funcs *funcs); 340260684Skaiw 341260684Skaiw /* mgag200_<device type>.c */ 342260684Skaiwstruct mga_device *mgag200_g200_device_create(struct pci_dev *pdev, const struct drm_driver *drv); 343260684Skaiwstruct mga_device *mgag200_g200se_device_create(struct pci_dev *pdev, const struct drm_driver *drv, 344260684Skaiw enum mga_type type); 345260684Skaiwvoid mgag200_g200wb_init_registers(struct mga_device *mdev); 346260684Skaiwvoid mgag200_g200wb_pixpllc_atomic_update(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 347260684Skaiwstruct mga_device *mgag200_g200wb_device_create(struct pci_dev *pdev, const struct drm_driver *drv); 348260684Skaiwstruct mga_device *mgag200_g200ev_device_create(struct pci_dev *pdev, const struct drm_driver *drv); 349260684Skaiwvoid mgag200_g200eh_init_registers(struct mga_device *mdev); 350260684Skaiwvoid mgag200_g200eh_pixpllc_atomic_update(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 351260684Skaiwstruct mga_device *mgag200_g200eh_device_create(struct pci_dev *pdev, 352260684Skaiw const struct drm_driver *drv); 353260684Skaiwstruct mga_device *mgag200_g200eh3_device_create(struct pci_dev *pdev, 354260684Skaiw const struct drm_driver *drv); 355260684Skaiwstruct mga_device *mgag200_g200er_device_create(struct pci_dev *pdev, 356260684Skaiw const struct drm_driver *drv); 357260684Skaiwstruct mga_device *mgag200_g200ew3_device_create(struct pci_dev *pdev, 358260684Skaiw const struct drm_driver *drv); 359260684Skaiw 360260684Skaiw/* 361260684Skaiw * mgag200_mode.c 362260684Skaiw */ 363260684Skaiw 364260684Skaiwstruct drm_crtc; 365260684Skaiwstruct drm_crtc_state; 366260684Skaiwstruct drm_display_mode; 367260684Skaiwstruct drm_plane; 368260684Skaiwstruct drm_atomic_state; 369260684Skaiw 370260684Skaiwextern const uint32_t mgag200_primary_plane_formats[]; 371260684Skaiwextern const size_t mgag200_primary_plane_formats_size; 372260684Skaiwextern const uint64_t mgag200_primary_plane_fmtmods[]; 373260684Skaiw 374260684Skaiwint mgag200_primary_plane_helper_atomic_check(struct drm_plane *plane, 375260684Skaiw struct drm_atomic_state *new_state); 376260684Skaiwvoid mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane, 377260684Skaiw struct drm_atomic_state *old_state); 378260684Skaiwvoid mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane, 379260684Skaiw struct drm_atomic_state *state); 380260684Skaiwvoid mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane, 381260684Skaiw struct drm_atomic_state *old_state); 382260684Skaiw#define MGAG200_PRIMARY_PLANE_HELPER_FUNCS \ 383260684Skaiw DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, \ 384260684Skaiw .atomic_check = mgag200_primary_plane_helper_atomic_check, \ 385260684Skaiw .atomic_update = mgag200_primary_plane_helper_atomic_update, \ 386260684Skaiw .atomic_enable = mgag200_primary_plane_helper_atomic_enable, \ 387260684Skaiw .atomic_disable = mgag200_primary_plane_helper_atomic_disable 388260684Skaiw 389260684Skaiw#define MGAG200_PRIMARY_PLANE_FUNCS \ 390260684Skaiw .update_plane = drm_atomic_helper_update_plane, \ 391260684Skaiw .disable_plane = drm_atomic_helper_disable_plane, \ 392260684Skaiw .destroy = drm_plane_cleanup, \ 393260684Skaiw DRM_GEM_SHADOW_PLANE_FUNCS 394260684Skaiw 395260684Skaiwvoid mgag200_crtc_set_gamma_linear(struct mga_device *mdev, const struct drm_format_info *format); 396260684Skaiwvoid mgag200_crtc_set_gamma(struct mga_device *mdev, 397260684Skaiw const struct drm_format_info *format, 398260684Skaiw struct drm_color_lut *lut); 399260684Skaiw 400260684Skaiwenum drm_mode_status mgag200_crtc_helper_mode_valid(struct drm_crtc *crtc, 401260684Skaiw const struct drm_display_mode *mode); 402260684Skaiwint mgag200_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state); 403260684Skaiwvoid mgag200_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 404260684Skaiwvoid mgag200_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 405260684Skaiwvoid mgag200_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *old_state); 406260684Skaiw 407260684Skaiw#define MGAG200_CRTC_HELPER_FUNCS \ 408260684Skaiw .mode_valid = mgag200_crtc_helper_mode_valid, \ 409260684Skaiw .atomic_check = mgag200_crtc_helper_atomic_check, \ 410260684Skaiw .atomic_flush = mgag200_crtc_helper_atomic_flush, \ 411260684Skaiw .atomic_enable = mgag200_crtc_helper_atomic_enable, \ 412260684Skaiw .atomic_disable = mgag200_crtc_helper_atomic_disable 413260684Skaiw 414260684Skaiwvoid mgag200_crtc_reset(struct drm_crtc *crtc); 415260684Skaiwstruct drm_crtc_state *mgag200_crtc_atomic_duplicate_state(struct drm_crtc *crtc); 416260684Skaiwvoid mgag200_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state); 417260684Skaiw 418260684Skaiw#define MGAG200_CRTC_FUNCS \ 419260684Skaiw .reset = mgag200_crtc_reset, \ 420260684Skaiw .destroy = drm_crtc_cleanup, \ 421260684Skaiw .set_config = drm_atomic_helper_set_config, \ 422260684Skaiw .page_flip = drm_atomic_helper_page_flip, \ 423260684Skaiw .atomic_duplicate_state = mgag200_crtc_atomic_duplicate_state, \ 424260684Skaiw .atomic_destroy_state = mgag200_crtc_atomic_destroy_state 425260684Skaiw 426260684Skaiw#define MGAG200_DAC_ENCODER_FUNCS \ 427260684Skaiw .destroy = drm_encoder_cleanup 428260684Skaiw 429260684Skaiwint mgag200_vga_connector_helper_get_modes(struct drm_connector *connector); 430260684Skaiw 431260684Skaiw#define MGAG200_VGA_CONNECTOR_HELPER_FUNCS \ 432260684Skaiw .get_modes = mgag200_vga_connector_helper_get_modes 433260684Skaiw 434260684Skaiw#define MGAG200_VGA_CONNECTOR_FUNCS \ 435260684Skaiw .reset = drm_atomic_helper_connector_reset, \ 436260684Skaiw .fill_modes = drm_helper_probe_single_connector_modes, \ 437260684Skaiw .destroy = drm_connector_cleanup, \ 438260684Skaiw .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, \ 439260684Skaiw .atomic_destroy_state = drm_atomic_helper_connector_destroy_state 440260684Skaiw 441260684Skaiwvoid mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode); 442260684Skaiwvoid mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format); 443260684Skaiwvoid mgag200_enable_display(struct mga_device *mdev); 444260684Skaiwvoid mgag200_init_registers(struct mga_device *mdev); 445260684Skaiwint mgag200_mode_config_init(struct mga_device *mdev, resource_size_t vram_available); 446260684Skaiw 447260684Skaiw /* mgag200_bmc.c */ 448260684Skaiwvoid mgag200_bmc_disable_vidrst(struct mga_device *mdev); 449260684Skaiwvoid mgag200_bmc_enable_vidrst(struct mga_device *mdev); 450260684Skaiw 451260684Skaiw /* mgag200_i2c.c */ 452260684Skaiwint mgag200_i2c_init(struct mga_device *mdev, struct mga_i2c_chan *i2c); 453260684Skaiw 454260684Skaiw#endif /* __MGAG200_DRV_H__ */ 455260684Skaiw