| /linux-master/drivers/staging/rtl8712/ |
| H A D | rtl8712_cmdctrl_regdef.h | 13 #define RCR (RTL8712_CMDCTRL_ + 0x0008) macro
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| H A D | hal_init.c | 333 netdev_info(padapter->pnetdev, "1 RCR=0x%x\n",
334 r8712_read32(padapter, RCR));
335 val32 = r8712_read32(padapter, RCR);
336 r8712_write32(padapter, RCR, (val32 | BIT(26))); /* Enable RX TCP
339 netdev_info(padapter->pnetdev, "2 RCR=0x%x\n",
340 r8712_read32(padapter, RCR));
341 val32 = r8712_read32(padapter, RCR);
342 r8712_write32(padapter, RCR, (val32 | BIT(25))); /* Append PHY status */
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| H A D | rtl871x_mp_ioctl.c | 272 r8712_write8(Adapter, RCR, 0); /* RCR : disable all pkt, 0x10250048 */
273 /* RCR disable Check BSSID, 0x1025004a */
274 r8712_write8(Adapter, RCR + 2, 0x57);
825 rcr_val32 = r8712_read32(Adapter, RCR);/*RCR = 0x10250048*/
849 r8712_write32(Adapter, RCR, rcr_val32);
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| /linux-master/drivers/net/ethernet/smsc/ |
| H A D | smc9194.h | 80 #define RCR 4 macro
87 /* the normal settings for the RCR register : */
207 #define SMC_DELAY() { inw( ioaddr + RCR );\
208 inw( ioaddr + RCR );\
209 inw( ioaddr + RCR ); }
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| H A D | smc9194.c | 324 outw( RCR_SOFTRESET, ioaddr + RCR );
331 outw( RCR_CLEAR, ioaddr + RCR );
362 /* see the header file for options in TCR/RCR NORMAL*/
364 outw( RCR_NORMAL, ioaddr + RCR );
393 outb( RCR_CLEAR, ioaddr + RCR );
1458 outw( inw(ioaddr + RCR ) | RCR_PROMISC, ioaddr + RCR ); local
1470 outw( inw(ioaddr + RCR ) | RCR_ALMUL, ioaddr + RCR ); local
1479 outw( inw( ioaddr + RCR )
1480 ioaddr + RCR ); local
1487 ioaddr + RCR ); local
[all...] |
| H A D | smc91c92_cs.c | 225 #define RCR 4 macro
234 /* the normal settings for the RCR register : */
1100 mask_bits(0xff00, ioaddr + RCR);
1579 outw(rx_cfg_setting, ioaddr + RCR);
1651 outw(RCR_SOFTRESET, ioaddr + RCR);
1655 outw(RCR_CLEAR, ioaddr + RCR);
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| /linux-master/drivers/rtc/ |
| H A D | rtc-r9701.c | 38 #define RCR 0x0f /* RTC Control Register */ macro
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| /linux-master/sound/soc/intel/keembay/ |
| H A D | kmb_platform.h | 38 #define RCR(x) (0x40 * (x) + 0x030) macro
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| H A D | kmb_platform.c | 569 kmb_i2s->i2s_base + RCR(ch_reg));
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| /linux-master/sound/soc/dwc/ |
| H A D | local.h | 46 #define RCR(x) (0x40 * x + 0x030) macro
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| H A D | dwc-i2s.c | 264 i2s_write_reg(dev->i2s_base, RCR(ch_reg),
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| /linux-master/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_hw.h | 63 RCR = 0x044, enumerator in enum:_RTL8192PCI_HW
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| H A D | r8192E_dev.c | 86 RegRCR = rtl92e_readl(dev, RCR);
94 rtl92e_writel(dev, RCR, RegRCR);
530 rtl92e_writel(dev, RCR, priv->receive_config);
695 reg = rtl92e_readl(dev, RCR);
701 rtl92e_writel(dev, RCR, reg);
716 rtl92e_writel(dev, RCR, priv->receive_config);
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| /linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192se/ |
| H A D | fw.c | 284 /* If right here, we can set TCR/RCR to desired value */
289 tmpu4b = rtl_read_dword(rtlpriv, RCR);
290 rtl_write_dword(rtlpriv, RCR, (tmpu4b | RCR_APPFCS |
294 "Current RCR settings(%#x)\n", tmpu4b);
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| H A D | hw.c | 285 rtl_write_dword(rtlpriv, RCR, ((u32 *) (val))[0]);
764 /* Set RCR */
765 rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);
983 /* because last function modify RCR, so we update
988 rtlpci->receive_config = rtl_read_dword(rtlpriv, RCR);
990 rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);
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| H A D | reg.h | 37 #define RCR 0x0048 macro
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| /linux-master/drivers/net/ethernet/microchip/ |
| H A D | encx24j600_hw.h | 66 #define RCR(addr) (RCRCODE | (addr & ADDR_MASK)) /* Read Control Register */ macro
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| /linux-master/drivers/net/usb/ |
| H A D | rtl8150.c | 25 #define RCR 0x0130 macro
623 /* RCR bit7=1 attach Rx info at the end; =0 HW CRC (which is broken) */
629 set_registers(dev, RCR, 1, &rcr);
672 async_set_registers(dev, RCR, sizeof(rx_creg), rx_creg);
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| /linux-master/drivers/tty/ |
| H A D | synclink_gt.c | 366 #define RCR 0x86 /* rx control */ macro
2632 /* force hunt mode (write 1 to RCR[3]) */
2633 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);
3851 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3852 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3853 wr_reg16(info, RCR, val); /* clear reset bit */
3876 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3877 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3878 wr_reg16(info, RCR, va
[all...] |
| /linux-master/drivers/net/wan/ |
| H A D | hd64572.h | 105 #define RCR 0x156 /* Rx DMA Critical Request Reg */ macro
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| /linux-master/drivers/spi/ |
| H A D | spi-atmel.c | 157 /* Bitfields in RCR */
943 spi_writel(as, RCR, len);
1430 spi_readl(as, TCR), spi_readl(as, RCR));
1438 spi_writel(as, RCR, 0);
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| /linux-master/drivers/net/ethernet/via/ |
| H A D | via-velocity.h | 393 * Bits in the RCR register
969 volatile u8 RCR; member in struct:mac_regs
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| H A D | via-velocity.c | 1170 BYTE_REG_BITS_ON(rx_mode, ®s->RCR);
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| /linux-master/drivers/net/ethernet/renesas/ |
| H A D | ravb.h | 77 RCR = 0x0090, enumerator in enum:ravb_reg
262 /* RCR */
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| H A D | ravb_main.c | 579 ravb_write(ndev, 0x60000000, RCR);
622 RCR_EFFS | RCR_ENCF | RCR_ETS0 | RCR_ESF | 0x18000000, RCR);
|