History log of /linux-master/sound/soc/dwc/local.h
Revision Date Author Comments
# 52ea7c05 21-Aug-2023 Xingyu Wu <xingyu.wu@starfivetech.com>

ASoC: dwc: i2s: Add StarFive JH7110 SoC support

Add StarFive JH7110(TX0/TX1/RX channels) SoC support in the
designware I2S driver and a flag to check if it is on the JH7110 SoC.

These channels need to enable clocks, resets and syscon register on the
JH7110 SoC. So add init ops in platform data for the JH7110 SoC to do this.

Their resets should be deassert before changing the parent of clocks so
these are done in the init ops of platform data.

The I2S controllers use DMA controller by platform data on the JH7110
and their settings about snd_dmaengine_dai_dma_data() should be added
in the dw_configure_dai_by_pd(). And use dmaengine PCM registration if
these do not have IRQ on the JH7110 SoC.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Link: https://lore.kernel.org/r/20230821144151.207339-4-xingyu.wu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>


# 221acc16 22-Jun-2023 Maxim Kochetkov <fido_max@inbox.ru>

ASoC: dwc: Add TDM mode support

Depending on hardware implementaion of DWC I2S controller may support
TDM mode if enabled in SoC at design time.
Unfortunately there is no way to detect TDM capability for DWC by
reading registers. Anyway, if such capability enabled, TDM mode
can be enabled and configured by dai-tdm-slot-* DT options.

Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Link: https://lore.kernel.org/r/20230622200031.120168-1-fido_max@inbox.ru
Signed-off-by: Mark Brown <broonie@kernel.org>


# a42e988b 13-Jun-2023 Maxim Kochetkov <fido_max@inbox.ru>

ASoC: dwc: add DMA handshake control

DMA mode uses hardware handshake signals. DMACR register is used to enable
the DMA Controller interface operation. So add DMA enable/disable to
i2s_start()/i2s_stop() functions if using DMA mode.

Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Link: https://lore.kernel.org/r/20230613191910.725049-1-fido_max@inbox.ru
Signed-off-by: Mark Brown <broonie@kernel.org>


# c00018ca 04-May-2023 Maxim Kochetkov <fido_max@inbox.ru>

ASoC: dwc: add optional reset support

Some SoC may have resets for I2S subsystem. So add optional reset support.

Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru
Link: https://lore.kernel.org/r/20230504071618.52012-1-fido_max@inbox.ru
Signed-off-by: Mark Brown <broonie@kernel.org


# 0803a5cb 29-Mar-2021 YueHaibing <yuehaibing@huawei.com>

ASoC: dwc: Fix -Wmissing-prototypes warnings

while CONFIG_SND_DESIGNWARE_PCM is not set, building with W=1 shows this:

sound/soc/dwc/local.h:127:6: warning: no previous prototype for ‘dw_pcm_push_tx’ [-Wmissing-prototypes]
void dw_pcm_push_tx(struct dw_i2s_dev *dev) { }
^~~~~~~~~~~~~~
sound/soc/dwc/local.h:128:6: warning: no previous prototype for ‘dw_pcm_pop_rx’ [-Wmissing-prototypes]
void dw_pcm_pop_rx(struct dw_i2s_dev *dev) { }
^~~~~~~~~~~~~
sound/soc/dwc/local.h:129:5: warning: no previous prototype for ‘dw_pcm_register’ [-Wmissing-prototypes]
int dw_pcm_register(struct platform_device *pdev)
^~~~~~~~~~~~~~~

Change these to inline functions to fix the warnings.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20210329150524.18184-1-yuehaibing@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>


# e2f748e0 27-Dec-2016 Jose Abreu <Jose.Abreu@synopsys.com>

ASoC: dwc: Add record capability in PIO mode

Up until now PIO mode offered only playback support. With
this patch we add support for record mode. The PCM was
refactored so that we could reuse the existing infrastructure
without many changes.

We have support for 16 and 32 bits of sample size using
only 2 channels.

Tested in a x86_64 platform and in ARC AXS101 SDP platform.

Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Mark Brown <broonie@kernel.org>


# 79361b2b 08-Jun-2016 Jose Abreu <Jose.Abreu@synopsys.com>

ASoC: dwc: Add PIO PCM extension

A PCM extension was added to I2S driver so that audio
samples are transferred using PIO mode.

The PCM supports two channels @ 16 or 32 bits with rates
32k, 44.1k and 48k.

Although the mainline I2S driver uses ALSA DMA engine the
I2S controller can be built without DMA support, therefore
this is the reason why this extension was added.

Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Cc: Carlos Palminha <palminha@synopsys.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: linux-snps-arc@lists.infradead.org
Cc: alsa-devel@alsa-project.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>