Searched refs:PHY_STATUS (Results 1 - 14 of 14) sorted by path
/linux-master/drivers/gpu/drm/hisilicon/kirin/ |
H A D | dw_drm_dsi.c | 436 val = readl(base + PHY_STATUS);
|
H A D | dw_dsi_reg.h | 62 #define PHY_STATUS 0xB0 /* D-PHY PPI status interface */ macro
|
/linux-master/drivers/gpu/drm/sprd/ |
H A D | sprd_dsi.c | 91 #define PHY_STATUS 0x9C macro 228 if (dsi_reg_rd(ctx, PHY_STATUS, PHY_LOCK, 1))
|
/linux-master/drivers/net/ethernet/intel/e1000/ |
H A D | e1000_hw.c | 1466 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); 1469 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); 1779 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 1784 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 1813 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 1818 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 2084 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 2087 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); 2407 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); 2410 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, [all...] |
H A D | e1000_hw.h | 2479 #define PHY_STATUS 0x01 /* Status Register */ macro
|
/linux-master/drivers/net/ethernet/intel/igb/ |
H A D | e1000_defines.h | 695 #define PHY_STATUS 0x01 /* Status Register */ macro
|
H A D | e1000_mac.c | 935 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, 939 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,
|
H A D | e1000_phy.c | 1596 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 1599 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 1629 /* Some PHYs require the PHY_STATUS register to be read 1633 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 1644 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
|
/linux-master/drivers/net/ethernet/intel/igc/ |
H A D | igc_defines.h | 619 #define PHY_STATUS 0x01 /* Status Register */ macro
|
H A D | igc_mac.c | 481 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, 485 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,
|
H A D | igc_phy.c | 71 /* Some PHYs require the PHY_STATUS register to be read 75 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 86 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 403 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); 406 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
|
/linux-master/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 17 #define PHY_STATUS 0x01 /* Status Regiser */ macro
|
/linux-master/drivers/pci/controller/dwc/ |
H A D | pcie-artpec6.c | 75 #define PHY_STATUS 0x118 macro 162 val = readl(artpec6_pcie->phy_base + PHY_STATUS);
|
/linux-master/drivers/phy/freescale/ |
H A D | phy-fsl-imx8qm-lvds-phy.c | 42 #define PHY_STATUS 0x10 macro 129 ret = regmap_read_poll_timeout(priv->regmap, PHY_STATUS, locked,
|
Completed in 698 milliseconds