Searched refs:OS_REG_RMW_FIELD (Results 1 - 25 of 47) sorted by relevance

12

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/
H A Dar9285_cal.c83 OS_REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
84 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
85 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
86 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
87 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
88 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
89 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
90 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
91 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
92 OS_REG_RMW_FIELD(a
[all...]
H A Dar9287_reset.c89 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
91 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
93 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
95 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,
507 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
510 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
513 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
516 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
522 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING,
525 OS_REG_RMW_FIELD(a
[all...]
H A Dar9285_reset.c208 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
210 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
212 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
214 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
218 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
221 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
223 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
226 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
230 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
232 OS_REG_RMW_FIELD(a
[all...]
H A Dar9287_olc.c95 OS_REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11,
97 OS_REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11,
H A Dar9280_olc.c108 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
109 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
111 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, initTxGain);
167 OS_REG_RMW_FIELD(ah,
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5210/
H A Dar5210_power.c38 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_ALLOW);
58 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE);
66 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE,
92 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211_power.c47 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE);
55 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE,
81 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
94 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
H A Dar5211_beacon.c183 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLDUR,
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_gpio.c221 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
226 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK,
232 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
237 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK,
242 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_CAUSE,
254 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_POL,
260 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
265 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK,
271 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
276 OS_REG_RMW_FIELD(a
[all...]
H A Dar5416_btcoex.c247 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE,
249 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, AR_PCU_BT_ANT_PREVENT_RX,
293 OS_REG_RMW_FIELD(ah, AR_QUIET1,
296 OS_REG_RMW_FIELD(ah, AR_MISC_MODE,
299 OS_REG_RMW_FIELD(ah, AR_QUIET1,
302 OS_REG_RMW_FIELD(ah, AR_MISC_MODE,
351 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
354 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
389 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
H A Dar5416_cal_iq.c124 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i),
126 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i),
H A Dar5416_ani.c238 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
240 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
242 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
244 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
264 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
266 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
268 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
270 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
272 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
274 OS_REG_RMW_FIELD(a
[all...]
H A Dar5416_reset.c349 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
379 OS_REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
427 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 250);
428 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 700);
887 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
889 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
901 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI,
903 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI,
1549 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1552 OS_REG_RMW_FIELD(a
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_spectral.c124 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR, 0x7f);
128 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRSTEP, 0x3f);
131 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR, 0x1f);
135 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELSTEP, 0x1f);
139 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_FIRPWR, 0x7f);
144 OS_REG_RMW_FIELD(
148 OS_REG_RMW_FIELD(
163 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_RSSI_THR1A, 0x7f);
169 OS_REG_RMW_FIELD(ah, AR_PHY_CCA_0, AR_PHY_CCA_THRESH62, thresh62);
170 OS_REG_RMW_FIELD(a
[all...]
H A Dar9300_reset.c190 OS_REG_RMW_FIELD(ah,
205 OS_REG_RMW_FIELD(ah,
809 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_MAN, ds_coef_man);
810 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, AR_PHY_TIMING3_DSC_EXP, ds_coef_exp);
821 OS_REG_RMW_FIELD(ah, AR_PHY_SGI_DELTA, AR_PHY_SGI_DSC_MAN, ds_coef_man);
822 OS_REG_RMW_FIELD(ah, AR_PHY_SGI_DELTA, AR_PHY_SGI_DSC_EXP, ds_coef_exp);
917 OS_REG_RMW_FIELD(
1006 OS_REG_RMW_FIELD(ah,
1009 OS_REG_RMW_FIELD(ah,
1012 OS_REG_RMW_FIELD(a
[all...]
H A Dar9300_eeprom.c1321 OS_REG_RMW_FIELD(ah, 0x16c88, AR_PHY_CTRL2_TX_CAL_EN, 0x0);
1322 OS_REG_RMW_FIELD(ah, 0x16c88, AR_PHY_CTRL2_TX_CAL_SEL, 0x0);
1323 OS_REG_RMW_FIELD(ah, 0x16c88,
1378 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x0);
1425 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x0);
1431 OS_REG_RMW_FIELD(ah, reg_PMU1, AR_PHY_PMU1_PWD, 0x1);
1437 OS_REG_RMW_FIELD(ah, reg_PMU2, AR_PHY_PMU2_PGM, 0x1);
1444 OS_REG_RMW_FIELD(ah, reg_PMU1, AR_PHY_PMU1_PWD, 0x1);
1516 OS_REG_RMW_FIELD(ah,
1519 OS_REG_RMW_FIELD(a
[all...]
H A Dar9300_mci.c70 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_HW_BASED, 1);
71 OS_REG_RMW_FIELD(ah, AR_MCI_SCHD_TABLE_2, AR_MCI_SCHD_TABLE_2_MEM_BASED, 1);
78 OS_REG_RMW_FIELD(ah, AR_MCI_MISC, AR_MCI_MISC_HW_FIX_EN, 1);
82 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL,
84 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL,
92 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL,
96 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL,
111 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
114 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2,
539 OS_REG_RMW_FIELD(a
[all...]
H A Dar9300_ani.c514 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
516 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
518 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M1_THRESH,
520 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2_THRESH,
522 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2COUNT_THR,
524 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
526 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
528 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
530 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, AR_PHY_SFCORR_EXT_M1_THRESH,
532 OS_REG_RMW_FIELD(a
[all...]
H A Dar9300_beacon.c109 OS_REG_RMW_FIELD(ah, AR_RSSI_THR,
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_misc.c116 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1);
121 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
149 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
H A Dar5312_reset.c268 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
282 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... );
297 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F);
301 OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12);
308 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32);
393 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL,
469 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_power.c53 * which when blindly written back with OS_REG_RMW_FIELD
101 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
114 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
H A Dar5212_ani.c249 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
251 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
253 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
255 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
274 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
276 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
278 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
280 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
282 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
284 OS_REG_RMW_FIELD(a
[all...]
H A Dar5212_misc.c511 OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
558 OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
694 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1);
696 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 1);
704 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x2);
710 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x3);
713 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x0);
714 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0);
731 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
744 OS_REG_RMW_FIELD(a
[all...]
H A Dar5212_reset.c323 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
360 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
374 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... );
475 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL,
545 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1059 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1061 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1078 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
1636 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
1678 OS_REG_RMW_FIELD(a
[all...]

Completed in 125 milliseconds

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