| /linux-master/drivers/clk/ux500/ |
| H A D | u8500_of_clk.c | 233 CLK_SET_RATE_GATE);
238 CLK_SET_RATE_GATE);
241 CLK_SET_RATE_GATE);
244 CLK_SET_RATE_GATE);
249 CLK_SET_RATE_GATE);
262 CLK_SET_RATE_GATE);
276 CLK_SET_RATE_GATE);
279 PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE);
282 PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE);
285 PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE);
[all...] |
| /linux-master/drivers/clk/baikal-t1/ |
| H A D | clk-ccu-div.c | 137 CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
141 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
144 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
147 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
150 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
153 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
156 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
159 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
162 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAIN),
165 CLK_SET_RATE_GATE, CCU_DIV_RESET_DOMAI
[all...] |
| H A D | clk-ccu-pll.c | 69 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0),
71 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0),
75 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0)
|
| H A D | ccu-div.c | 442 num += !!(div->flags & CLK_SET_RATE_GATE) +
451 if (!(div->flags & CLK_SET_RATE_GATE) &&
604 if (hw_init.flags & CLK_SET_RATE_GATE)
|
| /linux-master/drivers/clk/at91/ |
| H A D | sam9x60.c | 244 CLK_IS_CRITICAL | CLK_SET_RATE_GATE);
255 CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0);
264 &pll_frac_layout, CLK_SET_RATE_GATE);
271 CLK_SET_RATE_GATE |
291 CLK_SET_RATE_GATE, 0);
|
| H A D | clk-h32mx.c | 100 init.flags = CLK_SET_RATE_GATE;
|
| H A D | clk-plldiv.c | 90 init.flags = CLK_SET_RATE_GATE;
|
| H A D | sama7g5.c | 212 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
225 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
241 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
251 .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
262 .f = CLK_SET_RATE_GATE,
271 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
283 .f = CLK_SET_RATE_GATE, },
291 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
303 .f = CLK_SET_RATE_GATE,
312 .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GAT
[all...] |
| H A D | clk-audio-pll.c | 467 init.flags = CLK_SET_RATE_GATE;
497 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
528 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
|
| H A D | clk-smd.c | 129 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
| H A D | at91sam9rl.c | 134 &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0);
|
| H A D | clk-usb.c | 240 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
291 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
|
| /linux-master/drivers/clk/ |
| H A D | clk-fsl-sai.c | 65 CLK_SET_RATE_GATE);
|
| H A D | clk-tps68470.c | 200 .flags = CLK_SET_RATE_GATE,
|
| /linux-master/drivers/clk/qcom/ |
| H A D | lcc-ipq806x.c | 138 .flags = CLK_SET_RATE_GATE,
255 .flags = CLK_SET_RATE_GATE,
339 .flags = CLK_SET_RATE_GATE,
|
| H A D | lcc-msm8960.c | 121 .flags = CLK_SET_RATE_GATE, \
283 .flags = CLK_SET_RATE_GATE,
353 .flags = CLK_SET_RATE_GATE,
|
| H A D | gcc-mdm9615.c | 792 .flags = CLK_SET_RATE_GATE,
843 .flags = CLK_SET_RATE_GATE,
1066 .flags = CLK_SET_RATE_GATE,
1117 .flags = CLK_SET_RATE_GATE,
1173 .flags = CLK_SET_RATE_GATE,
1229 .flags = CLK_SET_RATE_GATE,
1285 .flags = CLK_SET_RATE_GATE,
|
| /linux-master/drivers/clk/imx/ |
| H A D | clk-gpr-mux.c | 98 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
| H A D | clk-pfdv2.c | 227 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
229 init.flags = CLK_SET_RATE_GATE;
|
| H A D | clk-imx7ulp.c | 77 hws[IMX7ULP_CLK_APLL_PRE_DIV] = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x508, 8, 3, CLK_SET_RATE_GATE);
78 hws[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE);
102 hws[IMX7ULP_CLK_SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x604, 8, 3, 0, ulp_div_table, &imx_ccm_lock);
|
| H A D | clk-imx6sll.c | 176 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
178 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock);
180 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
182 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
|
| H A D | clk-composite-7ulp.c | 139 has_swrst ? &pcc_gate_ops : &clk_gate_ops, CLK_SET_RATE_GATE |
|
| /linux-master/drivers/phy/mediatek/ |
| H A D | phy-mtk-mipi-dsi.c | 114 .flags = CLK_SET_RATE_GATE,
|
| H A D | phy-mtk-hdmi-mt8173.c | 246 .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
| H A D | phy-mtk-hdmi-mt2701.c | 218 .flags = CLK_SET_RATE_GATE,
|