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639d5661 |
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14-Apr-2022 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: Implement the missing CLKOUT clocks This implements the two missing CLKOUT clocks for the ux500 (well really U8500/DB8500) SoC. The clocks are initialized using a specific parent and divider and these are specified in the device tree, see the separate binding patch. The implementation is a bit different in that it will only create the clock in the clock framework if a user appears in the device tree, rather than it being registered upfront like most of the other clocks. This is because the clock needs parameters for source and divider from the consumer phandle for the clock to be set up properly when the clock is registered. There could be more than one user of a CLKOUT clock, but we have not seen this in practice. If this happens the framework prints and info and returns the previously registered clock. Using the clocks requires also muxing the CLKOUT1 or CLKOUT2 to the appropriate pad. In practice this is achived in a pinctrl handle in the DTS node for the device using the CLKOUT clock, so this muxing is done separately from the clock itself. Example: haptic@49 { compatible = "immersion,isa1200"; reg = <0x49>; (...) /* clkout1 from ACLK divided by 8 */ clocks = <&clkout_clk DB8500_CLKOUT_1 DB8500_CLKOUT_SRC_ACLK 8>; pinctrl-names = "default"; pinctrl-0 = <&isa1200_janice_default>; }; isa1200_janice_default: isa1200_janice { /* Bring out clkout1 on pin GPIO227 pin AH7 */ janice_mux { function = "clkout"; groups = "clkout1_a_1"; }; janice_cfg1 { pins = "GPIO227_AH7"; ste,config = <&out_lo>; }; (...) This was tested successfully with the Immersion ISA1200 haptic feedback unit on the Samsung Galaxy S Advance GT-I9070 (Janice) mobile phone. As the CLKOUT clocks need some undefined fixed rate parent clocks that are currently missing from the PRCMU clock implementation, the three simplest are added in this patch: clk38m_to_clkgen, aclk and sysclk. The only parent not yet available in the implementation is clk009, which is a kind of special muxed and divided clock which isn't even implemented in the vendor clock driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-6-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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a8173c59 |
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14-Apr-2022 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: Rewrite PRCMU clocks to use clk_hw_* This rewrites all the u8500 PRCMU clocks and helper functions to handle clocks using struct clk_hw rather than struct clk, as is normal for modern clock drivers. Use clk_hw_register(), of_clk_add_hw_provider() and stack all the clocks into a compile-time dynamic array of struct clk_hw_onecell_data. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-5-linus.walleij@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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b14cbdfd |
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21-Sep-2021 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: Add driver for the reset portions of PRCC The Ux500 PRCC (peripheral reset and clock controller) can also control reset of the IP blocks, not just clocks. As the PRCC is probed as a clock controller and we have other platforms implementing combined clock and reset controllers, follow this pattern and implement the PRCC rest controller as part of the clock driver. The reset controller needs to be selected from the machine as Ux500 has traditionally selected its mandatory subsystem prerequisites from there. Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210921184803.1757916-2-linus.walleij@linaro.org Acked-by: Ulf Hansson <ulf.hansson@linaro.org> [sboyd@kernel.org: Dropped allocation error message] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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9050ad81 |
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01-Aug-2021 |
Linus Walleij <linus.walleij@linaro.org> |
mfd: db8500-prcmu: Handle missing FW variant There was an "unknown" firmware variant turning up in the wild causing problems in the clock driver. Add this missing variant and clarify that varian 11 and 15 are Samsung variants, as this is now very well known from released products. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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248fdcc7 |
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17-Dec-2019 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: Fix up the SGA clock for some variants Some of the special PRCMU firmware variants were not properly detected in the Ux500 clock driver, resulting in the wrong clock for the SGA. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lkml.kernel.org/r/20191217210504.27888-1-linus.walleij@linaro.org Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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af873fce |
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28-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194 Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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87ab1151 |
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05-Dec-2018 |
Rob Herring <robh@kernel.org> |
clk: Use of_node_name_eq for node name comparisons Convert string compares of DT node names to use of_node_name_eq helper instead. This removes direct access to the node name pointer. For instances using of_node_cmp, this has the side effect of now using case sensitive comparisons. This should not matter for any FDT based system which all of these are. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-renesas-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> (clk-mstp) Acked-by: Ulf Hansson <ulf.hansson@linaro.org> (ux500) Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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689a318c |
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13-Jan-2017 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: move AB8500 sysclk over to PRCMU clk driver The AB8500 sysclk is just another PRCMU-controlled clock, there is no reason why it should be in the ABx500-controlled part of the clock implementation. Doing this and the corresponding device tree changes makes USB work on the Ux500 again. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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269f1aac |
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20-Jun-2016 |
Arnd Bergmann <arnd@arndb.de> |
ARM: ux500: use CLK_OF_DECLARE() The ux500 DT support predates the CLK_OF_DECLARE macro and calls directly into the clk driver from platform code. Converting this to CLK_OF_DECLARE makes the code much nicer and similar to how modern platforms do it today. It also removes the last user of cpu_is_u8500_family() etc. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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66f4ae77 |
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01-Mar-2016 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: ux500: Remove CLK_IS_ROOT This flag is a no-op now. Remove usage of the flag. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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5dc0fe19 |
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30-Jul-2015 |
Linus Walleij <linus.walleij@linaro.org> |
clk/ARM: move Ux500 PRCC bases to the device tree The base addresses for the Ux500 PRCC controllers are hardcoded, let's move them to the clock node in the device tree and delete the constants. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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a162ca91 |
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19-Jun-2015 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: ux500: Remove clk.h and clkdev.h includes Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Remove the include here because this is a provider driver. Also remove clkdev.h in files that aren't using it. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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a6ae41b5 |
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20-Apr-2015 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: ape[ate|trace]clk are scaleable The APEATCLK and APETRACECLK are actually scaleable so register them as scaleable clocks. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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c112c1d8 |
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14-Jan-2014 |
Sachin Kamat <sachin.kamat@linaro.org> |
clk: ux500: Staticize ux500_twocell_get ux500_twocell_get is a local symbol. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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f5ff9a11 |
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18-Oct-2013 |
Linus Walleij <linus.walleij@linaro.org> |
clk: ux500: fix erroneous bit assignment Due to a typo or similar, the peripheral group 2 clock 11 gate was set to bit 1 instead of bit 11. We need to fix this to be able to set the correct enable bit in the device tree: when trying to correct the bit assignment in the device tree, the system would hang. Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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257015a2 |
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18-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Provide a look-up for the ARMSS clock The ARMSS clock is used by the newly DT enabled CPUFreq driver. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4e334660 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add Device Tree support for the TWD clock This patch enables the TWD fixed factor clock to be specified from Device Tree via phandles to the "smp-twd-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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d625a730 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add Device Tree support for the RTC clock This patch enables the RTC fixed frequency clock to be specified from Device Tree via phandles to the "rtc32k-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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89da2dfa |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add Device Tree support for the PRCC Kernel clock This patch enables clocks to be specified from Device Tree via phandles to the "prcc-kernel-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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2d080300 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add Device Tree support for the PRCC Peripheral clock This patch enables clocks to be specified from Device Tree via phandles to the "prcc-periph-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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f9fcb8e8 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add Device Tree support for the PRCMU clock This patch enables clocks to be specified from Device Tree via phandles to the "prcmu-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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b4bdc81b |
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22-Jul-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Add a 2-cell Device Tree parser for obtaining PRCC clocks PRCC (peripheral and kernel) clocks are specified using a property tuple <&phandle base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6), and bit is read-in value into that peripheral stipulated by the hardware specification. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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dec759d8 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Provide u8500_clk with skeleton Device Tree support The functional components will be added on a per-clock basis. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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82b0f4b7 |
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17-Sep-2013 |
Lee Jones <lee.jones@linaro.org> |
clk: ux500: Copy u8500_clk_init() ready for DT enablement Here we're using the old clock initialisation function as a template. It's necessary to remove all of the clk_register_clkdev() calls as they don't make sense when booting with Device Tree. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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