Searched refs:AR_MIBC (Results 1 - 15 of 15) sorted by relevance
| /freebsd-11-stable/tools/tools/ath/common/ |
| H A D | dumpregs_5210.c | 57 DEFBASIC(AR_MIBC, "MIBC"),
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| H A D | dumpregs_5211.c | 53 DEFBASIC(AR_MIBC, "MIBC"),
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| H A D | dumpregs_5212.c | 55 DEFBASIC(AR_MIBC, "MIBC"),
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| H A D | dumpregs_5416.c | 56 DEFBASIC(AR_MIBC, "MIBC"),
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| /freebsd-11-stable/sys/dev/ath/ath_hal/ar5210/ |
| H A D | ar5210reg.h | 46 #define AR_MIBC 0x0040 /* MIB control register */ macro
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| H A D | ar5210_reset.c | 185 OS_REG_WRITE(ah, AR_MIBC, 0); /* unfreeze ctrs + clr state */
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| /freebsd-11-stable/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_misc.c | 367 OS_REG_WRITE(ah, AR_MIBC,
374 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC | AR_MIBC_CMC);
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| H A D | ar5212_ani.c | 690 __func__, OS_REG_READ(ah, AR_MIBC),
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| H A D | ar5212reg.h | 36 #define AR_MIBC 0x0040 /* MAC MIB control register */ macro
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| /freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_ani.c | 149 OS_REG_WRITE(ah, AR_MIBC,
161 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC | AR_MIBC_CMC);
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| H A D | ar9300_xmit_ds.c | 532 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC);
533 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
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| H A D | ar9300_misc.c | 2085 reg_val = OS_REG_READ(ah, AR_MIBC);
2086 OS_REG_WRITE(ah, AR_MIBC, reg_val | AR_MIBC_CMC);
2087 OS_REG_WRITE(ah, AR_MIBC, reg_val & ~AR_MIBC_CMC);
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| H A D | ar9300reg.h | 140 #define AR_MIBC AR_MAC_DMA_OFFSET(MAC_DMA_MIBC) macro
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| /freebsd-11-stable/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211reg.h | 41 #define AR_MIBC 0x0040 /* MIB control register */ macro
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| /freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_ani.c | 659 __func__, OS_REG_READ(ah, AR_MIBC),
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