Searched refs:ARM64_FEATURE_MASK (Results 1 - 14 of 14) sorted by relevance

/linux-master/arch/arm64/kvm/hyp/include/nvhe/
H A Dfixed_config.h39 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_FP) | \
40 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AdvSIMD) | \
41 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_DIT) | \
42 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | \
43 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3) \
55 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), ID_AA64PFR0_EL1_ELx_64BIT_ONLY) | \
56 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1), ID_AA64PFR0_EL1_ELx_64BIT_ONLY) | \
57 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL2), ID_AA64PFR0_EL1_ELx_64BIT_ONLY) | \
58 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL3), ID_AA64PFR0_EL1_ELx_64BIT_ONLY) | \
59 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_RA
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/linux-master/arch/arm64/kvm/hyp/nvhe/
H A Dpkvm.c33 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0),
35 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1),
42 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_FP),
44 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AdvSIMD),
51 if (FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_RAS), feature_ids) <
58 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AMU), feature_ids)) {
64 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE), feature_ids)) {
87 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE), feature_ids)) {
107 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), feature_ids)) {
114 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVe
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H A Dsys_regs.c103 allow_mask &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);
168 allow_mask &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |
169 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |
170 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |
171 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));
181 allow_mask &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |
182 ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));
278 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1),
/linux-master/tools/testing/selftests/kvm/aarch64/
H A Ddebug-exceptions.c119 brps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_BRPs), dfr0);
124 wrps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_WRPs), dfr0);
421 return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVer), id_aa64dfr0);
542 brp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_BRPs), aa64dfr0) + 1;
546 wrp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_WRPs), aa64dfr0) + 1;
549 ctx_brp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_CTX_CMPs), aa64dfr0) + 1;
H A Daarch32_id_regs.c149 el0 = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), val);
H A Dpage_fault_test.c99 atomic = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_ATOMIC), isar0);
106 uint64_t dzp = FIELD_GET(ARM64_FEATURE_MASK(DCZID_EL0_DZP), dczid);
199 hadbs = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_HAFDBS), mmfr1);
H A Dvpmu_counter_access.c449 pmuver = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), dfr0);
H A Dset_id_regs.c465 el0 = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), val);
/linux-master/tools/testing/selftests/kvm/lib/aarch64/
H A Dprocessor.c566 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN4), val);
570 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN64), val);
574 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN16), val);
/linux-master/arch/arm64/kvm/
H A Dsys_regs.c1531 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);
1533 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME);
1537 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |
1538 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |
1539 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |
1540 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));
1544 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |
1545 ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));
1547 val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT);
1553 val &= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCID
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H A Darm.c2244 val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |
2245 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));
2247 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),
2249 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),
H A Dpmu-emul.c1130 return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), tmp);
/linux-master/tools/arch/arm64/include/asm/
H A Dsysreg.h722 #define ARM64_FEATURE_MASK(x) (x##_MASK) macro
/linux-master/arch/arm64/include/asm/
H A Dsysreg.h1070 #define ARM64_FEATURE_MASK(x) (x##_MASK) macro

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