/u-boot/include/ |
H A D | fis.h | 13 u8 fis_type; 14 u8 pm_port_c; 15 u8 command; 16 u8 features; 17 u8 lba_low; 18 u8 lba_mid; 19 u8 lba_high; 20 u8 device; 21 u8 lba_low_exp; 22 u8 lba_mid_ex [all...] |
H A D | usbdescriptors.h | 182 u8 bLength; 183 u8 bDescriptorType; /* 0x5 */ 184 u8 bEndpointAddress; 185 u8 bmAttributes; 187 u8 bInterval; 191 u8 bLength; 192 u8 bDescriptorType; /* 0x04 */ 193 u8 bInterfaceNumber; 194 u8 bAlternateSetting; 195 u8 bNumEndpoint [all...] |
/u-boot/board/keymile/common/ |
H A D | common.h | 51 u8 xi_ena; /* General defect enable */ 52 u8 pack1[3]; 53 u8 en_csn; 54 u8 pack2; 55 u8 safe_mem; 56 u8 pack3; 57 u8 id; 58 u8 pack4; 59 u8 rev; 60 u8 buil [all...] |
/u-boot/arch/arm/include/asm/arch-vf610/ |
H A D | ddrmc-vf610.h | 16 u8 tinit; 19 u8 wrlat; 20 u8 caslat_lin; 21 u8 trc; 22 u8 trrd; 23 u8 tccd; 24 u8 tbst_int_interval; 25 u8 tfaw; 26 u8 trp; 27 u8 twt [all...] |
/u-boot/arch/x86/include/asm/arch-queensbay/fsp/ |
H A D | fsp_vpd.h | 15 u8 dummy[240]; /* Offset 0x0010 */ 16 u8 hda_verb_header[12]; /* Offset 0x0100 */ 18 u8 hda_verb_data0[16]; /* Offset 0x0110 */ 19 u8 hda_verb_data1[16]; /* Offset 0x0120 */ 20 u8 hda_verb_data2[16]; /* Offset 0x0130 */ 21 u8 hda_verb_data3[16]; /* Offset 0x0140 */ 22 u8 hda_verb_data4[16]; /* Offset 0x0150 */ 23 u8 hda_verb_data5[16]; /* Offset 0x0160 */ 24 u8 hda_verb_data6[16]; /* Offset 0x0170 */ 25 u8 hda_verb_data [all...] |
/u-boot/arch/m68k/include/asm/coldfire/ |
H A D | ata.h | 15 u8 toff; /* 0x00 */ 16 u8 ton; /* 0x01 */ 17 u8 t1; /* 0x02 */ 18 u8 t2w; /* 0x03 */ 19 u8 t2r; /* 0x04 */ 20 u8 ta; /* 0x05 */ 21 u8 trd; /* 0x06 */ 22 u8 t4; /* 0x07 */ 23 u8 t9; /* 0x08 */ 26 u8 t [all...] |
/u-boot/arch/x86/include/asm/arch-baytrail/ |
H A D | global_nvs.h | 10 u8 pcnt; /* processor count */ 11 u8 iuart_en; /* internal UART enabled */ 17 u8 rsvd[254];
|
/u-boot/arch/arm/include/asm/arch-tegra/ |
H A D | crypto.h | 17 int sign_data_block(u8 *source, unsigned int length, u8 *signature); 27 int sign_enc_data_block(u8 *source, unsigned int length, u8 *signature, u8 *key); 36 int encrypt_data_block(u8 *source, unsigned int length, u8 *key); 45 int decrypt_data_block(u8 *source, unsigned int length, u8 *key);
|
/u-boot/board/xilinx/common/ |
H A D | fru.h | 12 u8 version; 13 u8 off_internal; 14 u8 off_chassis; 15 u8 off_board; 16 u8 off_product; 17 u8 off_multirec; 18 u8 pad; 19 u8 crc; 26 u8 ver; 27 u8 le [all...] |
/u-boot/board/freescale/common/ |
H A D | qixis.h | 14 u8 id; /* ID value uniquely identifying each QDS board type */ 15 u8 arch; /* Board version information */ 16 u8 scver; /* QIXIS Version Register */ 17 u8 model; /* Information of software programming model version */ 18 u8 tagdata; 19 u8 ctl_sys; 20 u8 aux; /* Auxiliary Register,0x06 */ 21 u8 clk_spd; 22 u8 stat_dut; 23 u8 stat_sy [all...] |
H A D | ngpixis.h | 14 u8 id; 15 u8 arch; 16 u8 scver; 17 u8 csr; 18 u8 rst; 19 u8 serclk; 20 u8 aux; 21 u8 spd; 22 u8 brdcfg0; 23 u8 brdcfg [all...] |
/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | mxc_hdmi.h | 19 u8 design_id; /* 0x000 */ 20 u8 revision_id; /* 0x001 */ 21 u8 product_id0; /* 0x002 */ 22 u8 product_id1; /* 0x003 */ 23 u8 config0_id; /* 0x004 */ 24 u8 config1_id; /* 0x005 */ 25 u8 config2_id; /* 0x006 */ 26 u8 config3_id; /* 0x007 */ 27 u8 reserved1[0xf8]; 29 u8 ih_fc_stat [all...] |
/u-boot/arch/x86/include/asm/arch-apollolake/fsp/ |
H A D | fsp_s_upd.h | 21 u8 active_processor_cores; 22 u8 disable_core1; 23 u8 disable_core2; 24 u8 disable_core3; 25 u8 vmx_enable; 26 u8 proc_trace_mem_size; 27 u8 proc_trace_enable; 28 u8 eist; 29 u8 boot_p_state; 30 u8 enable_c [all...] |
/u-boot/arch/x86/include/asm/arch-quark/ |
H A D | global_nvs.h | 10 u8 pcnt; /* processor count */ 16 u8 rsvd[255];
|
/u-boot/arch/x86/include/asm/arch-tangier/ |
H A D | global_nvs.h | 12 u8 pcnt; /* processor count */ 18 u8 rsvd[255];
|
/u-boot/board/google/chameleonv3/ |
H A D | mercury_aa1.h | 12 int mercury_aa1_read_mac(u8 *mac);
|
/u-boot/arch/arm/include/asm/arch-sunxi/ |
H A D | pmic_bus.h | 12 int pmic_bus_read(u8 reg, u8 *data); 13 int pmic_bus_write(u8 reg, u8 data); 14 int pmic_bus_setbits(u8 reg, u8 bits); 15 int pmic_bus_clrbits(u8 reg, u8 bits);
|
/u-boot/board/freescale/ls1046ardb/ |
H A D | cpld.h | 14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */ 15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */ 16 u8 pcba_ver; /* 0x2 - PCBA Revision Register */ 17 u8 system_rst; /* 0x3 - system reset register */ 18 u8 soft_mux_on; /* 0x4 - Switch Control Enable Register */ 19 u8 cfg_rcw_src1; /* 0x5 - RCW Source Location POR Regsiter 1 */ 20 u8 cfg_rcw_src2; /* 0x6 - RCW Source Location POR Regsiter 2 */ 21 u8 vbank; /* 0x7 - QSPI Flash Bank Setting Register */ 22 u8 sysclk_sel; /* 0x8 - System clock POR Register */ 23 u8 uart_se [all...] |
/u-boot/arch/x86/include/asm/arch-braswell/fsp/ |
H A D | fsp_vpd.h | 14 u8 revision; /* Offset 0x0028 */ 15 u8 unused2[7]; /* Offset 0x0029 */ 18 u8 mrc_init_spd_addr1; /* Offset 0x0034 */ 19 u8 mrc_init_spd_addr2; /* Offset 0x0035 */ 20 u8 mem_ch0_config; /* Offset 0x0036 */ 21 u8 mem_ch1_config; /* Offset 0x0037 */ 23 u8 igd_dvmt50_pre_alloc; /* Offset 0x003c */ 24 u8 aperture_size; /* Offset 0x003d */ 25 u8 gtt_size; /* Offset 0x003e */ 26 u8 legacy_seg_decod [all...] |
/u-boot/arch/m68k/include/asm/ |
H A D | immap_5301x.h | 79 u8 rsvd1[19]; /* 0x00 - 0x12 */ 80 u8 wcr; /* 0x13 */ 83 u8 rsvd3[3]; /* 0x18 - 0x1A */ 84 u8 cwsr; /* 0x1B */ 85 u8 rsvd4[3]; /* 0x1C - 0x1E */ 86 u8 scmisr; /* 0x1F */ 88 u8 bcr; /* 0x24 */ 89 u8 rsvd6[74]; /* 0x25 - 0x6F */ 91 u8 rsvd7; /* 0x74 */ 92 u8 cfie [all...] |
/u-boot/board/freescale/t104xrdb/ |
H A D | cpld.h | 13 u8 cpld_ver; /* 0x00 - CPLD Major Revision Register */ 14 u8 cpld_ver_sub; /* 0x01 - CPLD Minor Revision Register */ 15 u8 hw_ver; /* 0x02 - Hardware Revision Register */ 16 u8 sw_ver; /* 0x03 - Software Revision register */ 17 u8 res0[12]; /* 0x04 - 0x0F - not used */ 18 u8 reset_ctl1; /* 0x10 - Reset control Register1 */ 19 u8 reset_ctl2; /* 0x11 - Reset control Register2 */ 20 u8 int_status; /* 0x12 - Interrupt status Register */ 21 u8 flash_ctl_status; /* 0x13 - Flash control and status register */ 22 u8 fan_ctl_statu [all...] |
/u-boot/board/freescale/t102xrdb/ |
H A D | cpld.h | 8 u8 cpld_ver; /* 0x00 - CPLD Major Revision Register */ 9 u8 cpld_ver_sub; /* 0x01 - CPLD Minor Revision Register */ 10 u8 hw_ver; /* 0x02 - Hardware Revision Register */ 11 u8 sw_ver; /* 0x03 - Software Revision register */ 12 u8 res0[12]; /* 0x04 - 0x0F - not used */ 13 u8 reset_ctl1; /* 0x10 - Reset control Register1 */ 14 u8 reset_ctl2; /* 0x11 - Reset control Register2 */ 15 u8 int_status; /* 0x12 - Interrupt status Register */ 16 u8 flash_csr; /* 0x13 - Flash control and status register */ 17 u8 fan_ctl_statu [all...] |
/u-boot/board/freescale/t4rdb/ |
H A D | cpld.h | 15 u8 chip_id1; /* 0x00 - CPLD Chip ID1 Register */ 16 u8 chip_id2; /* 0x01 - CPLD Chip ID2 Register */ 17 u8 sw_maj_ver; /* 0x02 - CPLD Code Major Version Register */ 18 u8 sw_min_ver; /* 0x03 - CPLD Code Minor Version Register */ 19 u8 hw_ver; /* 0x04 - PCBA Version Register */ 20 u8 software_on; /* 0x05 - Override Physical Switch Enable Register */ 21 u8 cfg_rcw_src; /* 0x06 - RCW Source Location Control Register */ 22 u8 res0; /* 0x07 - not used */ 23 u8 vbank; /* 0x08 - Flash Bank Selection Control Register */ 24 u8 sw1_syscl [all...] |
/u-boot/board/ge/common/ |
H A D | vpd_reader.h | 20 int (*process_block)(struct vpd_cache *, u8 id, u8 version, 21 u8 type, size_t size, u8 const *data)); 35 int vpd_reader(size_t size, u8 *data, struct vpd_cache *cache, 36 int (*process_block)(struct vpd_cache *, u8 id, u8 version, u8 type, 37 size_t size, u8 const *data));
|
/u-boot/include/linux/ |
H A D | crc7.h | 5 extern const u8 crc7_syndrome_table[256]; 7 static inline u8 crc7_byte(u8 crc, u8 data) 12 extern u8 crc7(u8 crc, const u8 *buffer, size_t len);
|