#
a0186110 |
|
22-Jul-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
arch: x86: apl: Update FSP parameters Add missing parameters to support full configuration of the latest FSP MR6 release. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
4711c1f5 |
|
27-May-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add hex offsets for registers in FSP-S When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
a9a4b685 |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP structures These are mostly specific to a particular SoC. Add the definitions for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
4711c1f5 |
|
27-May-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add hex offsets for registers in FSP-S When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
a9a4b685 |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP structures These are mostly specific to a particular SoC. Add the definitions for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
a9a4b685 |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP structures These are mostly specific to a particular SoC. Add the definitions for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
a9a4b685 |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP structures These are mostly specific to a particular SoC. Add the definitions for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |