Searched refs:tlb_addr (Results 1 - 16 of 16) sorted by relevance

/u-boot/arch/arm/lib/
H A Dcache.c151 gd->arch.tlb_addr = gd->relocaddr;
152 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
153 gd->arch.tlb_addr + gd->arch.tlb_size);
157 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
160 gd->arch.tlb_allocated = gd->arch.tlb_addr;
169 memset((void *)gd->arch.tlb_addr, 0, gd->arch.tlb_size);
H A Dcache-cp15.c29 u64 *page_table = (u64 *)gd->arch.tlb_addr;
33 u32 *page_table = (u32 *)gd->arch.tlb_addr;
61 u64 *page_table = (u64 *)gd->arch.tlb_addr;
63 u32 *page_table = (u32 *)gd->arch.tlb_addr;
131 u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
132 u64 tpt = gd->arch.tlb_addr + (4096 * i);
152 : "r"(gd->arch.tlb_addr + (4096 * 4)), "r"(0)
164 : "r"(gd->arch.tlb_addr + (4096 * 4)), "r"(0)
181 reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK;
194 : : "r" (gd->arch.tlb_addr)
[all...]
H A Dbdinfo.c44 bdinfo_print_num_l("TLB addr", gd->arch.tlb_addr);
/u-boot/arch/arm/cpu/armv8/
H A Dcache_v8.c146 pte = (u64*)gd->arch.tlb_addr;
230 if (!gd->arch.tlb_addr)
237 __cmo_on_leaves(cmo_fn, gd->arch.tlb_addr, sl, 0);
252 if (gd->arch.tlb_fillptr - gd->arch.tlb_addr > gd->arch.tlb_size)
255 gd->arch.tlb_fillptr - gd->arch.tlb_addr,
354 (u64 *)gd->arch.tlb_addr, attrs);
428 if (!gd->arch.tlb_fillptr || !gd->arch.tlb_addr)
445 u64 tlb_addr = gd->arch.tlb_addr; local
449 gd->arch.tlb_fillptr = tlb_addr;
[all...]
/u-boot/arch/arm/mach-snapdragon/
H A Dboard.c444 u64 tlb_addr = gd->arch.tlb_addr; local
449 gd->arch.tlb_fillptr = tlb_addr;
459 (uintptr_t)gd->arch.tlb_addr;
464 gd->arch.tlb_addr = gd->arch.tlb_fillptr;
466 gd->arch.tlb_emerg = gd->arch.tlb_addr;
467 gd->arch.tlb_addr = tlb_addr;
/u-boot/arch/arm/mach-k3/
H A Dcommon.c239 gd->arch.tlb_addr = gd->relocaddr - gd->arch.tlb_size;
240 gd->arch.tlb_addr &= ~(0x10000 - 1);
241 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
242 gd->arch.tlb_addr + gd->arch.tlb_size);
243 gd->relocaddr = gd->arch.tlb_addr;
/u-boot/arch/arm/mach-stm32mp/stm32mp2/
H A Dcpu.c41 gd->arch.tlb_addr = (unsigned long)&early_tlb;
/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dcpu.c128 * The base address of TTLB is gd->arch.tlb_addr. We use two
154 u32 *level0_table = (u32 *)gd->arch.tlb_addr;
155 u32 *level1_table = (u32 *)(gd->arch.tlb_addr + 0x1000);
217 mmu_page_table_flush(gd->arch.tlb_addr,
218 gd->arch.tlb_addr + gd->arch.tlb_size);
/u-boot/arch/arm/include/asm/
H A Dglobal_data.h54 unsigned long tlb_addr; member in struct:arch_global_data
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dcpu.c446 gd->arch.tlb_addr = CFG_SYS_FSL_OCRAM_BASE;
448 gd->arch.tlb_addr = CFG_SYS_DDR_SDRAM_BASE;
449 gd->arch.tlb_fillptr = gd->arch.tlb_addr;
456 set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
522 u64 tlb_addr_save = gd->arch.tlb_addr;
580 gd->arch.tlb_addr = gd->arch.secure_ram & ~0xfff;
586 tlb_addr_save = gd->arch.tlb_addr;
590 gd->arch.tlb_addr = tlb_addr_save;
602 gd->arch.tlb_addr = gd->arch.tlb_fillptr;
603 gd->arch.tlb_emerg = gd->arch.tlb_addr;
[all...]
/u-boot/arch/arm/mach-versal/
H A Dcpu.c119 gd->arch.tlb_addr = VERSAL_TCM_BASE_ADDR;
/u-boot/arch/arm/mach-zynqmp/
H A Dcpu.c128 gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR;
/u-boot/arch/arm/mach-stm32mp/stm32mp1/
H A Dcpu.c103 gd->arch.tlb_addr = (unsigned long)&early_tlb;
/u-boot/drivers/ddr/altera/
H A Dsdram_soc64.c152 gd->arch.tlb_addr = start_addr + PGTABLE_OFF;
H A Dsdram_arria10.c202 gd->arch.tlb_addr = 0x4000;
/u-boot/board/dhelectronics/dh_imx6/
H A Ddh_imx6_spl.c658 gd->arch.tlb_addr = MMDC0_ARB_BASE_ADDR + SZ_32M;

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