#
3ceaa825 |
|
07-May-2024 |
Sam Day <me@samcday.com> |
mach-snapdragon: do carveouts for qcs404 only The newly introduced carve_out_reserved_memory causes issues when U-Boot is chained from the lk2nd bootloader. lk2nd provides a simple-framebuffer device and marks the framebuffer region as no-map in the supplied /reserved-memory. Consequently, the simple_video driver triggers a page fault when it tries to write to this region. As per Caleb's advice, this simple patch only does the carveouts for the qcs404 SoC for which it was originally designed. The intent is to do the carveouts for more Qualcomm SoCs in future. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
1751d3c4 |
|
03-Apr-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: call regulators_enable_boot_on() Make sure we power on any boot-on or always-on regulators. These are used for peripherals like USB on some platforms. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
06db7f96 |
|
03-Apr-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: fixup USB nodes We don't support USB super-speed in U-Boot yet, we lack the SS PHY drivers, however from my testing even with a PHY driver there seem to be other issues when talking to super-speed peripherals. In pursuit of maintaining upstream DT compatibility, and simplifying porting for new devices, let's implement the DT fixups necessary to configure USB in high-speed only mode at runtime. The pattern is identical for all Qualcomm boards that use the Synaptics DWC3 controller: * Add an additional property on the Qualcomm wrapper node * Remove the super-speed phy phandle and phy-name entries. Acked-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
86eb5d83 |
|
11-Mar-2024 |
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com> |
qcom: board: validate fdt before trying to use it There are cases when previous bootloader stage leaves some seemingly valid value in r0, which in fact does not point to valid FDT blob. This behavior was encountered when trying to boot U-Boot as "hyp" loader on SA8155P-ADP. To be sure that we really got the pointer to a device tree we need to validate it with fdt_check_header() function. Note: This approach is not 100% fool-proof, as get_prev_bl_fdt_addr() theoretically can return a pointer to a region that is not physically mapped and we will get data abort exception when fdt_check_header() will try to access it. But at this early boot stage we don't know where RAM is anyways so there is little we can do. Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
c6f4985a |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: carve out no-map regions On Qualcomm platforms, the TZ may already have certain memory regions under protection by the time U-Boot starts. There is a rare case on some platforms where the prefetcher might speculatively access one of these regions resulting in a board crash (TZ traps and then resets the board). We shouldn't be accessing these regions from within U-Boot anyway, so let's mark them all with PTE_TYPE_FAULT to prevent any speculative access and correctly trap in EL1 rather than EL3. Some lower level FDT functions are used here relying on some assumptions about how Qualcomm devicetrees are laid out (#address/size-cells being 2 for reserved-memory), as this is the only way to make this acceptably fast enough with dcache off. The full fat implementation takes 1800ms on SDM845, the implementation in this patch takes <1. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
2bdc48f7 |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: generate fdtfile automatically With just a few basic rules, we can generate the $fdtfile environment variable to match the format used in Linux. This uses the root compatible property inside u-boot, with specific handling for the Dragonboard845c which is a special case, and for the qrb robotics boards. This is known to work on supported platforms, and lets us avoid having a big lookup table. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
a2364d97 |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: dynamic load addresses Heavily inspired by Apple board code. Use the LMB allocator to configure load addresses at runtime, and implement a lookup table for selecting a devicetree. As some Qualcomm RBx boards have different RAM capacities and base addresses, it isn't possible to hardcode these regions. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
059d526a |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: generalise board support Historically, Qualcomm boards have relied on heavy hardcoding in U-Boot, in many cases to the specific SoC but also to the board itself (e.g. memory map). This has been largely resolved by modernising the Qualcomm drivers in U-Boot, however the board code still largely follows this model. This patch removes the board specific memory maps and duplicated board init code, replacing it with generic init code. The memory map is now built at runtime based on data read from DT, this allows for the memory map to be provided without having to recompile U-Boot. Support is also added for booting with appended DTBs, so that the first-stage bootloader can populate the memory map for us. The sdm845 specific init code is dropped entirely, it set an environment variable depending on if a button was pressed, but this variable wasn't used in U-Boot, and could be written to use the button command instead. The KASLR detection is also dropped as with appended dtb, the kaslr seed can be read directly from the DTB passed to U-Boot. A new qcom_defconfig is added, with the aim of providing a generic U-Boot configuration that will work on as many Qualcomm boards as possible. It replaces the defconfig files for the Dragonboard 845c, Galaxy S9, and QCS404 EVB. For now the db410c and 820c are excluded as they still have some board code left. Similarly, the config headers for db845c, starqltechn, and qcs404-evb are replaced by a single qcom header. The previously db410c-specific board_usb_init() function is made to be generic and is added to mach-snapdragon. While we lack proper modelling for USB configuration, using a well-known named pinctrl state is a reasonably generic middleground, and works using upstream DT. This function will do nothing unless the USB node has a pinctrl state named "device", in which case it will be set when entering USB peripheral mode. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
1751d3c4 |
|
03-Apr-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: call regulators_enable_boot_on() Make sure we power on any boot-on or always-on regulators. These are used for peripherals like USB on some platforms. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
06db7f96 |
|
03-Apr-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: fixup USB nodes We don't support USB super-speed in U-Boot yet, we lack the SS PHY drivers, however from my testing even with a PHY driver there seem to be other issues when talking to super-speed peripherals. In pursuit of maintaining upstream DT compatibility, and simplifying porting for new devices, let's implement the DT fixups necessary to configure USB in high-speed only mode at runtime. The pattern is identical for all Qualcomm boards that use the Synaptics DWC3 controller: * Add an additional property on the Qualcomm wrapper node * Remove the super-speed phy phandle and phy-name entries. Acked-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
86eb5d83 |
|
11-Mar-2024 |
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com> |
qcom: board: validate fdt before trying to use it There are cases when previous bootloader stage leaves some seemingly valid value in r0, which in fact does not point to valid FDT blob. This behavior was encountered when trying to boot U-Boot as "hyp" loader on SA8155P-ADP. To be sure that we really got the pointer to a device tree we need to validate it with fdt_check_header() function. Note: This approach is not 100% fool-proof, as get_prev_bl_fdt_addr() theoretically can return a pointer to a region that is not physically mapped and we will get data abort exception when fdt_check_header() will try to access it. But at this early boot stage we don't know where RAM is anyways so there is little we can do. Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
c6f4985a |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: carve out no-map regions On Qualcomm platforms, the TZ may already have certain memory regions under protection by the time U-Boot starts. There is a rare case on some platforms where the prefetcher might speculatively access one of these regions resulting in a board crash (TZ traps and then resets the board). We shouldn't be accessing these regions from within U-Boot anyway, so let's mark them all with PTE_TYPE_FAULT to prevent any speculative access and correctly trap in EL1 rather than EL3. Some lower level FDT functions are used here relying on some assumptions about how Qualcomm devicetrees are laid out (#address/size-cells being 2 for reserved-memory), as this is the only way to make this acceptably fast enough with dcache off. The full fat implementation takes 1800ms on SDM845, the implementation in this patch takes <1. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
2bdc48f7 |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: generate fdtfile automatically With just a few basic rules, we can generate the $fdtfile environment variable to match the format used in Linux. This uses the root compatible property inside u-boot, with specific handling for the Dragonboard845c which is a special case, and for the qrb robotics boards. This is known to work on supported platforms, and lets us avoid having a big lookup table. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
a2364d97 |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: dynamic load addresses Heavily inspired by Apple board code. Use the LMB allocator to configure load addresses at runtime, and implement a lookup table for selecting a devicetree. As some Qualcomm RBx boards have different RAM capacities and base addresses, it isn't possible to hardcode these regions. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |
#
059d526a |
|
26-Feb-2024 |
Caleb Connolly <caleb.connolly@linaro.org> |
mach-snapdragon: generalise board support Historically, Qualcomm boards have relied on heavy hardcoding in U-Boot, in many cases to the specific SoC but also to the board itself (e.g. memory map). This has been largely resolved by modernising the Qualcomm drivers in U-Boot, however the board code still largely follows this model. This patch removes the board specific memory maps and duplicated board init code, replacing it with generic init code. The memory map is now built at runtime based on data read from DT, this allows for the memory map to be provided without having to recompile U-Boot. Support is also added for booting with appended DTBs, so that the first-stage bootloader can populate the memory map for us. The sdm845 specific init code is dropped entirely, it set an environment variable depending on if a button was pressed, but this variable wasn't used in U-Boot, and could be written to use the button command instead. The KASLR detection is also dropped as with appended dtb, the kaslr seed can be read directly from the DTB passed to U-Boot. A new qcom_defconfig is added, with the aim of providing a generic U-Boot configuration that will work on as many Qualcomm boards as possible. It replaces the defconfig files for the Dragonboard 845c, Galaxy S9, and QCS404 EVB. For now the db410c and 820c are excluded as they still have some board code left. Similarly, the config headers for db845c, starqltechn, and qcs404-evb are replaced by a single qcom header. The previously db410c-specific board_usb_init() function is made to be generic and is added to mach-snapdragon. While we lack proper modelling for USB configuration, using a well-known named pinctrl state is a reasonably generic middleground, and works using upstream DT. This function will do nothing unless the USB node has a pinctrl state named "device", in which case it will be set when entering USB peripheral mode. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> |