/u-boot/drivers/ram/k3-ddrss/ |
H A D | lpddr4_obj_if.h | 17 u32 (*init)(lpddr4_privatedata *pd, const lpddr4_config *cfg); 19 u32 (*start)(const lpddr4_privatedata *pd); 21 u32 (*readreg)(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 *regvalue); 23 u32 (*writereg)(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 regvalue); 25 u32 (*getmmrregister)(const lpddr4_privatedata *pd, u32 readmoderegval, u64 *mmrvalue, u8 *mmrstatus); 27 u32 (*setmmrregister)(const lpddr4_privatedata *pd, u32 writemoderegval, u8 *mrwstatus); 29 u32 (*writectlconfig)(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount); 31 u32 (*writephyconfig)(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount); 33 u32 (*writephyindepconfig)(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount); 35 u32 (*readctlconfig)(const lpddr4_privatedata *pd, u3 [all...] |
H A D | lpddr4_if.h | 72 typedef void (*lpddr4_infocallback)(const lpddr4_privatedata *pd, lpddr4_infotype infotype); 74 typedef void (*lpddr4_ctlcallback)(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt ctlinterrupt, u8 chipselect); 76 typedef void (*lpddr4_phyindepcallback)(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt phyindepinterrupt, u8 chipselect); 80 u32 lpddr4_init(lpddr4_privatedata *pd, const lpddr4_config *cfg); 82 u32 lpddr4_start(const lpddr4_privatedata *pd); 84 u32 lpddr4_readreg(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 *regvalue); 86 u32 lpddr4_writereg(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 regvalue); 88 u32 lpddr4_getmmrregister(const lpddr4_privatedata *pd, u32 readmoderegval, u64 *mmrvalue, u8 *mmrstatus); 90 u32 lpddr4_setmmrregister(const lpddr4_privatedata *pd, u32 writemoderegval, u8 *mrwstatus); 92 u32 lpddr4_writectlconfig(const lpddr4_privatedata *pd, u3 [all...] |
H A D | lpddr4_sanity.h | 20 static inline u32 lpddr4_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_config *cfg); 21 static inline u32 lpddr4_sanityfunction3(const lpddr4_privatedata *pd); 22 static inline u32 lpddr4_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_regblock cpp, const u32 *regvalue); 23 static inline u32 lpddr4_sanityfunction5(const lpddr4_privatedata *pd, const lpddr4_regblock cpp); 24 static inline u32 lpddr4_sanityfunction6(const lpddr4_privatedata *pd, const u64 *mmrvalue, const u8 *mmrstatus); 25 static inline u32 lpddr4_sanityfunction7(const lpddr4_privatedata *pd, const u8 *mrwstatus); 26 static inline u32 lpddr4_sanityfunction14(const lpddr4_privatedata *pd, const u64 *mask); 27 static inline u32 lpddr4_sanityfunction15(const lpddr4_privatedata *pd, const u64 *mask); 28 static inline u32 lpddr4_sanityfunction16(const lpddr4_privatedata *pd, const u32 *mask); 29 static inline u32 lpddr4_sanityfunction18(const lpddr4_privatedata *pd, cons 106 lpddr4_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_config *cfg) argument 120 lpddr4_sanityfunction3(const lpddr4_privatedata *pd) argument 130 lpddr4_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_regblock cpp, const u32 *regvalue) argument 150 lpddr4_sanityfunction5(const lpddr4_privatedata *pd, const lpddr4_regblock cpp) argument 168 lpddr4_sanityfunction6(const lpddr4_privatedata *pd, const u64 *mmrvalue, const u8 *mmrstatus) argument 184 lpddr4_sanityfunction7(const lpddr4_privatedata *pd, const u8 *mrwstatus) argument 198 lpddr4_sanityfunction14(const lpddr4_privatedata *pd, const u64 *mask) argument 212 lpddr4_sanityfunction15(const lpddr4_privatedata *pd, const u64 *mask) argument 226 lpddr4_sanityfunction16(const lpddr4_privatedata *pd, const u32 *mask) argument 240 lpddr4_sanityfunction18(const lpddr4_privatedata *pd, const lpddr4_debuginfo *debuginfo) argument 254 lpddr4_sanityfunction19(const lpddr4_privatedata *pd, const lpddr4_lpiwakeupparam *lpiwakeupparam, const lpddr4_ctlfspnum *fspnum, const u32 *cycles) argument 288 lpddr4_sanityfunction21(const lpddr4_privatedata *pd, const lpddr4_eccenable *eccparam) argument 302 lpddr4_sanityfunction22(const lpddr4_privatedata *pd, const lpddr4_eccenable *eccparam) argument 323 lpddr4_sanityfunction23(const lpddr4_privatedata *pd, const lpddr4_reducmode *mode) argument 337 lpddr4_sanityfunction24(const lpddr4_privatedata *pd, const lpddr4_reducmode *mode) argument 356 lpddr4_sanityfunction25(const lpddr4_privatedata *pd, const bool *on_off) argument 370 lpddr4_sanityfunction27(const lpddr4_privatedata *pd, const lpddr4_dbimode *mode) argument 391 lpddr4_sanityfunction28(const lpddr4_privatedata *pd, const lpddr4_ctlfspnum *fspnum, const u32 *tref_val, const u32 *tras_max_val) argument 415 lpddr4_sanityfunction29(const lpddr4_privatedata *pd, const lpddr4_ctlfspnum *fspnum, const u32 *tref, const u32 *tras_max) argument [all...] |
H A D | lpddr4_j721e.c | 19 u32 lpddr4_enablepiinitiator(const lpddr4_privatedata *pd) argument 24 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 32 u32 lpddr4_getctlinterruptmask(const lpddr4_privatedata *pd, u64 *mask) argument 37 result = lpddr4_getctlinterruptmasksf(pd, mask); 39 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 47 u32 lpddr4_setctlinterruptmask(const lpddr4_privatedata *pd, const u64 *mask) argument 54 result = lpddr4_setctlinterruptmasksf(pd, mask); 61 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 74 u32 lpddr4_checkctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus) argument 80 result = LPDDR4_INTR_CheckCtlIntSF(pd, int 102 lpddr4_ackctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr) argument 165 lpddr4_getdebuginitinfo(const lpddr4_privatedata *pd, lpddr4_debuginfo *debuginfo) argument 185 lpddr4_geteccenable(const lpddr4_privatedata *pd, lpddr4_eccenable *eccparam) argument 213 lpddr4_seteccenable(const lpddr4_privatedata *pd, const lpddr4_eccenable *eccparam) argument 228 lpddr4_getreducmode(const lpddr4_privatedata *pd, lpddr4_reducmode *mode) argument 242 lpddr4_setreducmode(const lpddr4_privatedata *pd, const lpddr4_reducmode *mode) argument 256 lpddr4_checkmmrreaderror(const lpddr4_privatedata *pd, u64 *mmrvalue, u8 *mrrstatus) argument [all...] |
H A D | lpddr4_am6x.c | 77 u32 lpddr4_enablepiinitiator(const lpddr4_privatedata *pd) argument 82 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 92 u32 lpddr4_getctlinterruptmask(const lpddr4_privatedata *pd, u64 *mask) argument 96 result = lpddr4_getctlinterruptmasksf(pd, mask); 98 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 104 u32 lpddr4_setctlinterruptmask(const lpddr4_privatedata *pd, const u64 *mask) argument 111 result = lpddr4_setctlinterruptmasksf(pd, mask); 118 lpddr4_ctlregs *ctlregbase = (lpddr4_ctlregs *)pd->ctlbase; 168 u32 lpddr4_checkctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr, bool *irqstatus) argument 175 result = LPDDR4_INTR_CheckCtlIntSF(pd, int 247 lpddr4_ackctlinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt intr) argument 288 lpddr4_getdebuginitinfo(const lpddr4_privatedata *pd, lpddr4_debuginfo *debuginfo) argument 307 lpddr4_getreducmode(const lpddr4_privatedata *pd, lpddr4_reducmode *mode) argument 322 lpddr4_setreducmode(const lpddr4_privatedata *pd, const lpddr4_reducmode *mode) argument 336 lpddr4_checkmmrreaderror(const lpddr4_privatedata *pd, u64 *mmrvalue, u8 *mrrstatus) argument 377 lpddr4_geteccenable(const lpddr4_privatedata *pd, lpddr4_eccenable *eccparam) argument 389 lpddr4_seteccenable(const lpddr4_privatedata *pd, const lpddr4_eccenable *eccparam) argument [all...] |
H A D | lpddr4.c | 16 static u32 lpddr4_pollphyindepirq(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt irqbit, u32 delay); 17 static u32 lpddr4_pollandackirq(const lpddr4_privatedata *pd); 18 static u32 lpddr4_startsequencecontroller(const lpddr4_privatedata *pd); 19 static u32 lpddr4_writemmrregister(const lpddr4_privatedata *pd, u32 writemoderegval); 43 static void lpddr4_updatefsp2refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max); 44 static void lpddr4_updatefsp1refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max); 45 static void lpddr4_updatefsp0refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max); 48 u32 lpddr4_pollctlirq(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt irqbit, u32 delay) argument 59 result = lpddr4_checkctlinterrupt(pd, irqbit, &irqstatus); 65 static u32 lpddr4_pollphyindepirq(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrup argument 82 lpddr4_pollandackirq(const lpddr4_privatedata *pd) argument 97 lpddr4_startsequencecontroller(const lpddr4_privatedata *pd) argument 138 lpddr4_init(lpddr4_privatedata *pd, const lpddr4_config *cfg) argument 153 lpddr4_start(const lpddr4_privatedata *pd) argument 165 lpddr4_readreg(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 *regvalue) argument 221 lpddr4_deferredregverify(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regvalues[], u16 regnum[], u16 regcount) argument 259 lpddr4_writereg(const lpddr4_privatedata *pd, lpddr4_regblock cpp, u32 regoffset, u32 regvalue) argument 288 lpddr4_getmmrregister(const lpddr4_privatedata *pd, u32 readmoderegval, u64 *mmrvalue, u8 *mmrstatus) argument 308 lpddr4_writemmrregister(const lpddr4_privatedata *pd, u32 writemoderegval) argument 323 lpddr4_setmmrregister(const lpddr4_privatedata *pd, u32 writemoderegval, u8 *mrwstatus) argument 344 lpddr4_writectlconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 361 lpddr4_writephyindepconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 377 lpddr4_writephyconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 393 lpddr4_readctlconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 409 lpddr4_readphyindepconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 425 lpddr4_readphyconfig(const lpddr4_privatedata *pd, u32 regvalues[], u16 regnum[], u16 regcount) argument 441 lpddr4_getphyindepinterruptmask(const lpddr4_privatedata *pd, u32 *mask) argument 453 lpddr4_setphyindepinterruptmask(const lpddr4_privatedata *pd, const u32 *mask) argument 473 lpddr4_checkphyindepinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt intr, bool *irqstatus) argument 488 lpddr4_ackphyindepinterrupt(const lpddr4_privatedata *pd, lpddr4_intr_phyindepinterrupt intr) argument 580 lpddr4_checklvlerrors(const lpddr4_privatedata *pd, lpddr4_debuginfo *debuginfo, bool errfound) argument 761 lpddr4_getlpiwakeuptime(const lpddr4_privatedata *pd, const lpddr4_lpiwakeupparam *lpiwakeupparam, const lpddr4_ctlfspnum *fspnum, u32 *cycles) argument 902 lpddr4_setlpiwakeuptime(const lpddr4_privatedata *pd, const lpddr4_lpiwakeupparam *lpiwakeupparam, const lpddr4_ctlfspnum *fspnum, const u32 *cycles) argument 918 lpddr4_getdbireadmode(const lpddr4_privatedata *pd, bool *on_off) argument 934 lpddr4_getdbiwritemode(const lpddr4_privatedata *pd, bool *on_off) argument 950 lpddr4_setdbimode(const lpddr4_privatedata *pd, const lpddr4_dbimode *mode) argument 973 lpddr4_getrefreshrate(const lpddr4_privatedata *pd, const lpddr4_ctlfspnum *fspnum, u32 *tref, u32 *tras_max) argument 1000 lpddr4_updatefsp2refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max) argument 1011 lpddr4_updatefsp1refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max) argument 1022 lpddr4_updatefsp0refrateparams(const lpddr4_privatedata *pd, const u32 *tref, const u32 *tras_max) argument 1033 lpddr4_setrefreshrate(const lpddr4_privatedata *pd, const lpddr4_ctlfspnum *fspnum, const u32 *tref, const u32 *tras_max) argument 1055 lpddr4_refreshperchipselect(const lpddr4_privatedata *pd, const u32 trefinterval) argument [all...] |
H A D | lpddr4.h | 63 u32 lpddr4_pollctlirq(const lpddr4_privatedata *pd, lpddr4_intr_ctlinterrupt irqbit, u32 delay); 64 bool lpddr4_checklvlerrors(const lpddr4_privatedata *pd, lpddr4_debuginfo *debuginfo, bool errfound); 67 u32 lpddr4_enablepiinitiator(const lpddr4_privatedata *pd); 69 u32 lpddr4_checkmmrreaderror(const lpddr4_privatedata *pd, u64 *mmrvalue, u8 *mrrstatus);
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H A D | lpddr4_am6x_sanity.h | 19 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus); 20 static inline u32 lpddr4_intr_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr); 21 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus); 22 static inline u32 lpddr4_intr_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr); 29 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus) argument 33 if (pd == NULL) { 97 static inline u32 lpddr4_intr_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr) argument 101 if (pd == NULL) { 163 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus) argument 167 if (pd 209 lpddr4_intr_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr) argument [all...] |
H A D | lpddr4_j721e_sanity.h | 16 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus); 17 static inline u32 lpddr4_intr_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr); 18 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus); 19 static inline u32 lpddr4_intr_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr); 26 static inline u32 lpddr4_intr_sanityfunction1(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr, const bool *irqstatus) argument 30 if (pd == NULL) { 88 static inline u32 lpddr4_intr_sanityfunction2(const lpddr4_privatedata *pd, const lpddr4_intr_ctlinterrupt intr) argument 92 if (pd == NULL) { 148 static inline u32 lpddr4_intr_sanityfunction3(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr, const bool *irqstatus) argument 152 if (pd 183 lpddr4_intr_sanityfunction4(const lpddr4_privatedata *pd, const lpddr4_intr_phyindepinterrupt intr) argument [all...] |
H A D | k3-ddrss.c | 146 lpddr4_privatedata pd; member in struct:k3_ddrss_desc 185 static u32 k3_lpddr4_read_ddr_type(const lpddr4_privatedata *pd) argument 191 struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance; 194 status = ddrss->driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); 245 static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd) argument 247 struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance; 265 lpddr4_privatedata *pd = &ddrss->pd; local 267 ddrss->dram_class = k3_lpddr4_read_ddr_type(pd); 290 static void k3_lpddr4_info_handler(const lpddr4_privatedata *pd, argument 435 lpddr4_privatedata *pd = &ddrss->pd; local 499 lpddr4_privatedata *pd = &ddrss->pd; local 526 lpddr4_privatedata *pd = &ddrss->pd; local [all...] |
/u-boot/cmd/ti/ |
H A D | Makefile | 5 obj-$(CONFIG_CMD_PD) += pd.o
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H A D | pd.c | 36 static void dump_lpsc(struct ti_k3_pd_platdata *data, struct ti_pd *pd) argument 48 if (lpsc->pd != pd) 61 struct ti_pd *pd; local 68 pd = &data->pd[i]; 69 if (pd->psc != psc) 71 state = ti_pd_state(pd); 75 pd->id, pd_states[state], pd [all...] |
/u-boot/drivers/power/domain/ |
H A D | ti-power-domain.c | 54 static u32 pd_read(struct ti_pd *pd, u32 reg) argument 56 return psc_read(pd->psc, reg + 4 * pd->id); 59 static void pd_write(u32 val, struct ti_pd *pd, u32 reg) argument 61 psc_write(val, pd->psc, reg + 4 * pd->id); 136 data->pd = pdata->pd; 147 static int ti_pd_wait(struct ti_pd *pd) argument 154 if (pd 169 ti_pd_transition(struct ti_pd *pd) argument 182 ti_pd_state(struct ti_pd *pd) argument 187 ti_pd_get(struct ti_pd *pd) argument 222 ti_pd_put(struct ti_pd *pd) argument 328 ti_power_domain_transition(struct power_domain *pd, u8 state) argument 335 ti_power_domain_on(struct power_domain *pd) argument 342 ti_power_domain_off(struct power_domain *pd) argument 360 ti_power_domain_of_xlate(struct power_domain *pd, struct ofnode_phandle_args *args) argument [all...] |
H A D | ti-sci-power-domain.c | 47 static int ti_sci_power_domain_on(struct power_domain *pd) argument 49 struct ti_sci_power_domain_data *data = dev_get_priv(pd->dev); 52 u8 flags = (uintptr_t)pd->priv; 55 debug("%s(pd=%p)\n", __func__, pd); 58 ret = dops->get_device_exclusive(sci, pd->id); 60 ret = dops->get_device(sci, pd->id); 63 dev_err(pd->dev, "%s: get_device(%lu) failed (%d)\n", 64 __func__, pd->id, ret); 69 static int ti_sci_power_domain_off(struct power_domain *pd) argument 86 ti_sci_power_domain_of_xlate(struct power_domain *pd, struct ofnode_phandle_args *args) argument [all...] |
H A D | sandbox-power-domain-test.c | 14 struct power_domain pd; member in struct:sandbox_power_domain_test 21 return power_domain_get(dev, &sbrt->pd); 28 return power_domain_on(&sbrt->pd); 35 return power_domain_off(&sbrt->pd); 42 return power_domain_free(&sbrt->pd);
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H A D | power-domain-uclass.c | 132 struct power_domain pd; local 138 ret = power_domain_get_by_index(dev, &pd, i); 142 ret = power_domain_on(&pd); 144 ret = power_domain_off(&pd); 154 if (count > 0 && !on && dev_get_parent(dev) == pd.dev && 165 device_remove(pd.dev, DM_REMOVE_NORMAL);
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/u-boot/drivers/clk/sifive/ |
H A D | sifive-prci.c | 46 * @pd: PRCI context 50 * address of the PRCI register target described by @pd, and return 55 * Return: the contents of the register described by @pd and @offs. 57 static u32 __prci_readl(struct __prci_data *pd, u32 offs) argument 59 return readl(pd->va + offs); 62 static void __prci_writel(u32 v, u32 offs, struct __prci_data *pd) argument 64 writel(v, pd->va + offs); 142 * @pd: PRCI context 146 * the PRCI identified by @pd, and store it into the local configuration 150 * @pd an 152 __prci_wrpll_read_cfg0(struct __prci_data *pd, struct __prci_wrpll_data *pwd) argument 172 __prci_wrpll_write_cfg0(struct __prci_data *pd, struct __prci_wrpll_data *pwd, struct wrpll_cfg *c) argument 176 __prci_writel(__prci_wrpll_pack(c), pwd->cfg0_offs, pd); local 188 __prci_wrpll_write_cfg1(struct __prci_data *pd, struct __prci_wrpll_data *pwd, u32 enable) argument 222 struct __prci_data *pd = pc->pd; local 242 struct __prci_data *pd = pc->pd; local 272 struct __prci_data *pd = pc->pd; local 288 struct __prci_data *pd = pc->pd; local 305 sifive_prci_coreclksel_use_final_corepll(struct __prci_data *pd) argument 326 sifive_prci_corepllsel_use_dvfscorepll(struct __prci_data *pd) argument 347 sifive_prci_corepllsel_use_corepll(struct __prci_data *pd) argument 368 sifive_prci_hfpclkpllsel_use_hfclk(struct __prci_data *pd) argument 389 sifive_prci_hfpclkpllsel_use_hfpclkpll(struct __prci_data *pd) argument 440 sifive_prci_ddr_release_reset(struct __prci_data *pd) argument 473 sifive_prci_ethernet_release_reset(struct __prci_data *pd) argument 491 sifive_prci_cltx_release_reset(struct __prci_data *pd) argument 508 sifive_prci_coreclksel_use_hfclk(struct __prci_data *pd) argument 528 sifive_prci_coreclksel_use_corepll(struct __prci_data *pd) argument 651 struct __prci_data *pd = dev_get_priv(dev); local [all...] |
H A D | sifive-prci.h | 241 void (*enable_bypass)(struct __prci_data *pd); 242 void (*disable_bypass)(struct __prci_data *pd); 245 void (*release_reset)(struct __prci_data *pd); 254 * @pd: PRCI-specific data associated with this clock (if not NULL) 264 struct __prci_data *pd; member in struct:__prci_clock 290 void sifive_prci_ethernet_release_reset(struct __prci_data *pd); 291 void sifive_prci_ddr_release_reset(struct __prci_data *pd); 292 void sifive_prci_cltx_release_reset(struct __prci_data *pd); 295 void sifive_prci_coreclksel_use_hfclk(struct __prci_data *pd); 296 void sifive_prci_coreclksel_use_corepll(struct __prci_data *pd); [all...] |
H A D | fu740-prci.c | 26 struct __prci_data *pd = pc->pd; local 32 v = readl(pd->va + pwd->cfg1_offs); 34 writel(v, pd->va + pwd->cfg1_offs);
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/u-boot/arch/arm/mach-snapdragon/ |
H A D | of_fixup.c | 119 struct device_node *pd = NULL, *np = NULL; local 123 /* All Qualcomm platforms name the rpm(h)pd "power-controller" */ 124 for_each_of_allnodes(pd) { 125 if (pd->name && !strcmp("power-controller", pd->name)) 130 if (!of_find_property(pd, "#power-domain-cells", NULL)) { 141 if (val[0] == cpu_to_fdt32(pd->phandle))
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/u-boot/include/ |
H A D | k3-dev.h | 50 struct ti_pd *pd; member in struct:ti_lpsc 64 struct ti_pd *pd; member in struct:ti_k3_pd_platdata 75 #define PSC_LPSC(_id, _psc, _pd, _depend) { .id = _id, .psc = _psc, .pd = _pd, .depend = _depend } 86 u8 ti_pd_state(struct ti_pd *pd);
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/u-boot/fs/yaffs2/ |
H A D | yaffs_qsort.c | 64 char *pa, *pb, *pc, *pd, *pl, *pm, *pn; local 92 pc = pd = (char *)a + (n - 1) * es; 105 yswap(pc, pd); 106 pd -= es; 128 r = min((long)(pd - pc), (long)(pn - pd - es)); 133 r = pd - pc;
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/u-boot/arch/arm/mach-bcm283x/ |
H A D | init.c | 115 static void _rpi_update_mem_map(struct mm_region *pd) argument 120 mem_map[i].virt = pd[i].virt; 121 mem_map[i].phys = pd[i].phys; 122 mem_map[i].size = pd[i].size; 123 mem_map[i].attrs = pd[i].attrs;
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/u-boot/arch/arm/mach-imx/mx5/ |
H A D | clock.c | 41 #define PLL_PD_MAX 16 /* Actual pd+1 */ 63 u32 pd; member in struct:pll_param 550 * t_clk = 2*ref_freq*(mfi + mfn/(mfd+1))/(pd+1) 555 u64 pd, mfi = 1, mfn, mfd, t1; local 583 for (pd = 1; pd <= PLL_PD_MAX; pd++) { 584 t1 = n_target * pd; 594 * Now got pd and mfi already 596 * mfn = (((n_target * pd) / [all...] |
/u-boot/board/congatec/cgtqmx8/ |
H A D | cgtqmx8.c | 167 struct power_domain pd; local 180 if (!imx8_power_domain_lookup_name("conn_sdhc0", &pd)) 181 power_domain_on(&pd); 189 if (!imx8_power_domain_lookup_name("conn_sdhc1", &pd)) 190 power_domain_on(&pd); 200 if (!imx8_power_domain_lookup_name("conn_sdhc2", &pd)) 201 power_domain_on(&pd);
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