/u-boot/board/imgtec/malta/ |
H A D | malta.c | 212 dm_pci_write_config8(dev, PCI_CFG_PIIX4_PIRQRCA, 10); 213 dm_pci_write_config8(dev, PCI_CFG_PIIX4_PIRQRCB, 10); 214 dm_pci_write_config8(dev, PCI_CFG_PIIX4_PIRQRCC, 11); 215 dm_pci_write_config8(dev, PCI_CFG_PIIX4_PIRQRCD, 11); 235 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40);
|
/u-boot/arch/x86/cpu/broadwell/ |
H A D | northbridge.c | 127 dm_pci_write_config8(dev, PAM0, 0x30); 128 dm_pci_write_config8(dev, PAM1, 0x33); 129 dm_pci_write_config8(dev, PAM2, 0x33); 130 dm_pci_write_config8(dev, PAM3, 0x33); 131 dm_pci_write_config8(dev, PAM4, 0x33); 132 dm_pci_write_config8(dev, PAM5, 0x33); 133 dm_pci_write_config8(dev, PAM6, 0x33);
|
H A D | pch.c | 49 dm_pci_write_config8(dev, ACPI_CNTL, ACPI_EN); 51 dm_pci_write_config8(dev, GPIO_CNTL, GPIO_EN); 213 dm_pci_write_config8(dev, 0xa9, 0x46);
|
/u-boot/arch/x86/cpu/ivybridge/ |
H A D | lpc.c | 37 dm_pci_write_config8(pch, ACPI_CNTL, 0x80); 80 dm_pci_write_config8(pch, SERIRQ_CNTL, value); 82 dm_pci_write_config8(pch, SERIRQ_CNTL, value | (1 << 6)); 94 dm_pci_write_config8(pch, PIRQA_ROUT, *ptr++); 95 dm_pci_write_config8(pch, PIRQB_ROUT, *ptr++); 96 dm_pci_write_config8(pch, PIRQC_ROUT, *ptr++); 97 dm_pci_write_config8(pch, PIRQD_ROUT, *ptr++); 99 dm_pci_write_config8(pch, PIRQE_ROUT, *ptr++); 100 dm_pci_write_config8(pch, PIRQF_ROUT, *ptr++); 101 dm_pci_write_config8(pc [all...] |
H A D | northbridge.c | 174 dm_pci_write_config8(dev, PAM0, 0x30); 175 dm_pci_write_config8(dev, PAM1, 0x33); 176 dm_pci_write_config8(dev, PAM2, 0x33); 177 dm_pci_write_config8(dev, PAM3, 0x33); 178 dm_pci_write_config8(dev, PAM4, 0x33); 179 dm_pci_write_config8(dev, PAM5, 0x33); 180 dm_pci_write_config8(dev, PAM6, 0x33); 227 dm_pci_write_config8(dev, 0xf3, reg8);
|
H A D | sata.c | 110 dm_pci_write_config8(dev, 0x09, 0x80); 139 dm_pci_write_config8(dev, 0x09, 0x8f);
|
/u-boot/arch/x86/cpu/intel_common/ |
H A D | lpc.c | 28 dm_pci_write_config8(pch, 0xdc, reg8); 98 dm_pci_write_config8(dev, bios_ctrl, bios_cntl);
|
/u-boot/drivers/pci/ |
H A D | pci_auto.c | 180 dm_pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 182 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x80); 369 dm_pci_write_config8(dev, PCI_PRIMARY_BUS, 371 dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - dev_seq(ctlr)); 372 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff); 425 dm_pci_write_config8(dev, PCI_IO_BASE, 435 dm_pci_write_config8(dev, PCI_IO_BASE, 0xf0 | io_32); 436 dm_pci_write_config8(dev, PCI_IO_LIMIT, 0x0 | io_32); 465 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr)); 508 dm_pci_write_config8(de [all...] |
H A D | pci-uclass.c | 350 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value) function 495 return dm_pci_write_config8(dev, offset, val);
|
/u-boot/drivers/pch/ |
H A D | pch7.c | 36 dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl);
|
/u-boot/arch/x86/cpu/apollolake/ |
H A D | punit.c | 50 dm_pci_write_config8(dev, PCI_INTERRUPT_PIN, 0x2);
|
/u-boot/drivers/sound/ |
H A D | ivybridge_sound.c | 79 dm_pci_write_config8(dev, 0x3c, 0xa); /* unused? */
|
/u-boot/arch/x86/cpu/ |
H A D | irq.c | 117 dm_pci_write_config8(dev->parent, 327 dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80);
|
/u-boot/drivers/net/ |
H A D | dc2114x.c | 479 dm_pci_write_config8(dev, PCI_CFDA_PSM, WAKEUP); 490 dm_pci_write_config8(dev, PCI_CFDA_PSM, SLEEP); 579 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x60);
|
H A D | pcnet.c | 534 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x20);
|
H A D | rtl8139.c | 642 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x20);
|
H A D | eepro100.c | 857 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x20);
|
/u-boot/drivers/i2c/ |
H A D | intel_i2c.c | 259 dm_pci_write_config8(dev, HOSTC, HST_EN);
|
/u-boot/arch/x86/lib/ |
H A D | bios_interrupts.c | 191 dm_pci_write_config8(dev, reg, byte);
|
/u-boot/drivers/bios_emulator/ |
H A D | bios.c | 257 dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
|
/u-boot/drivers/video/ |
H A D | ivybridge_igd.c | 697 dm_pci_write_config8(video_dev, MSAC, reg8);
|
/u-boot/include/ |
H A D | pci.h | 1099 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value);
|