Searched refs:PLLE_MISC (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c679 #define PLLE_MISC 0x0ec macro
704 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
732 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
736 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
738 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
747 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
751 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
763 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c746 #define PLLE_MISC 0x0ec macro
771 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
799 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
803 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
805 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
831 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
835 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
847 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1162 #define PLLE_MISC 0x0ec macro
1198 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
1200 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
1219 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
1224 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);
1235 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c987 #define PLLE_MISC 0x0ec macro
1015 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC);
1022 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC);

Completed in 96 milliseconds