Searched refs:mmio_base (Results 1 - 25 of 41) sorted by relevance

12

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dsata_sil.c303 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; local
304 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode;
463 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; local
471 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);
495 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; local
499 writel(0, mmio_base + sil_port[ap->port_no].sien);
502 tmp = readl(mmio_base + SIL_SYSCFG);
504 writel(tmp, mmio_base + SIL_SYSCFG);
505 readl(mmio_base + SIL_SYSCFG); /* flush */
510 void __iomem *mmio_base local
594 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; local
642 void __iomem *mmio_base; local
[all...]
H A Dpata_pdc2027x.c554 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; local
560 bccrl = readl(mmio_base + PDC_BYTE_COUNT) & 0xffff;
561 bccrh = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0xffff;
565 bccrlv = readl(mmio_base + PDC_BYTE_COUNT) & 0xffff;
566 bccrhv = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0xffff;
597 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; local
616 pll_ctl = readw(mmio_base + PDC_PLL_CTL);
656 writew(pll_ctl, mmio_base + PDC_PLL_CTL);
657 readw(mmio_base + PDC_PLL_CTL); /* flush */
667 pll_ctl = readw(mmio_base
683 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; local
792 void __iomem *mmio_base; local
[all...]
H A Dsata_qstor.c381 u8 __iomem *mmio_base = qs_mmio_base(host); local
384 u32 sff0 = readl(mmio_base + QS_HST_SFF);
385 u32 sff1 = readl(mmio_base + QS_HST_SFF + 4);
495 void __iomem *mmio_base = qs_mmio_base(ap->host); local
496 void __iomem *chan = mmio_base + (ap->port_no * 0x4000);
522 void __iomem *mmio_base = qs_mmio_base(host); local
524 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */
525 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
530 void __iomem *mmio_base = host->iomap[QS_MMIO_BAR]; local
533 writeb(0, mmio_base
568 qs_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) argument
[all...]
H A Dsata_inic162x.c325 void __iomem *mmio_base = host->iomap[MMIO_BAR]; local
329 host_irq_stat = readw(mmio_base + HOST_IRQ_STAT);
601 static int init_controller(void __iomem *mmio_base, u16 hctl) argument
611 writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL);
612 readw(mmio_base + HOST_CTL); /* flush */
616 val = readw(mmio_base + HOST_CTL);
626 void __iomem *port_base = mmio_base + i * PORT_SIZE;
633 writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL);
634 val = readw(mmio_base + HOST_IRQ_MASK);
636 writew(val, mmio_base
646 void __iomem *mmio_base = host->iomap[MMIO_BAR]; local
[all...]
H A Dsata_svw.c404 void __iomem *mmio_base; local
441 mmio_base = host->iomap[5];
448 mmio_base + i * K2_SATA_PORT_OFFSET);
461 writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
462 mmio_base + K2_SATA_SICR1_OFFSET);
465 writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET);
466 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
H A Dpdc_adma.c584 static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) argument
610 void __iomem *mmio_base; local
633 mmio_base = host->iomap[ADMA_MMIO_BAR];
635 rc = adma_set_dma_masks(pdev, mmio_base);
641 ADMA_ATA_REGS(mmio_base, port_no));
H A Dsata_vsc.c380 void __iomem *mmio_base; local
408 mmio_base = host->iomap[VSC_MMIO_BAR];
412 mmio_base + (i + 1) * VSC_SATA_PORT_OFFSET);
H A Dsata_mv.c803 static void mv_dump_all_regs(void __iomem *mmio_base, int port, argument
807 void __iomem *hc_base = mv_hc_base(mmio_base,
829 mv_dump_mem(mmio_base+0xc00, 0x3c);
830 mv_dump_mem(mmio_base+0xd00, 0x34);
831 mv_dump_mem(mmio_base+0xf00, 0x4);
832 mv_dump_mem(mmio_base+0x1d00, 0x6c);
834 hc_base = mv_hc_base(mmio_base, hc);
839 port_base = mv_port_base(mmio_base, p);
2063 printk(KERN_ERR "mmio_base %p ap %p qc %p scsi_cmnd %p &cmnd %p\n",
H A Dsata_promise.c711 void __iomem *mmio_base; local
720 mmio_base = host->iomap[PDC_MMIO_BAR];
723 mask = readl(mmio_base + PDC_INT_SEQMASK);
738 writel(mask, mmio_base + PDC_INT_SEQMASK);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/mtd/nand/
H A Dcs553x_nand.c141 void __iomem *mmio_base = this->IO_ADDR_R; local
144 writeb(ctl, mmio_base + MM_NAND_CTL);
153 void __iomem *mmio_base = this->IO_ADDR_R; local
154 unsigned char foo = readb(mmio_base + MM_NAND_STS);
162 void __iomem *mmio_base = this->IO_ADDR_R; local
164 writeb(0x07, mmio_base + MM_NAND_ECC_CTL);
171 void __iomem *mmio_base = this->IO_ADDR_R; local
173 ecc = readl(mmio_base + MM_NAND_STS);
328 void __iomem *mmio_base; local
334 mmio_base
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/wireless/bcm43xx/
H A Dbcm43xx_pio.h54 u16 mmio_base; member in struct:bcm43xx_pioqueue
91 return bcm43xx_read16(queue->bcm, queue->mmio_base + offset);
98 bcm43xx_write16(queue->bcm, queue->mmio_base + offset, value);
H A Dbcm43xx_dma.h236 u16 mmio_base; member in struct:bcm43xx_dmaring
285 return bcm43xx_read32(ring->bcm, ring->mmio_base + offset);
292 bcm43xx_write32(ring->bcm, ring->mmio_base + offset, value);
324 u16 mmio_base = bcm43xx_dmacontroller_base(dma64, 0); local
329 bcm43xx_write32(bcm, mmio_base + BCM43xx_DMA32_TXCTL, mask);
330 if (bcm43xx_read32(bcm, mmio_base + BCM43xx_DMA32_TXCTL) & mask)
H A Dbcm43xx_pio.c125 switch (queue->mmio_base) {
335 queue->mmio_base = pio_mmio_base;
348 qsize = bcm43xx_read16(bcm, queue->mmio_base + BCM43xx_PIO_TXQBUFSIZE);
519 assert(queue->mmio_base == BCM43xx_MMIO_PIO1_BASE);
556 if (unlikely(len == 0 && queue->mmio_base != BCM43xx_MMIO_PIO4_BASE)) {
561 if (queue->mmio_base == BCM43xx_MMIO_PIO4_BASE)
573 (queue->mmio_base == BCM43xx_MMIO_PIO1_BASE),
577 if (queue->mmio_base == BCM43xx_MMIO_PIO4_BASE) {
H A Dbcm43xx_dma.c274 u16 mmio_base, int dma64)
281 bcm43xx_write32(bcm, mmio_base + offset, 0);
284 value = bcm43xx_read32(bcm, mmio_base + offset);
310 u16 mmio_base, int dma64)
318 value = bcm43xx_read32(bcm, mmio_base + offset);
335 bcm43xx_write32(bcm, mmio_base + offset, 0);
338 value = bcm43xx_read32(bcm, mmio_base + offset);
592 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base, ring->dma64);
599 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base, ring->dma64);
667 ring->mmio_base
273 bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm, u16 mmio_base, int dma64) argument
309 bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm, u16 mmio_base, int dma64) argument
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/
H A Dasiliantfb.c49 #define mmio_base (p->screen_base + 0x400000) macro
52 writeb((num), mmio_base + (ap)); writeb((val), mmio_base + (dp)); \
87 readb(mmio_base + 0x7b4);
220 writeb(0xc7, mmio_base + 0x784); /* set misc output reg */
222 writeb(0x07, mmio_base + 0x784); /* set misc output reg */
317 writeb(regno, mmio_base + 0x790);
319 writeb(red, mmio_base + 0x791);
320 writeb(green, mmio_base + 0x791);
321 writeb(blue, mmio_base
[all...]
H A Dpvr2fb.c84 #define DISP_BASE par->mmio_base
145 unsigned long mmio_base; /* MMIO base */ member in struct:pvr2fb_par
270 fb_writel(type, par->mmio_base + 0x108);
277 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
755 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
757 if (!par->mmio_base) {
792 rev = fb_readl(par->mmio_base + 0x04);
819 if (par->mmio_base)
820 iounmap((void *)par->mmio_base);
883 if (currentpar->mmio_base) {
[all...]
H A Dvt8623fb.c36 char __iomem *mmio_base; member in struct:vt8623fb_info
697 par->mmio_base = pci_iomap(dev, 1, 0);
698 if (! par->mmio_base) {
764 pci_iounmap(dev, par->mmio_base);
796 pci_iounmap(dev, par->mmio_base);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/aty/
H A Dradeonfb.h291 void __iomem *mmio_base; member in struct:radeonfb_info
400 #define INREG8(addr) readb((rinfo->mmio_base)+addr)
401 #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
402 #define INREG16(addr) readw((rinfo->mmio_base)+addr)
403 #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
404 #define INREG(addr) readl((rinfo->mmio_base)+addr)
405 #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/intelfb/
H A Dintelfbhw.h489 #define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr)))
490 #define INREG16(addr) readw((u16 __iomem *)(dinfo->mmio_base + (addr)))
491 #define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr)))
492 #define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \
494 #define OUTREG16(addr, val) writew((val),(u16 __iomem *)(dinfo->mmio_base + \
496 #define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \
H A Dintelfb.h292 u8 __iomem *mmio_base; member in struct:intelfb_info
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ia64/pci/
H A Dpci.c144 u64 mmio_base; local
150 mmio_base = (u64) ioremap(phys_base, 0);
152 if (io_space[i].mmio_base == mmio_base &&
163 io_space[i].mmio_base = mmio_base;
201 base = __pa(io_space[space_nr].mmio_base);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/
H A Dstex.c303 void __iomem *mmio_base; /* iomapped PCI memory space */ member in struct:st_hba
543 writel(hba->req_head, hba->mmio_base + IMR0);
544 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
545 readl(hba->mmio_base + IDBL); /* flush */
785 void __iomem *base = hba->mmio_base;
881 void __iomem *base = hba->mmio_base;
905 void __iomem *base = hba->mmio_base;
1001 base = hba->mmio_base;
1113 writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1114 readl(hba->mmio_base
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/pci/hotplug/
H A Dshpchp_hpc.c616 release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
956 ctrl->mmio_base = pci_resource_start(pdev, 0);
991 ctrl->mmio_base =
1005 if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {
1011 ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
1014 ctrl->mmio_size, ctrl->mmio_base);
1015 release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/sym53c8xx_2/
H A Dsym_glue.h207 unsigned long mmio_base; member in struct:sym_device
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ia64/
H A Dio.h47 unsigned long mmio_base; /* base in MMIO space */ member in struct:io_space
138 return (void *) (space->mmio_base | offset);

Completed in 263 milliseconds

12