1/* drivers/video/pvr2fb.c 2 * 3 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega 4 * Dreamcast. 5 * 6 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org> 7 * Copyright (c) 2001, 2002, 2003, 2004, 2005 Paul Mundt <lethal@linux-sh.org> 8 * 9 * This file is part of the LinuxDC project (linuxdc.sourceforge.net). 10 * 11 */ 12 13/* 14 * This driver is mostly based on the excellent amifb and vfb sources. It uses 15 * an odd scheme for converting hardware values to/from framebuffer values, 16 * here are some hacked-up formulas: 17 * 18 * The Dreamcast has screen offsets from each side of its four borders and 19 * the start offsets of the display window. I used these values to calculate 20 * 'pseudo' values (think of them as placeholders) for the fb video mode, so 21 * that when it came time to convert these values back into their hardware 22 * values, I could just add mode- specific offsets to get the correct mode 23 * settings: 24 * 25 * left_margin = diwstart_h - borderstart_h; 26 * right_margin = borderstop_h - (diwstart_h + xres); 27 * upper_margin = diwstart_v - borderstart_v; 28 * lower_margin = borderstop_v - (diwstart_h + yres); 29 * 30 * hsync_len = borderstart_h + (hsync_total - borderstop_h); 31 * vsync_len = borderstart_v + (vsync_total - borderstop_v); 32 * 33 * Then, when it's time to convert back to hardware settings, the only 34 * constants are the borderstart_* offsets, all other values are derived from 35 * the fb video mode: 36 * 37 * // PAL 38 * borderstart_h = 116; 39 * borderstart_v = 44; 40 * ... 41 * borderstop_h = borderstart_h + hsync_total - hsync_len; 42 * ... 43 * diwstart_v = borderstart_v - upper_margin; 44 * 45 * However, in the current implementation, the borderstart values haven't had 46 * the benefit of being fully researched, so some modes may be broken. 47 */ 48 49#undef DEBUG 50 51#include <linux/module.h> 52#include <linux/kernel.h> 53#include <linux/errno.h> 54#include <linux/string.h> 55#include <linux/mm.h> 56#include <linux/slab.h> 57#include <linux/delay.h> 58#include <linux/interrupt.h> 59#include <linux/fb.h> 60#include <linux/init.h> 61#include <linux/pci.h> 62 63#ifdef CONFIG_SH_DREAMCAST 64#include <asm/machvec.h> 65#include <asm/mach/sysasic.h> 66#endif 67 68#ifdef CONFIG_SH_DMA 69#include <linux/pagemap.h> 70#include <asm/mach/dma.h> 71#include <asm/dma.h> 72#endif 73 74#ifdef CONFIG_SH_STORE_QUEUES 75#include <asm/uaccess.h> 76#include <asm/cpu/sq.h> 77#endif 78 79#ifndef PCI_DEVICE_ID_NEC_NEON250 80# define PCI_DEVICE_ID_NEC_NEON250 0x0067 81#endif 82 83/* 2D video registers */ 84#define DISP_BASE par->mmio_base 85#define DISP_BRDRCOLR (DISP_BASE + 0x40) 86#define DISP_DIWMODE (DISP_BASE + 0x44) 87#define DISP_DIWADDRL (DISP_BASE + 0x50) 88#define DISP_DIWADDRS (DISP_BASE + 0x54) 89#define DISP_DIWSIZE (DISP_BASE + 0x5c) 90#define DISP_SYNCCONF (DISP_BASE + 0xd0) 91#define DISP_BRDRHORZ (DISP_BASE + 0xd4) 92#define DISP_SYNCSIZE (DISP_BASE + 0xd8) 93#define DISP_BRDRVERT (DISP_BASE + 0xdc) 94#define DISP_DIWCONF (DISP_BASE + 0xe8) 95#define DISP_DIWHSTRT (DISP_BASE + 0xec) 96#define DISP_DIWVSTRT (DISP_BASE + 0xf0) 97 98/* Pixel clocks, one for TV output, doubled for VGA output */ 99#define TV_CLK 74239 100#define VGA_CLK 37119 101 102/* This is for 60Hz - the VTOTAL is doubled for interlaced modes */ 103#define PAL_HTOTAL 863 104#define PAL_VTOTAL 312 105#define NTSC_HTOTAL 857 106#define NTSC_VTOTAL 262 107 108/* Supported cable types */ 109enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE }; 110 111/* Supported video output types */ 112enum { VO_PAL, VO_NTSC, VO_VGA }; 113 114/* Supported palette types */ 115enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 }; 116 117struct pvr2_params { unsigned int val; char *name; }; 118static struct pvr2_params cables[] __initdata = { 119 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" }, 120}; 121 122static struct pvr2_params outputs[] __initdata = { 123 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" }, 124}; 125 126/* 127 * This describes the current video mode 128 */ 129 130static struct pvr2fb_par { 131 unsigned int hsync_total; /* Clocks/line */ 132 unsigned int vsync_total; /* Lines/field */ 133 unsigned int borderstart_h; 134 unsigned int borderstop_h; 135 unsigned int borderstart_v; 136 unsigned int borderstop_v; 137 unsigned int diwstart_h; /* Horizontal offset of the display field */ 138 unsigned int diwstart_v; /* Vertical offset of the display field, for 139 interlaced modes, this is the long field */ 140 unsigned long disp_start; /* Address of image within VRAM */ 141 unsigned char is_interlaced; /* Is the display interlaced? */ 142 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */ 143 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */ 144 145 unsigned long mmio_base; /* MMIO base */ 146} *currentpar; 147 148static struct fb_info *fb_info; 149 150static struct fb_fix_screeninfo pvr2_fix __initdata = { 151 .id = "NEC PowerVR2", 152 .type = FB_TYPE_PACKED_PIXELS, 153 .visual = FB_VISUAL_TRUECOLOR, 154 .ypanstep = 1, 155 .ywrapstep = 1, 156 .accel = FB_ACCEL_NONE, 157}; 158 159static struct fb_var_screeninfo pvr2_var __initdata = { 160 .xres = 640, 161 .yres = 480, 162 .xres_virtual = 640, 163 .yres_virtual = 480, 164 .bits_per_pixel =16, 165 .red = { 11, 5, 0 }, 166 .green = { 5, 6, 0 }, 167 .blue = { 0, 5, 0 }, 168 .activate = FB_ACTIVATE_NOW, 169 .height = -1, 170 .width = -1, 171 .vmode = FB_VMODE_NONINTERLACED, 172}; 173 174static int cable_type = CT_VGA; 175static int video_output = VO_VGA; 176 177static int nopan = 0; 178static int nowrap = 1; 179 180/* 181 * We do all updating, blanking, etc. during the vertical retrace period 182 */ 183static unsigned int do_vmode_full = 0; /* Change the video mode */ 184static unsigned int do_vmode_pan = 0; /* Update the video mode */ 185static short do_blank = 0; /* (Un)Blank the screen */ 186 187static unsigned int is_blanked = 0; /* Is the screen blanked? */ 188 189#ifdef CONFIG_SH_STORE_QUEUES 190static unsigned long pvr2fb_map; 191#endif 192 193#ifdef CONFIG_SH_DMA 194static unsigned int shdma = PVR2_CASCADE_CHAN; 195static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS; 196#endif 197 198/* Interface used by the world */ 199 200int pvr2fb_setup(char*); 201 202static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, 203 unsigned int transp, struct fb_info *info); 204static int pvr2fb_blank(int blank, struct fb_info *info); 205static unsigned long get_line_length(int xres_virtual, int bpp); 206static void set_color_bitfields(struct fb_var_screeninfo *var); 207static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); 208static int pvr2fb_set_par(struct fb_info *info); 209static void pvr2_update_display(struct fb_info *info); 210static void pvr2_init_display(struct fb_info *info); 211static void pvr2_do_blank(void); 212static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id); 213static int pvr2_init_cable(void); 214static int pvr2_get_param(const struct pvr2_params *p, const char *s, 215 int val, int size); 216#ifdef CONFIG_SH_DMA 217static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, 218 size_t count, loff_t *ppos); 219#endif 220 221static struct fb_ops pvr2fb_ops = { 222 .owner = THIS_MODULE, 223 .fb_setcolreg = pvr2fb_setcolreg, 224 .fb_blank = pvr2fb_blank, 225 .fb_check_var = pvr2fb_check_var, 226 .fb_set_par = pvr2fb_set_par, 227#ifdef CONFIG_SH_DMA 228 .fb_write = pvr2fb_write, 229#endif 230 .fb_fillrect = cfb_fillrect, 231 .fb_copyarea = cfb_copyarea, 232 .fb_imageblit = cfb_imageblit, 233}; 234 235static struct fb_videomode pvr2_modedb[] __initdata = { 236 /* 237 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with 238 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and 239 * NTSC, so it shouldn't be a problem (I hope). 240 */ 241 242 { 243 /* 640x480 @ 60Hz interlaced (NTSC) */ 244 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26, 245 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP 246 }, { 247 /* 640x240 @ 60Hz (NTSC) */ 248 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22, 249 FB_SYNC_BROADCAST, FB_VMODE_YWRAP 250 }, { 251 /* 640x480 @ 60hz (VGA) */ 252 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26, 253 0, FB_VMODE_YWRAP 254 }, 255}; 256 257#define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb) 258 259#define DEFMODE_NTSC 0 260#define DEFMODE_PAL 0 261#define DEFMODE_VGA 2 262 263static int defmode = DEFMODE_NTSC; 264static char *mode_option __initdata = NULL; 265 266static inline void pvr2fb_set_pal_type(unsigned int type) 267{ 268 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par; 269 270 fb_writel(type, par->mmio_base + 0x108); 271} 272 273static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par, 274 unsigned int regno, 275 unsigned int val) 276{ 277 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); 278} 279 280static int pvr2fb_blank(int blank, struct fb_info *info) 281{ 282 do_blank = blank ? blank : -1; 283 return 0; 284} 285 286static inline unsigned long get_line_length(int xres_virtual, int bpp) 287{ 288 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3); 289} 290 291static void set_color_bitfields(struct fb_var_screeninfo *var) 292{ 293 switch (var->bits_per_pixel) { 294 case 16: /* RGB 565 */ 295 pvr2fb_set_pal_type(PAL_RGB565); 296 var->red.offset = 11; var->red.length = 5; 297 var->green.offset = 5; var->green.length = 6; 298 var->blue.offset = 0; var->blue.length = 5; 299 var->transp.offset = 0; var->transp.length = 0; 300 break; 301 case 24: /* RGB 888 */ 302 var->red.offset = 16; var->red.length = 8; 303 var->green.offset = 8; var->green.length = 8; 304 var->blue.offset = 0; var->blue.length = 8; 305 var->transp.offset = 0; var->transp.length = 0; 306 break; 307 case 32: /* ARGB 8888 */ 308 pvr2fb_set_pal_type(PAL_ARGB8888); 309 var->red.offset = 16; var->red.length = 8; 310 var->green.offset = 8; var->green.length = 8; 311 var->blue.offset = 0; var->blue.length = 8; 312 var->transp.offset = 24; var->transp.length = 8; 313 break; 314 } 315} 316 317static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, 318 unsigned int green, unsigned int blue, 319 unsigned int transp, struct fb_info *info) 320{ 321 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 322 unsigned int tmp; 323 324 if (regno > info->cmap.len) 325 return 1; 326 327 /* 328 * We only support the hardware palette for 16 and 32bpp. It's also 329 * expected that the palette format has been set by the time we get 330 * here, so we don't waste time setting it again. 331 */ 332 switch (info->var.bits_per_pixel) { 333 case 16: /* RGB 565 */ 334 tmp = (red & 0xf800) | 335 ((green & 0xfc00) >> 5) | 336 ((blue & 0xf800) >> 11); 337 338 pvr2fb_set_pal_entry(par, regno, tmp); 339 ((u16*)(info->pseudo_palette))[regno] = tmp; 340 break; 341 case 24: /* RGB 888 */ 342 red >>= 8; green >>= 8; blue >>= 8; 343 ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue; 344 break; 345 case 32: /* ARGB 8888 */ 346 red >>= 8; green >>= 8; blue >>= 8; 347 tmp = (transp << 24) | (red << 16) | (green << 8) | blue; 348 349 pvr2fb_set_pal_entry(par, regno, tmp); 350 ((u32*)(info->pseudo_palette))[regno] = tmp; 351 break; 352 default: 353 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel); 354 return 1; 355 } 356 357 return 0; 358} 359 360static int pvr2fb_set_par(struct fb_info *info) 361{ 362 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 363 struct fb_var_screeninfo *var = &info->var; 364 unsigned long line_length; 365 unsigned int vtotal; 366 367 cable_type = pvr2_init_cable(); 368 if (cable_type == CT_VGA && video_output != VO_VGA) 369 video_output = VO_VGA; 370 371 var->vmode &= FB_VMODE_MASK; 372 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA) 373 par->is_interlaced = 1; 374 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA) 375 par->is_doublescan = 1; 376 377 par->hsync_total = var->left_margin + var->xres + var->right_margin + 378 var->hsync_len; 379 par->vsync_total = var->upper_margin + var->yres + var->lower_margin + 380 var->vsync_len; 381 382 if (var->sync & FB_SYNC_BROADCAST) { 383 vtotal = par->vsync_total; 384 if (par->is_interlaced) 385 vtotal /= 2; 386 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 387 par->borderstart_h = 116; 388 par->borderstart_v = 44; 389 } else { 390 /* NTSC video output */ 391 par->borderstart_h = 126; 392 par->borderstart_v = 18; 393 } 394 } else { 395 /* VGA mode */ 396 par->borderstart_h = 126; 397 par->borderstart_v = 40; 398 } 399 400 /* Calculate the remainding offsets */ 401 par->diwstart_h = par->borderstart_h + var->left_margin; 402 par->diwstart_v = par->borderstart_v + var->upper_margin; 403 par->borderstop_h = par->diwstart_h + var->xres + 404 var->right_margin; 405 par->borderstop_v = par->diwstart_v + var->yres + 406 var->lower_margin; 407 408 if (!par->is_interlaced) 409 par->borderstop_v /= 2; 410 if (info->var.xres < 640) 411 par->is_lowres = 1; 412 413 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 414 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length; 415 info->fix.line_length = line_length; 416 return 0; 417} 418 419static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 420{ 421 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 422 unsigned int vtotal, hsync_total; 423 unsigned long line_length; 424 425 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) { 426 pr_debug("Invalid pixclock value %d\n", var->pixclock); 427 return -EINVAL; 428 } 429 430 if (var->xres < 320) 431 var->xres = 320; 432 if (var->yres < 240) 433 var->yres = 240; 434 if (var->xres_virtual < var->xres) 435 var->xres_virtual = var->xres; 436 if (var->yres_virtual < var->yres) 437 var->yres_virtual = var->yres; 438 439 if (var->bits_per_pixel <= 16) 440 var->bits_per_pixel = 16; 441 else if (var->bits_per_pixel <= 24) 442 var->bits_per_pixel = 24; 443 else if (var->bits_per_pixel <= 32) 444 var->bits_per_pixel = 32; 445 446 set_color_bitfields(var); 447 448 if (var->vmode & FB_VMODE_YWRAP) { 449 if (var->xoffset || var->yoffset < 0 || 450 var->yoffset >= var->yres_virtual) { 451 var->xoffset = var->yoffset = 0; 452 } else { 453 if (var->xoffset > var->xres_virtual - var->xres || 454 var->yoffset > var->yres_virtual - var->yres || 455 var->xoffset < 0 || var->yoffset < 0) 456 var->xoffset = var->yoffset = 0; 457 } 458 } else { 459 var->xoffset = var->yoffset = 0; 460 } 461 462 if (var->yres < 480 && video_output == VO_VGA) 463 var->vmode |= FB_VMODE_DOUBLE; 464 465 if (video_output != VO_VGA) { 466 var->sync |= FB_SYNC_BROADCAST; 467 var->vmode |= FB_VMODE_INTERLACED; 468 } else { 469 var->sync &= ~FB_SYNC_BROADCAST; 470 var->vmode &= ~FB_VMODE_INTERLACED; 471 var->vmode |= pvr2_var.vmode; 472 } 473 474 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) { 475 var->right_margin = par->borderstop_h - 476 (par->diwstart_h + var->xres); 477 var->left_margin = par->diwstart_h - par->borderstart_h; 478 var->hsync_len = par->borderstart_h + 479 (par->hsync_total - par->borderstop_h); 480 481 var->upper_margin = par->diwstart_v - par->borderstart_v; 482 var->lower_margin = par->borderstop_v - 483 (par->diwstart_v + var->yres); 484 var->vsync_len = par->borderstop_v + 485 (par->vsync_total - par->borderstop_v); 486 } 487 488 hsync_total = var->left_margin + var->xres + var->right_margin + 489 var->hsync_len; 490 vtotal = var->upper_margin + var->yres + var->lower_margin + 491 var->vsync_len; 492 493 if (var->sync & FB_SYNC_BROADCAST) { 494 if (var->vmode & FB_VMODE_INTERLACED) 495 vtotal /= 2; 496 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 497 /* PAL video output */ 498 if (hsync_total != PAL_HTOTAL) { 499 pr_debug("invalid hsync total for PAL\n"); 500 return -EINVAL; 501 } 502 } else { 503 /* NTSC video output */ 504 if (hsync_total != NTSC_HTOTAL) { 505 pr_debug("invalid hsync total for NTSC\n"); 506 return -EINVAL; 507 } 508 } 509 } 510 511 /* Check memory sizes */ 512 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 513 if (line_length * var->yres_virtual > info->fix.smem_len) 514 return -ENOMEM; 515 516 return 0; 517} 518 519static void pvr2_update_display(struct fb_info *info) 520{ 521 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 522 struct fb_var_screeninfo *var = &info->var; 523 524 /* Update the start address of the display image */ 525 fb_writel(par->disp_start, DISP_DIWADDRL); 526 fb_writel(par->disp_start + 527 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 528 DISP_DIWADDRS); 529} 530 531/* 532 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't 533 * very stable. It's probably due to the fact that a lot of the 2D video 534 * registers are still undocumented. 535 */ 536 537static void pvr2_init_display(struct fb_info *info) 538{ 539 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 540 struct fb_var_screeninfo *var = &info->var; 541 unsigned int diw_height, diw_width, diw_modulo = 1; 542 unsigned int bytesperpixel = var->bits_per_pixel >> 3; 543 544 /* hsync and vsync totals */ 545 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE); 546 547 /* column height, modulo, row width */ 548 /* since we're "panning" within vram, we need to offset things based 549 * on the offset from the virtual x start to our real gfx. */ 550 if (video_output != VO_VGA && par->is_interlaced) 551 diw_modulo += info->fix.line_length / 4; 552 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres); 553 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4; 554 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width, 555 DISP_DIWSIZE); 556 557 /* display address, long and short fields */ 558 fb_writel(par->disp_start, DISP_DIWADDRL); 559 fb_writel(par->disp_start + 560 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 561 DISP_DIWADDRS); 562 563 /* border horizontal, border vertical, border color */ 564 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ); 565 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT); 566 fb_writel(0, DISP_BRDRCOLR); 567 568 /* display window start position */ 569 fb_writel(par->diwstart_h, DISP_DIWHSTRT); 570 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT); 571 572 /* misc. settings */ 573 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF); 574 575 /* clock doubler (for VGA), scan doubler, display enable */ 576 fb_writel(((video_output == VO_VGA) << 23) | 577 (par->is_doublescan << 1) | 1, DISP_DIWMODE); 578 579 /* bits per pixel */ 580 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE); 581 582 /* video enable, color sync, interlace, 583 * hsync and vsync polarity (currently unused) */ 584 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF); 585} 586 587/* Simulate blanking by making the border cover the entire screen */ 588 589#define BLANK_BIT (1<<3) 590 591static void pvr2_do_blank(void) 592{ 593 struct pvr2fb_par *par = currentpar; 594 unsigned long diwconf; 595 596 diwconf = fb_readl(DISP_DIWCONF); 597 if (do_blank > 0) 598 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF); 599 else 600 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF); 601 602 is_blanked = do_blank > 0 ? do_blank : 0; 603} 604 605static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id) 606{ 607 struct fb_info *info = dev_id; 608 609 if (do_vmode_pan || do_vmode_full) 610 pvr2_update_display(info); 611 if (do_vmode_full) 612 pvr2_init_display(info); 613 if (do_vmode_pan) 614 do_vmode_pan = 0; 615 if (do_vmode_full) 616 do_vmode_full = 0; 617 if (do_blank) { 618 pvr2_do_blank(); 619 do_blank = 0; 620 } 621 return IRQ_HANDLED; 622} 623 624/* 625 * Determine the cable type and initialize the cable output format. Don't do 626 * anything if the cable type has been overidden (via "cable:XX"). 627 */ 628 629#define PCTRA 0xff80002c 630#define PDTRA 0xff800030 631#define VOUTC 0xa0702c00 632 633static int pvr2_init_cable(void) 634{ 635 if (cable_type < 0) { 636 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, 637 PCTRA); 638 cable_type = (fb_readw(PDTRA) >> 8) & 3; 639 } 640 641 /* Now select the output format (either composite or other) */ 642 if (cable_type == CT_COMPOSITE) 643 fb_writel(3 << 8, VOUTC); 644 else 645 fb_writel(0, VOUTC); 646 647 return cable_type; 648} 649 650#ifdef CONFIG_SH_DMA 651static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, 652 size_t count, loff_t *ppos) 653{ 654 unsigned long dst, start, end, len; 655 unsigned int nr_pages; 656 struct page **pages; 657 int ret, i; 658 659 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT; 660 661 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL); 662 if (!pages) 663 return -ENOMEM; 664 665 down_read(¤t->mm->mmap_sem); 666 ret = get_user_pages(current, current->mm, (unsigned long)buf, 667 nr_pages, WRITE, 0, pages, NULL); 668 up_read(¤t->mm->mmap_sem); 669 670 if (ret < nr_pages) { 671 nr_pages = ret; 672 ret = -EINVAL; 673 goto out_unmap; 674 } 675 676 dma_configure_channel(shdma, 0x12c1); 677 678 dst = (unsigned long)fb_info->screen_base + *ppos; 679 start = (unsigned long)page_address(pages[0]); 680 end = (unsigned long)page_address(pages[nr_pages]); 681 len = nr_pages << PAGE_SHIFT; 682 683 /* Half-assed contig check */ 684 if (start + len == end) { 685 /* As we do this in one shot, it's either all or nothing.. */ 686 if ((*ppos + len) > fb_info->fix.smem_len) { 687 ret = -ENOSPC; 688 goto out_unmap; 689 } 690 691 dma_write(shdma, start, 0, len); 692 dma_write(pvr2dma, 0, dst, len); 693 dma_wait_for_completion(pvr2dma); 694 695 goto out; 696 } 697 698 /* Not contiguous, writeout per-page instead.. */ 699 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) { 700 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) { 701 ret = -ENOSPC; 702 goto out_unmap; 703 } 704 705 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0); 706 dma_write_page(pvr2dma, 0, dst); 707 dma_wait_for_completion(pvr2dma); 708 } 709 710out: 711 *ppos += count; 712 ret = count; 713 714out_unmap: 715 for (i = 0; i < nr_pages; i++) 716 page_cache_release(pages[i]); 717 718 kfree(pages); 719 720 return ret; 721} 722#endif /* CONFIG_SH_DMA */ 723 724/** 725 * pvr2fb_common_init 726 * 727 * Common init code for the PVR2 chips. 728 * 729 * This mostly takes care of the common aspects of the fb setup and 730 * registration. It's expected that the board-specific init code has 731 * already setup pvr2_fix with something meaningful at this point. 732 * 733 * Device info reporting is also done here, as well as picking a sane 734 * default from the modedb. For board-specific modelines, simply define 735 * a per-board modedb. 736 * 737 * Also worth noting is that the cable and video output types are likely 738 * always going to be VGA for the PCI-based PVR2 boards, but we leave this 739 * in for flexibility anyways. Who knows, maybe someone has tv-out on a 740 * PCI-based version of these things ;-) 741 */ 742static int __init pvr2fb_common_init(void) 743{ 744 struct pvr2fb_par *par = currentpar; 745 unsigned long modememused, rev; 746 747 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start, 748 pvr2_fix.smem_len); 749 750 if (!fb_info->screen_base) { 751 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n"); 752 goto out_err; 753 } 754 755 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start, 756 pvr2_fix.mmio_len); 757 if (!par->mmio_base) { 758 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); 759 goto out_err; 760 } 761 762 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len); 763 764 pvr2_fix.ypanstep = nopan ? 0 : 1; 765 pvr2_fix.ywrapstep = nowrap ? 0 : 1; 766 767 fb_info->fbops = &pvr2fb_ops; 768 fb_info->fix = pvr2_fix; 769 fb_info->par = currentpar; 770 fb_info->pseudo_palette = (void *)(fb_info->par + 1); 771 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 772 773 if (video_output == VO_VGA) 774 defmode = DEFMODE_VGA; 775 776 if (!mode_option) 777 mode_option = "640x480@60"; 778 779 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb, 780 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16)) 781 fb_info->var = pvr2_var; 782 783 fb_alloc_cmap(&fb_info->cmap, 256, 0); 784 785 if (register_framebuffer(fb_info) < 0) 786 goto out_err; 787 788 modememused = get_line_length(fb_info->var.xres_virtual, 789 fb_info->var.bits_per_pixel); 790 modememused *= fb_info->var.yres_virtual; 791 792 rev = fb_readl(par->mmio_base + 0x04); 793 794 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", 795 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, 796 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10)); 797 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", 798 fb_info->node, fb_info->var.xres, fb_info->var.yres, 799 fb_info->var.bits_per_pixel, 800 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), 801 (char *)pvr2_get_param(cables, NULL, cable_type, 3), 802 (char *)pvr2_get_param(outputs, NULL, video_output, 3)); 803 804#ifdef CONFIG_SH_STORE_QUEUES 805 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node); 806 807 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, 808 fb_info->fix.id, pgprot_val(PAGE_SHARED)); 809 810 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n", 811 fb_info->node, pvr2fb_map); 812#endif 813 814 return 0; 815 816out_err: 817 if (fb_info->screen_base) 818 iounmap(fb_info->screen_base); 819 if (par->mmio_base) 820 iounmap((void *)par->mmio_base); 821 822 return -ENXIO; 823} 824 825#ifdef CONFIG_SH_DREAMCAST 826static int __init pvr2fb_dc_init(void) 827{ 828 if (!mach_is_dreamcast()) 829 return -ENXIO; 830 831 /* Make a guess at the monitor based on the attached cable */ 832 if (pvr2_init_cable() == CT_VGA) { 833 fb_info->monspecs.hfmin = 30000; 834 fb_info->monspecs.hfmax = 70000; 835 fb_info->monspecs.vfmin = 60; 836 fb_info->monspecs.vfmax = 60; 837 } else { 838 /* Not VGA, using a TV (taken from acornfb) */ 839 fb_info->monspecs.hfmin = 15469; 840 fb_info->monspecs.hfmax = 15781; 841 fb_info->monspecs.vfmin = 49; 842 fb_info->monspecs.vfmax = 51; 843 } 844 845 if (video_output < 0) { 846 if (cable_type == CT_VGA) { 847 video_output = VO_VGA; 848 } else { 849 video_output = VO_NTSC; 850 } 851 } 852 853 /* 854 * Nothing exciting about the DC PVR2 .. only a measly 8MiB. 855 */ 856 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */ 857 pvr2_fix.smem_len = 8 << 20; 858 859 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */ 860 pvr2_fix.mmio_len = 0x2000; 861 862 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0, 863 "pvr2 VBL handler", fb_info)) { 864 return -EBUSY; 865 } 866 867#ifdef CONFIG_SH_DMA 868 if (request_dma(pvr2dma, "pvr2") != 0) { 869 free_irq(HW_EVENT_VSYNC, 0); 870 return -EBUSY; 871 } 872#endif 873 874 return pvr2fb_common_init(); 875} 876 877static void pvr2fb_dc_exit(void) 878{ 879 if (fb_info->screen_base) { 880 iounmap(fb_info->screen_base); 881 fb_info->screen_base = NULL; 882 } 883 if (currentpar->mmio_base) { 884 iounmap((void *)currentpar->mmio_base); 885 currentpar->mmio_base = 0; 886 } 887 888 free_irq(HW_EVENT_VSYNC, 0); 889#ifdef CONFIG_SH_DMA 890 free_dma(pvr2dma); 891#endif 892} 893#endif /* CONFIG_SH_DREAMCAST */ 894 895#ifdef CONFIG_PCI 896static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev, 897 const struct pci_device_id *ent) 898{ 899 int ret; 900 901 ret = pci_enable_device(pdev); 902 if (ret) { 903 printk(KERN_ERR "pvr2fb: PCI enable failed\n"); 904 return ret; 905 } 906 907 ret = pci_request_regions(pdev, "pvr2fb"); 908 if (ret) { 909 printk(KERN_ERR "pvr2fb: PCI request regions failed\n"); 910 return ret; 911 } 912 913 /* 914 * Slightly more exciting than the DC PVR2 .. 16MiB! 915 */ 916 pvr2_fix.smem_start = pci_resource_start(pdev, 0); 917 pvr2_fix.smem_len = pci_resource_len(pdev, 0); 918 919 pvr2_fix.mmio_start = pci_resource_start(pdev, 1); 920 pvr2_fix.mmio_len = pci_resource_len(pdev, 1); 921 922 fb_info->device = &pdev->dev; 923 924 return pvr2fb_common_init(); 925} 926 927static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev) 928{ 929 if (fb_info->screen_base) { 930 iounmap(fb_info->screen_base); 931 fb_info->screen_base = NULL; 932 } 933 if (currentpar->mmio_base) { 934 iounmap((void *)currentpar->mmio_base); 935 currentpar->mmio_base = 0; 936 } 937 938 pci_release_regions(pdev); 939} 940 941static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = { 942 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250, 943 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 944 { 0, }, 945}; 946 947MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl); 948 949static struct pci_driver pvr2fb_pci_driver = { 950 .name = "pvr2fb", 951 .id_table = pvr2fb_pci_tbl, 952 .probe = pvr2fb_pci_probe, 953 .remove = __devexit_p(pvr2fb_pci_remove), 954}; 955 956static int __init pvr2fb_pci_init(void) 957{ 958 return pci_register_driver(&pvr2fb_pci_driver); 959} 960 961static void pvr2fb_pci_exit(void) 962{ 963 pci_unregister_driver(&pvr2fb_pci_driver); 964} 965#endif /* CONFIG_PCI */ 966 967static int __init pvr2_get_param(const struct pvr2_params *p, const char *s, 968 int val, int size) 969{ 970 int i; 971 972 for (i = 0 ; i < size ; i++ ) { 973 if (s != NULL) { 974 if (!strnicmp(p[i].name, s, strlen(s))) 975 return p[i].val; 976 } else { 977 if (p[i].val == val) 978 return (int)p[i].name; 979 } 980 } 981 return -1; 982} 983 984/* 985 * Parse command arguments. Supported arguments are: 986 * inverse Use inverse color maps 987 * cable:composite|rgb|vga Override the video cable type 988 * output:NTSC|PAL|VGA Override the video output format 989 * 990 * <xres>x<yres>[-<bpp>][@<refresh>] or, 991 * <name>[-<bpp>][@<refresh>] Startup using this video mode 992 */ 993 994#ifndef MODULE 995int __init pvr2fb_setup(char *options) 996{ 997 char *this_opt; 998 char cable_arg[80]; 999 char output_arg[80]; 1000 1001 if (!options || !*options) 1002 return 0; 1003 1004 while ((this_opt = strsep(&options, ","))) { 1005 if (!*this_opt) 1006 continue; 1007 if (!strcmp(this_opt, "inverse")) { 1008 fb_invert_cmaps(); 1009 } else if (!strncmp(this_opt, "cable:", 6)) { 1010 strcpy(cable_arg, this_opt + 6); 1011 } else if (!strncmp(this_opt, "output:", 7)) { 1012 strcpy(output_arg, this_opt + 7); 1013 } else if (!strncmp(this_opt, "nopan", 5)) { 1014 nopan = 1; 1015 } else if (!strncmp(this_opt, "nowrap", 6)) { 1016 nowrap = 1; 1017 } else { 1018 mode_option = this_opt; 1019 } 1020 } 1021 1022 if (*cable_arg) 1023 cable_type = pvr2_get_param(cables, cable_arg, 0, 3); 1024 if (*output_arg) 1025 video_output = pvr2_get_param(outputs, output_arg, 0, 3); 1026 1027 return 0; 1028} 1029#endif 1030 1031static struct pvr2_board { 1032 int (*init)(void); 1033 void (*exit)(void); 1034 char name[16]; 1035} board_list[] = { 1036#ifdef CONFIG_SH_DREAMCAST 1037 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" }, 1038#endif 1039#ifdef CONFIG_PCI 1040 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" }, 1041#endif 1042 { 0, }, 1043}; 1044 1045int __init pvr2fb_init(void) 1046{ 1047 int i, ret = -ENODEV; 1048 int size; 1049 1050#ifndef MODULE 1051 char *option = NULL; 1052 1053 if (fb_get_options("pvr2fb", &option)) 1054 return -ENODEV; 1055 pvr2fb_setup(option); 1056#endif 1057 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32); 1058 1059 fb_info = kmalloc(size, GFP_KERNEL); 1060 if (!fb_info) { 1061 printk(KERN_ERR "Failed to allocate memory for fb_info\n"); 1062 return -ENOMEM; 1063 } 1064 1065 memset(fb_info, 0, size); 1066 1067 currentpar = (struct pvr2fb_par *)(fb_info + 1); 1068 1069 for (i = 0; i < ARRAY_SIZE(board_list); i++) { 1070 struct pvr2_board *pvr_board = board_list + i; 1071 1072 if (!pvr_board->init) 1073 continue; 1074 1075 ret = pvr_board->init(); 1076 1077 if (ret != 0) { 1078 printk(KERN_ERR "pvr2fb: Failed init of %s device\n", 1079 pvr_board->name); 1080 kfree(fb_info); 1081 break; 1082 } 1083 } 1084 1085 return ret; 1086} 1087 1088static void __exit pvr2fb_exit(void) 1089{ 1090 int i; 1091 1092 for (i = 0; i < ARRAY_SIZE(board_list); i++) { 1093 struct pvr2_board *pvr_board = board_list + i; 1094 1095 if (pvr_board->exit) 1096 pvr_board->exit(); 1097 } 1098 1099#ifdef CONFIG_SH_STORE_QUEUES 1100 sq_unmap(pvr2fb_map); 1101#endif 1102 1103 unregister_framebuffer(fb_info); 1104 kfree(fb_info); 1105} 1106 1107module_init(pvr2fb_init); 1108module_exit(pvr2fb_exit); 1109 1110MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>"); 1111MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards"); 1112MODULE_LICENSE("GPL"); 1113