1/*
2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
4 *
5 * Copyright (C) 1999-2001  Gerard Roudier <groudier@free.fr>
6 *
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000  Gerard Roudier
9 *
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
12 *
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 *         Wolfgang Stanglmeier        <wolf@cologne.de>
15 *         Stefan Esser                <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994  Wolfgang Stanglmeier
17 *
18 * Other major contributions:
19 *
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
22 *
23 *-----------------------------------------------------------------------------
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
38 */
39
40#ifndef SYM_GLUE_H
41#define SYM_GLUE_H
42
43#include <linux/delay.h>
44#include <linux/ioport.h>
45#include <linux/pci.h>
46#include <linux/string.h>
47#include <linux/timer.h>
48#include <linux/types.h>
49
50#include <asm/io.h>
51#ifdef __sparc__
52#  include <asm/irq.h>
53#endif
54
55#include <scsi/scsi.h>
56#include <scsi/scsi_cmnd.h>
57#include <scsi/scsi_device.h>
58#include <scsi/scsi_transport_spi.h>
59#include <scsi/scsi_host.h>
60
61#include "sym53c8xx.h"
62#include "sym_defs.h"
63#include "sym_misc.h"
64
65/*
66 * Configuration addendum for Linux.
67 */
68#define	SYM_CONF_TIMER_INTERVAL		((HZ+1)/2)
69
70#undef SYM_OPT_HANDLE_DEVICE_QUEUEING
71#define SYM_OPT_LIMIT_COMMAND_REORDERING
72
73/*
74 *  Print a message with severity.
75 */
76#define printf_emerg(args...)	printk(KERN_EMERG args)
77#define	printf_alert(args...)	printk(KERN_ALERT args)
78#define	printf_crit(args...)	printk(KERN_CRIT args)
79#define	printf_err(args...)	printk(KERN_ERR	args)
80#define	printf_warning(args...)	printk(KERN_WARNING args)
81#define	printf_notice(args...)	printk(KERN_NOTICE args)
82#define	printf_info(args...)	printk(KERN_INFO args)
83#define	printf_debug(args...)	printk(KERN_DEBUG args)
84#define	printf(args...)		printk(args)
85
86/*
87 *  A 'read barrier' flushes any data that have been prefetched
88 *  by the processor due to out of order execution. Such a barrier
89 *  must notably be inserted prior to looking at data that have
90 *  been DMAed, assuming that program does memory READs in proper
91 *  order and that the device ensured proper ordering of WRITEs.
92 *
93 *  A 'write barrier' prevents any previous WRITEs to pass further
94 *  WRITEs. Such barriers must be inserted each time another agent
95 *  relies on ordering of WRITEs.
96 *
97 *  Note that, due to posting of PCI memory writes, we also must
98 *  insert dummy PCI read transactions when some ordering involving
99 *  both directions over the PCI does matter. PCI transactions are
100 *  fully ordered in each direction.
101 */
102
103#define MEMORY_READ_BARRIER()	rmb()
104#define MEMORY_WRITE_BARRIER()	wmb()
105
106/*
107 *  IO functions definition for big/little endian CPU support.
108 *  For now, PCI chips are only supported in little endian addressing mode,
109 */
110
111#ifdef	__BIG_ENDIAN
112
113#define	readw_l2b	readw
114#define	readl_l2b	readl
115#define	writew_b2l	writew
116#define	writel_b2l	writel
117
118#else	/* little endian */
119
120#define	readw_raw	readw
121#define	readl_raw	readl
122#define	writew_raw	writew
123#define	writel_raw	writel
124
125#endif /* endian */
126
127#ifdef	SYM_CONF_CHIP_BIG_ENDIAN
128#error	"Chips in BIG ENDIAN addressing mode are not (yet) supported"
129#endif
130
131/*
132 *  If the CPU and the chip use same endian-ness addressing,
133 *  no byte reordering is needed for script patching.
134 *  Macro cpu_to_scr() is to be used for script patching.
135 *  Macro scr_to_cpu() is to be used for getting a DWORD
136 *  from the script.
137 */
138
139#define cpu_to_scr(dw)	cpu_to_le32(dw)
140#define scr_to_cpu(dw)	le32_to_cpu(dw)
141
142/*
143 *  These ones are used as return code from
144 *  error recovery handlers under Linux.
145 */
146#define SCSI_SUCCESS	SUCCESS
147#define SCSI_FAILED	FAILED
148
149/*
150 *  System specific target data structure.
151 *  None for now, under Linux.
152 */
153/* #define SYM_HAVE_STCB */
154
155/*
156 *  System specific lun data structure.
157 */
158#define SYM_HAVE_SLCB
159struct sym_slcb {
160	u_short	reqtags;	/* Number of tags requested by user */
161	u_short scdev_depth;	/* Queue depth set in select_queue_depth() */
162};
163
164/*
165 *  System specific command data structure.
166 *  Not needed under Linux.
167 */
168/* struct sym_sccb */
169
170/*
171 *  System specific host data structure.
172 */
173struct sym_shcb {
174	/*
175	 *  Chip and controller indentification.
176	 */
177	int		unit;
178	char		inst_name[16];
179	char		chip_name[8];
180	struct pci_dev	*device;
181
182	struct Scsi_Host *host;
183
184	void __iomem *	ioaddr;		/* MMIO kernel io address	*/
185	void __iomem *	ramaddr;	/* RAM  kernel io address	*/
186	u_short		io_ws;		/* IO window size		*/
187	int		irq;		/* IRQ number			*/
188
189	struct timer_list timer;	/* Timer handler link header	*/
190	u_long		lasttime;
191	u_long		settle_time;	/* Resetting the SCSI BUS	*/
192	u_char		settle_time_valid;
193};
194
195/*
196 *  Return the name of the controller.
197 */
198#define sym_name(np) (np)->s.inst_name
199
200struct sym_nvram;
201
202/*
203 * The IO macros require a struct called 's' and are abused in sym_nvram.c
204 */
205struct sym_device {
206	struct pci_dev *pdev;
207	unsigned long mmio_base;
208	unsigned long ram_base;
209	struct {
210		void __iomem *ioaddr;
211		void __iomem *ramaddr;
212	} s;
213	struct sym_chip chip;
214	struct sym_nvram *nvram;
215	u_short device_id;
216	u_char host_id;
217};
218
219/*
220 *  Driver host data structure.
221 */
222struct host_data {
223	struct sym_hcb *ncb;
224};
225
226static inline struct sym_hcb * sym_get_hcb(struct Scsi_Host *host)
227{
228	return ((struct host_data *)host->hostdata)->ncb;
229}
230
231#include "sym_fw.h"
232#include "sym_hipd.h"
233
234/*
235 *  Set the status field of a CAM CCB.
236 */
237static __inline void
238sym_set_cam_status(struct scsi_cmnd *cmd, int status)
239{
240	cmd->result &= ~(0xff  << 16);
241	cmd->result |= (status << 16);
242}
243
244/*
245 *  Get the status field of a CAM CCB.
246 */
247static __inline int
248sym_get_cam_status(struct scsi_cmnd *cmd)
249{
250	return host_byte(cmd->result);
251}
252
253/*
254 *  Build CAM result for a successful IO and for a failed IO.
255 */
256static __inline void sym_set_cam_result_ok(struct sym_ccb *cp, struct scsi_cmnd *cmd, int resid)
257{
258	cmd->resid = resid;
259	cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f));
260}
261void sym_set_cam_result_error(struct sym_hcb *np, struct sym_ccb *cp, int resid);
262
263void sym_xpt_done(struct sym_hcb *np, struct scsi_cmnd *ccb);
264#define sym_print_addr(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
265void sym_xpt_async_bus_reset(struct sym_hcb *np);
266void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target);
267int  sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
268void sym_log_bus_error(struct sym_hcb *np);
269
270#endif /* SYM_GLUE_H */
271