Searched refs:Sched (Results 1 - 15 of 15) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/
H A DScheduleDAG.h287 Sched::Preference SchedulingPref; // Scheduling preference.
311 SchedulingPref(Sched::None),
325 SchedulingPref(Sched::None),
338 SchedulingPref(Sched::None),
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/
H A DTargetLowering.h59 namespace Sched { namespace in namespace:llvm
209 Sched::Preference getSchedulingPreference() const {
216 virtual Sched::Preference getSchedulingPreference(SDNode *) const {
217 return Sched::None;
1017 void setSchedulingPreference(Sched::Preference Pref) {
1854 Sched::Preference SchedPreferenceInfo;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DARMISelLowering.h372 Sched::Preference getSchedulingPreference(SDNode *N) const;
H A DARMISelLowering.cpp811 setSchedulingPreference(Sched::RegPressure);
813 setSchedulingPreference(Sched::Hybrid);
1052 Sched::Preference ARMTargetLowering::getSchedulingPreference(SDNode *N) const {
1055 return Sched::RegPressure;
1062 return Sched::ILP;
1066 return Sched::RegPressure;
1074 return Sched::RegPressure;
1077 return Sched::ILP;
1079 return Sched::RegPressure;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCISelLowering.h288 Sched::Preference getSchedulingPreference(SDNode *N) const;
H A DPPCISelLowering.cpp449 setSchedulingPreference(Sched::Hybrid);
6067 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {
6071 return Sched::ILP;
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp221 TLI.getSchedulingPreference() == Sched::Source)
223 if (TLI.getSchedulingPreference() == Sched::RegPressure)
225 if (TLI.getSchedulingPreference() == Sched::Hybrid)
227 if (TLI.getSchedulingPreference() == Sched::VLIW)
229 assert(TLI.getSchedulingPreference() == Sched::ILP &&
H A DScheduleDAGRRList.cpp2320 bool LStall = (!checkPref || left->SchedulingPref == Sched::ILP) &&
2322 bool RStall = (!checkPref || right->SchedulingPref == Sched::ILP) &&
2338 if (!checkPref || (left->SchedulingPref == Sched::ILP ||
2339 right->SchedulingPref == Sched::ILP)) {
H A DScheduleDAGSDNodes.cpp83 SU->SchedulingPref = Sched::None;
H A DTargetLowering.cpp611 SchedPreferenceInfo = Sched::ILP;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp78 setSchedulingPreference(Sched::RegPressure);
80 setSchedulingPreference(Sched::Source);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1424 setSchedulingPreference(Sched::VLIW);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/
H A DXCoreISelLowering.cpp79 setSchedulingPreference(Sched::RegPressure);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelLowering.cpp479 setSchedulingPreference(Sched::RegPressure);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86ISelLowering.cpp178 setSchedulingPreference(Sched::ILP);
180 setSchedulingPreference(Sched::ILP);
182 setSchedulingPreference(Sched::RegPressure);

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