| /macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Utils/ |
| H A D | LowerExpectIntrinsic.cpp | 69 Value *ArgValue = CI->getArgOperand(0);
87 SI->setCondition(ArgValue);
113 Value *ArgValue = CI->getArgOperand(0);
130 CmpI->setOperand(0, ArgValue);
|
| /macosx-10.9.5/tcl-102/tcl_ext/tcllib/tcllib/modules/tepam/ |
| H A D | tepam.tcl | 1467 foreach {ArgName ArgValue} $args {
1469 -window {set Wtop $ArgValue}
1470 -parent {set WParent $ArgValue}
1471 -context {set Context $ArgValue}
1472 -title {set Title $ArgValue}
1495 foreach {ArgName ArgValue} $args {
1513 if {[llength $ArgValue]%2!=0} {
1516 array set Option $ArgValue
1531 if {$ArgValue!=""} {
1659 foreach {ArgName ArgValue}
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/ |
| H A D | MBlazeISelLowering.cpp | 917 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); local
930 ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue,
932 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
935 InVals.push_back(ArgValue);
983 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, LiveReg, MVT::i32); local
988 OutChains.push_back(DAG.getStore(Chain, dl, ArgValue, PtrOff,
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 340 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); local
346 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue,
349 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue,
353 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
355 InVals.push_back(ArgValue);
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3321 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); local
3333 ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue,
3335 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, ValVT, ArgValue);
3341 ArgValue = DAG.getNode(ISD::BITCAST, dl, ValVT, ArgValue);
3347 std::swap(ArgValue, ArgValue2);
3348 ArgValue = DAG.getNode(MipsISD::BuildPairF64, dl, MVT::f64,
3349 ArgValue, ArgValue
3415 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2491 SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); local
2508 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2);
2620 SDValue ArgValue; local
2649 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
2650 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64,
2651 ArgValue, ArgValue1, DAG.getIntPtrConstant(0));
2652 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64,
2653 ArgValue, ArgValue2, DAG.getIntPtrConstant(1));
2655 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl);
2675 ArgValue
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1888 SDValue ArgValue; local
1919 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
1925 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue,
1928 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue,
1931 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
1936 ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(),
1937 ArgValue);
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 1816 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, ValVT); local
1818 InVals.push_back(ArgValue);
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 6800 SDValue ArgValue = getCopyFromParts(DAG, dl, &InVals[0], 1, local
6808 SRetReg, ArgValue);
|