/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 244 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) 245 if (Op0->getOpcode() == OpcodeToExpand) { 247 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; 304 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); 308 if (Op0 && Op0->getOpcode() == Opcode) { 309 Value *A = Op0->getOperand(0); 310 Value *B = Op0->getOperand(1); 350 if (Op0 601 foldOrCommuteConstant(Instruction::BinaryOps Opcode, Value *&Op0, Value *&Op1, const SimplifyQuery &Q) argument 617 SimplifyAddInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, const SimplifyQuery &Q, unsigned MaxRecurse) argument 681 SimplifyAddInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW, const SimplifyQuery &Query) argument 736 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const SimplifyQuery &Q, unsigned MaxRecurse) argument 864 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const SimplifyQuery &Q) argument 871 SimplifyMulInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 925 SimplifyMulInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 931 simplifyDivRem(Value *Op0, Value *Op1, bool IsDiv) argument 1049 simplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1107 simplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1151 SimplifySDivInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1160 SimplifySDivInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 1166 SimplifyUDivInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1171 SimplifyUDivInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 1177 SimplifySRemInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1192 SimplifySRemInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 1198 SimplifyURemInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1203 SimplifyURemInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 1237 SimplifyShift(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1287 SimplifyRightShift(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, bool isExact, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1314 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1339 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const SimplifyQuery &Q) argument 1346 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1377 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const SimplifyQuery &Q) argument 1384 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const SimplifyQuery &Q, unsigned MaxRecurse) argument 1408 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const SimplifyQuery &Q) argument 1525 simplifyAndOfICmpsWithSameOperands(ICmpInst *Op0, ICmpInst *Op1) argument 1550 simplifyOrOfICmpsWithSameOperands(ICmpInst *Op0, ICmpInst *Op1) argument 1651 simplifyAndOfICmpsWithAdd(ICmpInst *Op0, ICmpInst *Op1, const InstrInfoQuery &IIQ) argument 1756 simplifyAndOfICmps(ICmpInst *Op0, ICmpInst *Op1, const SimplifyQuery &Q) argument 1785 simplifyOrOfICmpsWithAdd(ICmpInst *Op0, ICmpInst *Op1, const InstrInfoQuery &IIQ) argument 1832 simplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1, const SimplifyQuery &Q) argument 1899 simplifyAndOrOfCmps(const SimplifyQuery &Q, Value *Op0, Value *Op1, bool IsAnd) argument 1965 omitCheckForZeroBeforeMulWithOverflow(Value *Op0, Value *Op1) argument 1988 omitCheckForZeroBeforeInvertedMulWithOverflow(Value *Op0, Value *NotOp1) argument 2008 SimplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 2158 SimplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 2164 SimplifyOrInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 2302 SimplifyOrInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 2308 SimplifyXorInst(Value *Op0, Value *Op1, const SimplifyQuery &Q, unsigned MaxRecurse) argument 2347 SimplifyXorInst(Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 4501 foldIdentityShuffles(int DestElt, Value *Op0, Value *Op1, int MaskVal, Value *RootVec, unsigned MaxRecurse) argument 4549 SimplifyShuffleVectorInst(Value *Op0, Value *Op1, ArrayRef<int> Mask, Type *RetTy, const SimplifyQuery &Q, unsigned MaxRecurse) argument 4664 SimplifyShuffleVectorInst(Value *Op0, Value *Op1, ArrayRef<int> Mask, Type *RetTy, const SimplifyQuery &Q) argument 4733 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned MaxRecurse) argument 4780 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned MaxRecurse) argument 4825 SimplifyFMAFMul(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned MaxRecurse) argument 4859 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned MaxRecurse) argument 4868 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 4874 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 4879 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 4884 SimplifyFMAFMul(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 4889 SimplifyFDivInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned) argument 4929 SimplifyFDivInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 4934 SimplifyFRemInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q, unsigned) argument 4957 SimplifyFRemInst(Value *Op0, Value *Op1, FastMathFlags FMF, const SimplifyQuery &Q) argument 5162 simplifyUnaryIntrinsic(Function *F, Value *Op0, const SimplifyQuery &Q) argument 5236 simplifyBinaryIntrinsic(Function *F, Value *Op0, Value *Op1, const SimplifyQuery &Q) argument 5413 Value *Op0 = Call->getArgOperand(0), *Op1 = Call->getArgOperand(1), local 5435 Value *Op0 = Call->getArgOperand(0); local 5488 SimplifyFreezeInst(Value *Op0, const SimplifyQuery &Q) argument 5496 SimplifyFreezeInst(Value *Op0, const SimplifyQuery &Q) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 135 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; 137 Ops[1].getAsInteger(10, Op0); 142 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; 149 uint32_t Op0 = (Bits >> 14) & 0x3; 155 return "S" + utostr(Op0) + "_" + utostr(Op1) + "_C" + utostr(CRn) + "_C" +
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 189 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); 191 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName()); 248 if (Op0->hasOneUse()) { 251 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) 253 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1)))) 275 if (match(Op0, m_OneUse(m_Add(m_Value(X), m_Constant(C1))))) { 286 if (Op0 == Op1) { 288 SelectPatternFlavor SPF = matchSelectPattern(Op0, X, Y).Flavor; 296 if (match(Op0, m_Neg(m_Value(X))) && match(Op1, m_Constant(Op1C))) 300 if (match(Op0, m_Ne 435 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 746 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 909 foldUDivPow2Cst(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument 922 foldUDivShl(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument 948 visitUDivOperand(Value *Op0, Value *Op1, const BinaryOperator &I, SmallVectorImpl<UDivFoldAction> &Actions, unsigned Depth = 0) argument 1373 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local [all...] |
H A D | InstCombineAddSub.cpp | 825 Value *Op0 = Add.getOperand(0), *Op1 = Add.getOperand(1); local 836 match(Op0, m_OneUse(m_ZExt(m_NUWAdd(m_Value(X), m_APInt(C2))))) && 846 if (match(Op0, m_OneUse(m_SExt(m_NSWAdd(m_Value(X), m_Constant(NarrowC)))))) { 853 if (match(Op0, m_OneUse(m_ZExt(m_NUWAdd(m_Value(X), m_Constant(NarrowC)))))) { 864 Value *Op0 = Add.getOperand(0), *Op1 = Add.getOperand(1); local 876 if (match(Op0, m_Sub(m_Constant(Op00C), m_Value(X)))) 882 if (match(Op0, m_OneUse(m_Sub(m_Value(X), m_Value(Y)))) && 887 if (match(Op0, m_ZExt(m_Value(X))) && 891 if (match(Op0, m_SExt(m_Value(X))) && 896 if (match(Op0, m_No 2149 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local [all...] |
H A D | InstCombineAndOrXor.cpp | 1205 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local 1208 return getNewICmpValue(Code, IsSigned, Op0, Op1, Builder); 1468 Value *Op0 = BO.getOperand(0), *Op1 = BO.getOperand(1), *X; local 1471 std::swap(Op0, Op1); 1477 if (!match(Op0, m_FCmp(Pred, m_Value(X), m_AnyZeroFP())) || Pred != NanPred || 1496 NewFCmpInst->copyIRFlags(Op0); 1586 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 1587 CastInst *Cast0 = dyn_cast<CastInst>(Op0); 1651 Value *Op0 = I.getOperand(0); local 1655 // Operand complexity canonicalization guarantees that the 'or' is Op0 1677 Value *Op0 = I.getOperand(0); local 1734 Value *Op0 = And.getOperand(0), *Op1 = And.getOperand(1); local 2038 Value *Op0 = Or.getOperand(0), *Op1 = Or.getOperand(1); local 2150 Value *Op0 = Or.getOperand(0), *Op1 = Or.getOperand(1); local 2373 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local 2613 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 2884 Value *Op0 = I.getOperand(0); local 2944 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local [all...] |
H A D | InstCombineShifts.cpp | 364 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 365 assert(Op0->getType() == Op1->getType()); 371 return BinaryOperator::Create(I.getOpcode(), Op0, NewExt); 379 if (isa<Constant>(Op0)) 385 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) 396 if (match(Op0, m_Constant()) && match(Op1, m_Add(m_Value(A), m_Constant(C)))) 400 I.getOpcode(), Builder.CreateBinOp(I.getOpcode(), Op0, C), A); 675 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, argument 686 canEvaluateShifted(Op0, Op1C->getZExtValue(), isLeftShift, *this, &I)) { 690 << *Op0 << "\ [all...] |
H A D | InstCombineCompares.cpp | 1447 Value *Op0 = Cmp.getOperand(0), *Op1 = Cmp.getOperand(1); local 1451 match(Op0, m_Add(m_Add(m_Value(A), m_Value(B)), m_ConstantInt(CI2)))) 1460 if (auto *Phi = dyn_cast<PHINode>(Op0)) 3208 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 3210 Instruction *LHSI = dyn_cast<Instruction>(Op0); 3721 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 3724 BinaryOperator *BO0 = dyn_cast<BinaryOperator>(Op0); 3734 if (match(Op0, m_OneUse(m_c_Add(m_Specific(Op1), m_Value(X)))) && 3737 // Op0 u>/u<= (Op0 4089 Value *Op0 = Cmp.getOperand(0); local 4831 swapMayExposeCSEOpportunities(const Value *Op0, const Value *Op1) argument 4963 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 5487 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 5516 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local 6111 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local [all...] |
H A D | InstCombineCalls.cpp | 795 static Value *simplifyX86extrq(IntrinsicInst &II, Value *Op0, argument 806 Constant *C0 = dyn_cast<Constant>(Op0); 854 Builder.CreateBitCast(Op0, ShufTy), 870 Value *Args[] = {Op0, CILength, CIIndex}; 886 static Value *simplifyX86insertq(IntrinsicInst &II, Value *Op0, Value *Op1, argument 932 Value *SV = Builder.CreateShuffleVector(Builder.CreateBitCast(Op0, ShufTy), 939 Constant *C0 = dyn_cast<Constant>(Op0); 969 Value *Args[] = {Op0, Op1, CILength, CIIndex}; 1239 Value *Op0 = II.getArgOperand(0); local 1243 if (match(Op0, m_BitRevers 1309 Value *Op0 = II.getArgOperand(0); local 2030 Value *Op0 = II->getArgOperand(0), *Op1 = II->getArgOperand(1); local 3054 Value *Op0 = II->getArgOperand(0); local 3094 Value *Op0 = II->getArgOperand(0); local 3115 Value *Op0 = II->getArgOperand(0); local 3149 Value *Op0 = II->getArgOperand(0); local 3192 Value *Op0 = II->getArgOperand(0); local 3328 Value *Op0 = Builder.CreateBitCast(II->getArgOperand(0), local 4097 Value *Op0 = II->getArgOperand(0); local [all...] |
H A D | InstructionCombining.cpp | 337 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0)); local 342 if (Op0 && Op0->getOpcode() == Opcode) { 343 Value *A = Op0->getOperand(0); 344 Value *B = Op0->getOperand(1); 352 bool IsNUW = hasNoUnsignedWrap(I) && hasNoUnsignedWrap(*Op0); 353 bool IsNSW = maintainNoSignedWrap(I, B, C) && hasNoSignedWrap(*Op0); 361 // the operands to Op0. 403 if (Op0 && Op0 660 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); local 873 Value *Op0 = SO, *Op1 = ConstOperand; local 924 Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1); local 970 Value *Op0 = InV, *Op1 = C; local 1675 Value *Op0 = BO.getOperand(0), *Op1 = BO.getOperand(1); local 2804 Value *Op0; local 3323 Value *Op0 = I.getOperand(0); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 131 Value *Op0 = I.getOperand(0); local 138 auto &Sem = Op0->getType()->getFltSemantics(); 224 if (CallInst *CI = dyn_cast<CallInst>(Op0)) { 230 Op0 = CI->getArgOperand(0); 237 converted(&I, Op0, Mask, Worthy); 241 Value *Op0 = I.getOperand(0); local 247 if (auto *Cast = dyn_cast<BitCastInst>(Op0)) { 267 } else if (auto *CI = dyn_cast<CallInst>(Op0)) { 296 Value *Op0, *Op1; local 299 std::tie(Op0, Mask [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | FastISel.h | 357 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, 362 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, 368 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, 376 Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, 397 const TargetRegisterClass *RC, unsigned Op0, 403 const TargetRegisterClass *RC, unsigned Op0, 409 const TargetRegisterClass *RC, unsigned Op0, 416 const TargetRegisterClass *RC, unsigned Op0, 422 const TargetRegisterClass *RC, unsigned Op0, 434 const TargetRegisterClass *RC, unsigned Op0, [all...] |
H A D | SelectionDAGAddressAnalysis.h | 78 // Returns true `Op0` and `Op1` can be proven to alias/not alias, in 80 static bool computeAliasing(const SDNode *Op0,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | Scalarizer.cpp | 114 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument 116 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); 127 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument 129 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); 152 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, argument 154 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); 497 Value *Op0 = VOp0[Elem]; local 499 Res[Elem] = Split(Builder, Op0, Op1, I.getName() + ".i" + Twine(Elem)); 594 Value *Op0 = VOp0[I]; local 597 Res[I] = Builder.CreateSelect(Op0, Op 601 Value *Op0 = SI.getOperand(0); local 640 Value *Op0 = GEPI.getOperand(0); local 682 Scatterer Op0 = scatter(&CI, CI.getOperand(0)); local 702 Scatterer Op0 = scatter(&BCI, BCI.getOperand(0)); local 755 Scatterer Op0 = scatter(&IEI, IEI.getOperand(0)); local 790 Scatterer Op0 = scatter(&EEI, EEI.getOperand(0)); local 821 Scatterer Op0 = scatter(&SVI, SVI.getOperand(0)); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 638 Register Op0 = getRegForValue(I->getOperand(0)); local 639 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. 661 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, 678 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); 1576 Register Op0 = getRegForValue(I->getOperand(0)); local 1577 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. 1590 TII.get(TargetOpcode::COPY), ResultReg).addReg(Op0); 1596 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); 1820 const Value *Op0 = EVI->getOperand(0); local 1821 Type *AggTy = Op0 2032 fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument 2105 fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill) argument 2126 fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument 2150 fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument 2178 fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument 2200 fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2) argument 2244 fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument 2286 fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx) argument 2300 fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) argument [all...] |
H A D | TargetLowering.cpp | 744 SDValue Op0 = Op.getOperand(0); local 747 DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); 750 return Op0; 755 SDValue Op0 = Op.getOperand(0); local 762 Op0.getScalarValueSizeInBits() == BitWidth && 763 getBooleanContents(Op0.getValueType()) == 771 return Op0; 777 SDValue Op0 = Op.getOperand(0); local 781 return Op0; 783 unsigned NumSignBits = DAG.ComputeNumSignBits(Op0, DemandedElt 1136 SDValue Op0 = Op.getOperand(0); local 1171 SDValue Op0 = Op.getOperand(0); local 1248 SDValue Op0 = Op.getOperand(0); local 1291 SDValue Op0 = Op.getOperand(0); local 1402 SDValue Op0 = Op.getOperand(0); local 1430 SDValue Op0 = Op.getOperand(0); local 1538 SDValue Op0 = Op.getOperand(0); local 1590 SDValue Op0 = Op.getOperand(0); local 1668 SDValue Op0 = Op.getOperand(0); local 1715 SDValue Op0 = Op.getOperand(0); local 1752 SDValue Op0 = Op.getOperand(0); local 2147 SDValue Op0 = Op.getOperand(0), Op1 = Op.getOperand(1); local 2754 SDValue Op0 = Op.getOperand(0); local 2781 SDValue Op0 = Op.getOperand(0); local 2805 SDValue Op0 = Op.getOperand(0); local 3727 SDValue Op0 = N0; local 4856 SDValue Op0 = N->getOperand(0); local 5372 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal); local 5614 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 185 Value *Op0, *Op1; local 190 if (match(V, m_And(m_Value(Op0), m_One()))) { 192 return matchAndOrChain(Op0, MOps); 194 if (match(V, m_And(m_Value(Op0), m_Value(Op1)))) 195 return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps); 198 if (match(V, m_Or(m_Value(Op0), m_Value(Op1)))) 199 return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps); 293 Value *Op0 = I.getOperand(0); local 297 if ((match(Op0, m_Mul(m_Value(MulOp0), m_SpecificInt(Mask01)))) &&
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 226 void validateBinaryOp(const LLT Res, const LLT Op0, const LLT Op1); 227 void validateShiftOp(const LLT Res, const LLT Op0, const LLT Op1); 444 /// Build and insert \p Res = G_PTR_ADD \p Op0, \p Op1 446 /// G_PTR_ADD adds \p Op1 addressible units to the pointer specified by \p Op0, 451 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer 456 MachineInstrBuilder buildPtrAdd(const DstOp &Res, const SrcOp &Op0, 459 /// Materialize and insert \p Res = G_PTR_ADD \p Op0, (G_CONSTANT \p Value) 461 /// G_PTR_ADD adds \p Value bytes to the pointer specified by \p Op0, 463 /// G_PTR_ADD or G_CONSTANT will be created and \pre Op0 will be assigned to 467 /// \pre \p Op0 mus 480 buildPtrMask(const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1) argument 513 buildUAddo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) argument 519 buildUSubo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) argument 525 buildSAddo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) argument 531 buildSSubo(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1) argument 550 buildUAdde(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) argument 558 buildUSube(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) argument 566 buildSAdde(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) argument 574 buildSSube(const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86PartialReduction.cpp | 207 Value *Op0 = getZeroExtendedVal(Sub->getOperand(0)); local 209 if (!Op0 || !Op1) 240 Value *Zero = Constant::getNullValue(Op0->getType()); 241 Op0 = Builder.CreateShuffleVector(Op0, Zero, ConcatMask); 258 Value *ExtractOp0 = Builder.CreateShuffleVector(Op0, Op0, ExtractMask); 259 Value *ExtractOp1 = Builder.CreateShuffleVector(Op1, Op0, ExtractMask);
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H A D | X86InstrBuilder.h | 95 const MachineOperand &Op0 = MI->getOperand(Operand); local 96 if (Op0.isReg()) { 98 AM.Base.Reg = Op0.getReg(); 101 AM.Base.FrameIndex = Op0.getIndex();
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H A D | X86FloatingPoint.cpp | 1296 unsigned Op0 = getFPReg(MI.getOperand(NumOperands - 2)); local 1298 bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0); 1306 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 1311 moveToTop(Op0, I); // Move dead operand to TOS. 1312 TOS = Op0; 1322 duplicateToTop(Op0, Dest, I); 1323 Op0 = TOS = Dest; 1330 duplicateToTop(Op0, Dest, I); 1331 Op0 = TOS = Dest; 1337 assert((TOS == Op0 || TO 1394 unsigned Op0 = getFPReg(MI.getOperand(NumOperands - 2)); local 1420 unsigned Op0 = getFPReg(MI.getOperand(0)); local [all...] |
H A D | X86RegisterBankInfo.cpp | 213 auto &Op0 = MI.getOperand(0); local 215 const LLT Ty0 = MRI.getType(Op0.getReg()); 242 auto &Op0 = MI.getOperand(0); local 244 const LLT Ty0 = MRI.getType(Op0.getReg());
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | GetElementPtrTypeIterator.h | 157 gep_type_begin(Type *Op0, ArrayRef<T> A) { argument 158 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin()); 163 gep_type_end(Type * /*Op0*/, ArrayRef<T> A) {
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | InstructionSimplify.h | 175 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, 179 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, 183 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, 233 Value *SimplifyShuffleVectorInst(Value *Op0, Value *Op1, ArrayRef<int> Mask,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelDAGToDAG.cpp | 253 SDValue Op0, Op1, AluOp; local 258 if (!selectAddrRr(Op, Op0, Op1, AluOp) && 259 !selectAddrRi(Op, Op0, Op1, AluOp)) 264 OutOps.push_back(Op0);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 988 Value *Op0, Value *Op1) { 992 return Op0; 995 cast<VectorType>(Op0->getType())->getNumElements()); 996 return Builder.CreateSelect(Mask, Op0, Op1); 1000 Value *Op0, Value *Op1) { 1004 return Op0; 1010 return Builder.CreateSelect(Mask, Op0, Op1); 1016 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, argument 1022 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1034 return llvm::Constant::getNullValue(Op0 987 EmitX86Select(IRBuilder< &Builder, Value *Mask, Value *Op0, Value *Op1) argument 999 EmitX86ScalarSelect(IRBuilder< &Builder, Value *Mask, Value *Op0, Value *Op1) argument 1126 Value *Op0 = CI.getOperand(0); local 1212 Value *Op0 = CI.getArgOperand(0); local 1289 Value *Op0 = CI.getArgOperand(0); local 1304 Value *Op0 = CI.getArgOperand(0); local 1369 Value *Op0 = CI.getArgOperand(0); local 1863 Value *Op0 = CI->getArgOperand(0); local 2463 Value *Op0 = CI->getArgOperand(0); local 2477 Value *Op0 = CI->getArgOperand(0); local 2522 Value *Op0 = CI->getArgOperand(0); local 2546 Value *Op0 = CI->getArgOperand(0); local 2600 Value *Op0 = CI->getArgOperand(0); local 2622 Value *Op0 = CI->getArgOperand(0); local 2641 Value *Op0 = CI->getArgOperand(0); local 2659 Value *Op0 = CI->getArgOperand(0); local 2686 Value *Op0 = CI->getArgOperand(0); local 2707 Value *Op0 = CI->getArgOperand(0); local 2723 Value *Op0 = CI->getArgOperand(0); local [all...] |