Searched refs:regval (Results 1 - 25 of 53) sorted by relevance

123

/freebsd-11-stable/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_phy.c45 uint32_t regval; local
47 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
48 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
50 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
52 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
60 uint32_t regval; local
62 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
63 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
66 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
68 regval |
[all...]
H A Dar9280_olc.c132 int delta, currPDADC, regval; local
161 regval = AH9280(ah)->originalGain[i] - delta;
162 if (regval < 0)
163 regval = 0;
167 AR_PHY_TX_GAIN, regval);
H A Dar9287_reset.c458 uint32_t regChainOffset, regval; local
544 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH0);
545 regval &= ~(AR9287_AN_RF2G3_DB1 |
551 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
559 OS_A_REG_WRITE(ah, AR9287_AN_RF2G3_CH0, regval);
561 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH1);
562 regval &= ~(AR9287_AN_RF2G3_DB1 |
568 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) |
575 OS_A_REG_WRITE(ah, AR9287_AN_RF2G3_CH1, regval);
/freebsd-11-stable/contrib/gdb/gdb/
H A Dppc-sysv-tdep.c115 char regval[MAX_REGISTER_SIZE]; local
118 convert_typed_floating (val, type, regval, regtype);
120 regval);
340 char regval[MAX_REGISTER_SIZE]; local
342 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
343 convert_typed_floating (regval, regtype, readbuf, type);
349 char regval[MAX_REGISTER_SIZE]; local
351 convert_typed_floating (writebuf, type, regval, regtype);
352 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
385 ULONGEST regval; local
645 char regval[MAX_REGISTER_SIZE]; local
663 char regval[MAX_REGISTER_SIZE]; local
728 char regval[MAX_REGISTER_SIZE]; local
853 char regval[MAX_REGISTER_SIZE]; local
880 ULONGEST regval; local
942 char regval[MAX_REGISTER_SIZE]; local
[all...]
H A Dfindvar.c510 struct value *regval;
512 regval = value_from_register (lookup_pointer_type (type),
514 if (regval == NULL)
516 addr = value_as_address (regval);
539 struct value *regval;
547 regval = value_from_register (lookup_pointer_type (type),
551 if (regval == NULL)
554 addr = value_as_address (regval);
559 regval = value_from_register (type, regno, frame);
561 if (regval
509 struct value *regval; local
538 struct value *regval; local
[all...]
H A Dmips-tdep.c2845 unsigned long regval; local
2848 regval = extract_unsigned_integer (val + low_offset, 4);
2851 float_argreg, phex (regval, 4));
2852 write_register (float_argreg++, regval);
2855 regval = extract_unsigned_integer (val + 4 - low_offset, 4);
2858 float_argreg, phex (regval, 4));
2859 write_register (float_argreg++, regval);
2867 LONGEST regval = extract_unsigned_integer (val, len); local
2870 float_argreg, phex (regval, len));
2871 write_register (float_argreg++, regval);
2956 LONGEST regval = local
3123 LONGEST regval = extract_unsigned_integer (val, len); local
3211 LONGEST regval = local
3482 unsigned long regval; local
3513 LONGEST regval = extract_unsigned_integer (val, len); local
3615 LONGEST regval = extract_signed_integer (val, partial_len); local
3934 unsigned long regval; local
3965 LONGEST regval = extract_unsigned_integer (val, len); local
4067 LONGEST regval = extract_signed_integer (val, partial_len); local
[all...]
H A Ddwarf2loc.c247 bfd_byte regval[MAX_REGISTER_SIZE]; local
249 get_frame_register (frame, gdb_regnum, regval);
250 memcpy (contents + offset, regval, p->size);
/freebsd-11-stable/sys/arm/freescale/imx/
H A Dimx51_ccm.c554 uint32_t regval; local
560 regval = ccm_read_4(ccm_softc, CCMC_CSCMR1);
561 regval &= ~CSCMR1_USBOH3_CLK_SEL_MASK;
562 regval |= 1 << CSCMR1_USBOH3_CLK_SEL_SHIFT;
563 ccm_write_4(ccm_softc, CCMC_CSCMR1, regval);
568 regval = ccm_read_4(ccm_softc, CCMC_CSCDR1);
569 regval &= ~CSCDR1_USBOH3_CLK_PODF_MASK;
570 regval &= ~CSCDR1_USBOH3_CLK_PRED_MASK;
571 regval |= 4 << CSCDR1_USBOH3_CLK_PRED_SHIFT;
572 regval |
585 uint32_t regval; local
[all...]
/freebsd-11-stable/sys/mips/nlm/dev/net/
H A Dxaui.c50 uint32_t regval; local
122 regval = nlm_read_nae_reg(nae_base, reg);
123 } while ((regval & LANE_TX_CLK) == 0);
127 regval = nlm_read_nae_reg(nae_base, reg);
128 } while ((regval & LANE_RX_CLK) == 0);
132 regval = nlm_read_nae_reg(nae_base, reg);
133 } while ((regval & XAUI_LANE_FAULT) != 0);
/freebsd-11-stable/sys/dev/ixgbe/
H A Dixgbe_82598.h53 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_82598.c256 u32 regval; local
269 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
270 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
271 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
276 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
277 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
279 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
1363 u32 regval; local
1371 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1372 regval |
1433 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval) argument
[all...]
H A Dixgbe_82599.h62 s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
/freebsd-11-stable/sys/mips/mediatek/
H A Dmtk_gpio_v1.c185 uint32_t regval, mask = (1u << pin); local
190 regval = MTK_READ_4(sc, GPIO_PIODIR);
192 regval &= ~mask;
194 regval |= mask;
195 MTK_WRITE_4(sc, GPIO_PIODIR, regval);
206 uint32_t regval, mask = (1u << pin); local
208 regval = MTK_READ_4(sc, GPIO_PIOPOL);
210 regval |= mask;
212 regval &= ~mask;
213 MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
[all...]
H A Dmtk_gpio_v2.c176 uint32_t regval, mask = (1u << pin); local
181 regval = MTK_READ_4(sc, GPIO_PIODIR(sc));
183 regval &= ~mask;
185 regval |= mask;
186 MTK_WRITE_4(sc, GPIO_PIODIR(sc), regval);
197 uint32_t regval, mask = (1u << pin); local
199 regval = MTK_READ_4(sc, GPIO_PIOPOL(sc));
201 regval |= mask;
203 regval &= ~mask;
204 MTK_WRITE_4(sc, GPIO_PIOPOL(sc), regval);
[all...]
/freebsd-11-stable/sys/powerpc/mpc85xx/
H A Dlbc.c279 uint32_t regval; local
290 regval = sc->sc_banks[i].addr;
293 regval |= (1 << 11);
296 regval |= (2 << 11);
299 regval |= (3 << 11);
305 regval |= (sc->sc_banks[i].decc << 9);
306 regval |= (sc->sc_banks[i].wp << 8);
307 regval |= (sc->sc_banks[i].msel << 5);
308 regval |= (sc->sc_banks[i].atom << 2);
309 regval |
[all...]
/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_mci.c934 uint32_t regval; local
937 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) |
949 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval);
954 uint32_t regval; local
957 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) |
969 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval);
974 uint32_t regval; local
977 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) |
988 regval |= SM(1, AR_BTCOEX_CTRL_SPDT_ENABLE_10);
991 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval);
999 u_int32_t regval; local
1289 u_int32_t regval; local
[all...]
/freebsd-11-stable/sys/arm64/cavium/
H A Dthunder_pcie_pem.c455 uint64_t regval; local
469 regval = bus_space_read_8(sc->reg_bst, handle,
471 regval &= ~(0xFFFFFFFFUL);
473 PEM_CFG_SLIX_TO_REG(slix), regval);
480 uint64_t regval; local
483 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_ON_REG);
484 if ((regval & PEM_CFG_LINK_MASK) != PEM_CFG_LINK_RDY) {
489 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS);
490 regval |= PEM_LINK_ENABLE;
491 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS, regval);
[all...]
/freebsd-11-stable/sys/dev/cxgb/common/
H A Dcxgb_vsc8211.c398 unsigned int regval; local
422 regval = V_VSC8211_TXFIFODEPTH(val) | V_VSC8211_RXFIFODEPTH(val) |
426 return mdio_write(phy, 0, VSC8211_PHY_CTRL, regval);
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/gdb-remote/
H A DThreadGDBRemote.h106 bool PrivateSetRegisterValue(uint32_t reg, uint64_t regval);
H A DThreadGDBRemote.cpp329 bool ThreadGDBRemote::PrivateSetRegisterValue(uint32_t reg, uint64_t regval) { argument
333 return gdb_reg_ctx->PrivateSetRegisterValue(reg, regval);
/freebsd-11-stable/sys/dev/ct/
H A Dbshw_machdep.c597 u_int8_t regval; local
599 if ((regval = ct_cr_read_1(chp, 0x37)) & 0x08)
602 ct_cr_write_1(chp, 0x37, regval | 0x08);
603 regval = ct_cr_read_1(chp, 0x3f);
604 ct_cr_write_1(chp, 0x3f, regval | 0x08);
/freebsd-11-stable/sys/arm/ti/
H A Dti_sdhci.c394 uint32_t regval; local
462 regval = ti_mmchs_read_4(sc, MMCHS_SD_CAPA);
464 regval |= MMCHS_SD_CAPA_VS18;
466 regval |= MMCHS_SD_CAPA_VS30;
467 ti_mmchs_write_4(sc, MMCHS_SD_CAPA, regval);
/freebsd-11-stable/sys/dev/ffec/
H A Dif_ffec.c1100 uint32_t maxbuf, maxfl, regval; local
1226 regval = RD4(sc, FEC_MIBC_REG);
1227 WR4(sc, FEC_MIBC_REG, regval | FEC_MIBC_DIS);
1229 WR4(sc, FEC_MIBC_REG, regval & ~FEC_MIBC_DIS);
1235 regval = RD4(sc, FEC_RACC_REG);
1236 WR4(sc, FEC_RACC_REG, regval | FEC_RACC_SHIFT16);
1248 regval = RD4(sc, FEC_ECR_REG);
1250 regval |= FEC_ECR_DBSWP;
1252 regval |= FEC_ECR_ETHEREN;
1253 WR4(sc, FEC_ECR_REG, regval);
[all...]
/freebsd-11-stable/sys/dev/e1000/
H A De1000_ich8lan.c163 u16 regval; member in union:ich8_hws_flash_status
176 u16 regval; member in union:ich8_hws_flash_ctrl
187 u16 regval; member in union:ich8_hws_flash_regacc
3670 hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
3683 hsfsts.regval & 0xFFFF);
3685 E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);
3703 hsfsts.regval & 0xFFFF);
3706 hsfsts.regval);
3715 hsfsts.regval = E1000_READ_FLASH_REG16(hw,
3730 hsfsts.regval
[all...]
/freebsd-11-stable/sys/dev/bhnd/cores/chipc/
H A Dchipc.c418 uint32_t regval; local
450 regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT);
451 caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE);
471 regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG);
472 if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS))
503 regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT);
504 caps->sprom_offset = CHIPC_GET_BITS(regval, CHIPC_OTPL_GUP);

Completed in 230 milliseconds

123